//
// (C) Copyright NVIDIA Corporation Inc., 1995,1996. All rights reserved.
//
/***************************************************************************\
*                                                                           *
*               NV10 Hardware Reference Manual extracted defines.           *
*                                                                           *
\***************************************************************************/
#ifndef _NV10_REF_H_
#define _NV10_REF_H_

//
// These registers are to be accessed only by nv10-specific code.
//

/* dev_bus.ref */
#define NV_MSPACE                             0x07FFFFFF:0x00000000 /* RW--D */
/* dev_bus.ref */
#define NV_RSPACE                             0x00FFFFFF:0x00000000 /* RW--D */
/* dev_bus.ref */
#define NV_PBUS_DEBUG_0                                  0x00001080 /* RW-4R */
#define NV_PBUS_DEBUG_0_FBIO_SCLK_DELAY                         3:0 /* RWIUF */
#define NV_PBUS_DEBUG_0_FBIO_SCLK_DELAY_8                0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_0_FBIO_SCLK_PC                            4:4 /* RWIVF */
#define NV_PBUS_DEBUG_0_FBIO_SCLK_PC_NORMAL              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_0_FBIO_SCLK_PC_OVERRIDE            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_0_FBIO_FBCLK_DELAY                       11:8 /* RWIUF */
#define NV_PBUS_DEBUG_0_FBIO_FBCLK_DELAY_4               0x00000004 /* RWI-V */
#define NV_PBUS_DEBUG_0_FBIO_FBCLK_DELAY_8               0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_0_FBIO_FBCLK_PC                         12:12 /* RWIVF */
#define NV_PBUS_DEBUG_0_FBIO_FBCLK_PC_NORMAL             0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_0_FBIO_FBCLK_PC_OVERRIDE           0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_0_FBIO_ACLK_DELAY                       19:16 /* RWIUF */
#define NV_PBUS_DEBUG_0_FBIO_ACLK_DELAY_8                0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_0_FBIO_ACLK_DELAY_10               0x0000000A /* RWI-V */
#define NV_PBUS_DEBUG_0_FBIO_ACLK_PC                          20:20 /* RWIVF */
#define NV_PBUS_DEBUG_0_FBIO_ACLK_PC_NORMAL              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_0_FBIO_ACLK_PC_OVERRIDE            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_0_FBIO_RCLK_DELAY                       27:24 /* RWIUF */
#define NV_PBUS_DEBUG_0_FBIO_RCLK_DELAY_8                0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_0_FBIO_RCLK_DELAY_14               0x0000000E /* RWI-V */
#define NV_PBUS_DEBUG_0_FBIO_RCLK_PC                          28:28 /* RWIVF */
#define NV_PBUS_DEBUG_0_FBIO_RCLK_PC_NORMAL              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_0_FBIO_RCLK_PC_OVERRIDE            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1                                  0x00001084 /* RW-4R */
#define NV_PBUS_DEBUG_1_PCIM_THROTTLE                           0:0 /* RWIVF */
#define NV_PBUS_DEBUG_1_PCIM_THROTTLE_DISABLED           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_1_PCIM_THROTTLE_ENABLED            0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_1_PCIM_CMD                                1:1 /* RWIVF */
#define NV_PBUS_DEBUG_1_PCIM_CMD_SIZE_BASED              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_PCIM_CMD_MRL_ONLY                0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_HASH_DECODE                             2:2 /* RWIVF */
#define NV_PBUS_DEBUG_1_HASH_DECODE_1FF                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_HASH_DECODE_2FF                  0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_AGPM_CMD                                4:3 /* RWIVF */
#define NV_PBUS_DEBUG_1_AGPM_CMD_HP_ON_1ST               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_1_AGPM_CMD_LP_ONLY                 0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_1_AGPM_CMD_HP_ONLY                 0x00000002 /* RW--V */
/* NV_PBUS_DEBUG_1_PCIS_WRITE is shared (see nv_ref.h) */
#define NV_PBUS_DEBUG_1_PCIS_2_1                                6:6 /* RWIVF */
#define NV_PBUS_DEBUG_1_PCIS_2_1_DISABLED                0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_1_PCIS_2_1_ENABLED                 0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_1_PCIS_RETRY                              7:7 /* RWIVF */
#define NV_PBUS_DEBUG_1_PCIS_RETRY_DISABLED              0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_1_PCIS_RETRY_ENABLED               0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE0                                  7:7 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE0_ZERO                      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE0_ONE                       0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_1_PCIS_RD_BURST                           8:8 /* RWIVF */
#define NV_PBUS_DEBUG_1_PCIS_RD_BURST_DISABLED           0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_PCIS_RD_BURST_ENABLED            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_PCIS_WR_BURST                           9:9 /* RWIVF */
#define NV_PBUS_DEBUG_1_PCIS_WR_BURST_DISABLED           0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_PCIS_WR_BURST_ENABLED            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_PCIS_EARLY_RTY                        10:10 /* RWIVF */
#define NV_PBUS_DEBUG_1_PCIS_EARLY_RTY_DISABLED          0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_1_PCIS_EARLY_RTY_ENABLED           0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_1_PCIS_CPUQ                             12:12 /* RWIVF */
#define NV_PBUS_DEBUG_1_PCIS_CPUQ_DISABLED               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_1_PCIS_CPUQ_ENABLED                0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_1_DPSH_DECODE                           13:13 /* RWIVF */
#define NV_PBUS_DEBUG_1_DPSH_DECODE_NV4                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_DPSH_DECODE_NV3                  0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE1                                14:14 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE1_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE1_ONE                       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_FBI_DIFFERENTIAL                      14:14 /* RWIVF */
#define NV_PBUS_DEBUG_1_FBI_DIFFERENTIAL_ENABLED         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_FBI_DIFFERENTIAL_DISABLED        0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE2                                15:15 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE2_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE2_ONE                       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_AGPFW_DWOD                            15:15 /* RWIVF */
#define NV_PBUS_DEBUG_1_AGPFW_DWOD_DISABLED              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_AGPFW_DWOD_ENABLED               0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE3                                16:16 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE3_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE3_ONE                       0x00000001 /* RW--V */
/* NV_PBUS_DEBUG_1_OPENGL is shared (see nv_ref.h) */
#define NV_PBUS_DEBUG_1_SPARE4                                17:17 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE4_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE4_ONE                       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_ACQUIRE_TIMEOUT                       18:18 /* RWIVF */
#define NV_PBUS_DEBUG_1_ACQUIRE_TIMEOUT_DISABLED         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_ACQUIRE_TIMEOUT_ENABLED          0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE5                                18:18 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE5_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE5_ONE                       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE6                                19:19 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE6_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE6_ONE                       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE7                                20:20 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE7_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE7_ONE                       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE8                                21:21 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE8_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE8_ONE                       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE9                                22:22 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE9_ZERO                      0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE9_ONE                       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_1_SPARE10                               23:23 /* RWIVF */
#define NV_PBUS_DEBUG_1_SPARE10_ZERO                     0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_1_SPARE10_ONE                      0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_2                                  0x00001088 /* RW-4R */
#define NV_PBUS_DEBUG_2_AGP_DIFFERENTIAL                        0:0 /* RWIVF */
#define NV_PBUS_DEBUG_2_AGP_DIFFERENTIAL_DISABLED        0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_2_AGP_DIFFERENTIAL_ENABLED         0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_2_AGP_VREF                                0:0 /* RWIVF */
#define NV_PBUS_DEBUG_2_AGP_VREF_DISABLED                0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_2_AGP_VREF_ENABLED                 0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_2_AGP_SB_STB_DELAY                        9:4 /* RWIUF */
#define NV_PBUS_DEBUG_2_AGP_SB_STB_DELAY_34              0x00000022 /* RWI-V */
#define NV_PBUS_DEBUG_2_AGP_SB_STB_PC                         12:12 /* RWIVF */
#define NV_PBUS_DEBUG_2_AGP_SB_STB_PC_NORMAL             0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_2_AGP_SB_STB_PC_OVERRIDE           0x00000001 /* RW0-V */
#define NV_PBUS_DEBUG_3                                  0x0000108C /* RW-4R */
#define NV_PBUS_DEBUG_3_AGP_MAX_SIZE                            1:0 /* RWIVF */
#define NV_PBUS_DEBUG_3_AGP_MAX_SIZE_UNLIMITED           0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_3_AGP_MAX_SIZE_32_BYTES            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_MAX_SIZE_64_BYTES            0x00000002 /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK                            7:4 /* RWIVF */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_66MHZ         0x00000005 /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_73MHZ         0x00000006 /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_80MHZ         0x00000007 /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_87MHZ         0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_94MHZ         0x00000009 /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_100MHZ        0x0000000A /* RWI-V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_106MHZ        0x0000000B /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_113MHZ        0x0000000C /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_120MHZ        0x0000000D /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_126MHZ        0x0000000E /* RW--V */
#define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_133MHZ        0x0000000F /* RW--V */
#define NV_PBUS_DEBUG_CTL                                0x00001090 /* RW-4R */
#define NV_PBUS_DEBUG_CTL_MODE                                  0:0 /* RWIVF */
#define NV_PBUS_DEBUG_CTL_MODE_DISABLED                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTL_MODE_ENABLED                   0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTL_READ_SELECT                           4:4 /* RWIVF */
#define NV_PBUS_DEBUG_CTL_READ_SELECT_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTL_READ_SELECT_1                  0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_READ                               0x00001094 /* R--4R */
#define NV_PBUS_DEBUG_READ_DATA                                31:0 /* R-XUF */
#define NV_PBUS_DEBUG_HOST                               0x0000109C /* RW-4R */
#define NV_PBUS_DEBUG_HOST_SEL                                  2:0 /* RWXUF */
#define NV_PBUS_DEBUG_SEL_0                              0x000010A0 /* RW-4R */
#define NV_PBUS_DEBUG_SEL_0_X                                   2:0 /* RWXUF */
#define NV_PBUS_DEBUG_SEL_1                              0x000010A4 /* RW-4R */
#define NV_PBUS_DEBUG_SEL_1_X                                   2:0 /* RWXUF */
#define NV_PBUS_DEBUG_SEL_2                              0x000010A8 /* RW-4R */
#define NV_PBUS_DEBUG_SEL_2_X                                   2:0 /* RWXUF */
#define NV_PBUS_DEBUG_SEL_3                              0x000010AC /* RW-4R */
#define NV_PBUS_DEBUG_SEL_3_X                                   2:0 /* RWXUF */
#define NV_PBUS_DEBUG_CTRIM_0                            0x000010B0 /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NE_DELAY                       3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NE_DELAY_8              0x00000003 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SE_DELAY                       7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SE_DELAY_8              0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NW_DELAY                      11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NW_DELAY_8              0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SW_DELAY                     15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SW_DELAY_8              0x00000005 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_M_NW_DELAY                      19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_M_NW_DELAY_8               0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_M_SW_DELAY                      23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_M_SW_DELAY_8               0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_U_NW_DELAY                      27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_U_NW_DELAY_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_U_SW_DELAY                      31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_U_SW_DELAY_8               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NE_TRIM                        3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NE_TRIM_8               0x00000003 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NE_TRIM_INIT            0x00000003 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SE_TRIM                        7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SE_TRIM_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SE_TRIM_INIT            0x00000002 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NW_TRIM                       11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NW_TRIM_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NW_TRIM_INIT            0x00000002 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SW_TRIM                      15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SW_TRIM_8               0x00000005 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SW_TRIM_INIT            0x00000005 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_0_M_NW_TRIM                       19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_M_NW_TRIM_8                0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_M_NW_TRIM_INIT             0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_0_M_SW_TRIM                       23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_M_SW_TRIM_8                0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_M_SW_TRIM_INIT             0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NC_TRIM                      27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NC_TRIM_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_NC_TRIM_INIT            0x00000003 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SC_TRIM                      31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SC_TRIM_8               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_0_NV_SC_TRIM_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1                            0x000010B4 /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_1_C0_DELAY                          3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_1_C0_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_C1_DELAY                          7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_1_C1_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_C2_DELAY                         11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_1_C2_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_C3_DELAY                        15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_1_C3_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_C4_DELAY                        19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_1_C4_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_C5_DELAY                        23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_1_C5_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_C6_DELAY                        27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_1_C6_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_C7_DELAY                        31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_1_C7_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_M_SHAPE                           3:0 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_M_SHAPE_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_M_SHAPE_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_N_SHAPE                           7:4 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_N_SHAPE_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_N_SHAPE_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_P_SHAPE                          11:8 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_P_SHAPE_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_P_SHAPE_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_PV1_SHAPE                        11:8 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_PV1_SHAPE_0                0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_PV1_SHAPE_INIT             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_SPARE0                          15:12 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_SPARE0_0                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_SPARE0_INIT                0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_PV2_SHAPE                       15:12 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_PV2_SHAPE_0                0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_PV2_SHAPE_INIT             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_FP_SHAPE                        19:16 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_FP_SHAPE_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_FP_SHAPE_INIT              0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_FP1_SHAPE                       19:16 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_FP1_SHAPE_0                0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_FP1_SHAPE_INIT             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_FPDP_SHAPE                      23:20 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_FPDP_SHAPE_0               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_FPDP_SHAPE_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_FPIO_SHAPE                      27:24 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_FPIO_SHAPE_0               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_FPIO_SHAPE_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_SPARE1                          31:28 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_SPARE1_0                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_SPARE1_INIT                0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_1_FPION_SHAPE                     31:28 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_1_FPION_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_1_FPION_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_2                            0x000010B8 /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_2_C0_DELAY                          3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_2_C0_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_C1_DELAY                          7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_2_C1_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_C2_DELAY                         11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_2_C2_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_C3_DELAY                        15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_2_C3_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_C4_DELAY                        19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_2_C4_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_C5_DELAY                        23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_2_C5_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_C6_DELAY                        27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_2_C6_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_C7_DELAY                        31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_2_C7_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_0_SHAPE                       3:0 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_0_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_0_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_1_SHAPE                       7:4 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_1_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_1_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_2_SHAPE                      11:8 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_2_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_2_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_3_SHAPE                     15:12 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_3_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2I_3_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_0_SHAPE                     19:16 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_0_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_0_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_1_SHAPE                     23:20 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_1_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_1_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_2_SHAPE                     27:24 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_2_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_2_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_3_SHAPE                     31:28 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_3_SHAPE_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_2_M2O_3_SHAPE_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3                            0x000010BC /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_3_C0_DELAY                          3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_C0_DELAY_8                 0x00000003 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_C1_DELAY                          7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_C1_DELAY_8                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_C2_DELAY                         11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_C2_DELAY_8                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_C3_DELAY                        15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_C3_DELAY_8                 0x00000003 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_C4_DELAY                        19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_C4_DELAY_8                 0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_C5_DELAY                        23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_C5_DELAY_8                 0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_C6_DELAY                        27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_C6_DELAY_F                 0x0000000f /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_C7_DELAY                        31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_C7_DELAY_F                 0x0000000f /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_CCIR_CLK_OUT_TRIM                 3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_CCIR_CLK_OUT_TRIM_8        0x00000003 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_CCIR_CLK_OUT_TRIM_INIT     0x00000003 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK_TRIM                         7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK_TRIM_8                0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK_TRIM_INIT             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK1_TRIM                        7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK1_TRIM_8               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK1_TRIM_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK_TRIM                        11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK_TRIM_8                0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK_TRIM_INIT             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK1_TRIM                       11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK1_TRIM_8               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK1_TRIM_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_VSCLK_TRIM                      15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_VSCLK_TRIM_8               0x00000003 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_VSCLK_TRIM_INIT            0x00000003 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_FPCLK_TRIM                      19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_FPCLK_TRIM_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_FPCLK_TRIM_INIT            0x00000002 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK2_TRIM                      19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK2_TRIM_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_PCLK2_TRIM_INIT            0x00000002 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_FPDPCLK_TRIM                    23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_FPDPCLK_TRIM_8             0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_FPDPCLK_TRIM_INIT          0x00000002 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK2_TRIM                      23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK2_TRIM_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_VCLK2_TRIM_INIT            0x00000002 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_NVCLK                    24:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_NVCLK_ENABLE        0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_NVCLK_EN_INIT       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_MCLK                     25:25 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_MCLK_ENABLE         0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_MCLK_EN_INIT        0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CLK4X                    26:26 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CLK4X_ENABLE        0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CLK4X_EN_INIT       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR_O                   27:27 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR_O_ENABLE       0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR_O_EN_INIT      0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VIP_HCLK                 28:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VIP_HCLK_ENABLE     0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VIP_HCLK_EN_INIT    0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VCLK2                    29:29 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VCLK2_ENABLE        0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VCLK2_EN_INIT       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_PCLK                     30:30 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_PCLK_ENABLE         0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_PCLK_EN_INIT        0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR2                    31:31 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR2_ENABLE        0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR2_EN_INIT       0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_4                            0x000010C4 /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_4_C0_DELAY                          3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_C0_DELAY_8                 0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_C1_DELAY                          7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_C1_DELAY_8                 0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_C2_DELAY                         11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_C2_DELAY_8                 0x00000003 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_C3_DELAY                        15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_C3_DELAY_8                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_C4_DELAY                        19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_C4_DELAY_8                 0x0000000C /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_C5_DELAY                        23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_C5_DELAY_8                 0x0000000B /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_C6_DELAY                        27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_C6_DELAY_8                 0x0000000D /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_C7_DELAY                        31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_C7_DELAY_8                 0x0000000A /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_0_TRIM                        3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_0_TRIM_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_0_TRIM_INIT            0x00000003 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_1_TRIM                        7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_1_TRIM_8               0x00000002 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_1_TRIM_INIT            0x00000003 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_2_TRIM                       11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_2_TRIM_8               0x00000003 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_2_TRIM_INIT            0x00000004 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_3_TRIM                      15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_3_TRIM_8               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2I_3_TRIM_INIT            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_0_TRIM                      19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_0_TRIM_8               0x0000000C /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_0_TRIM_INIT            0x0000000B /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_1_TRIM                      23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_1_TRIM_8               0x0000000B /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_1_TRIM_INIT            0x0000000A /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_2_TRIM                      27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_2_TRIM_8               0x0000000D /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_2_TRIM_INIT            0x0000000C /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_3_TRIM                      31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_3_TRIM_8               0x0000000A /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_4_M2O_3_TRIM_INIT            0x00000009 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5                            0x000010C8 /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_5_C0_DELAY                          3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_C0_DELAY_8                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_C1_DELAY                          7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_C1_DELAY_8                 0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_C2_DELAY                         11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_C2_DELAY_8                 0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_C3_DELAY                        15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_C3_DELAY_8                 0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_C4_DELAY                        19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_C4_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_C5_DELAY                        23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_C5_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_C6_DELAY                        27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_C6_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_C7_DELAY                        31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_C7_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_FPIOCLK_TRIM                      3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_FPIOCLK_TRIM_8             0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_FPIOCLK_TRIM_INIT          0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE0                            7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE0_8                   0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE0_INIT                0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_FPIONCLK_TRIM                     7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_FPIONCLK_TRIM_8            0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_FPIONCLK_TRIM_INIT         0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE1                           11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE1_8                   0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE1_INIT                0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_FPDPCLK_TRIM                     11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_FPDPCLK_TRIM_8             0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_FPDPCLK_TRIM_INIT          0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE2                          15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE2_8                   0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE2_INIT                0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_FPCLK1_TRIM                     15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_FPCLK1_TRIM_8              0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_FPCLK1_TRIM_INIT           0x00000008 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE3                          19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE3_0                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE3_INIT                0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_FPCLK2_TRIM                     19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_FPCLK2_TRIM_0              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_FPCLK2_TRIM_INIT           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE4                          23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE4_0                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE4_INIT                0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_IFPCLK1_TRIM                    23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_IFPCLK1_TRIM_0             0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_IFPCLK1_TRIM_INIT          0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE5                          27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE5_0                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_SPARE5_INIT                0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_IFPCLK2_TRIM                    27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_IFPCLK2_TRIM_0             0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_IFPCLK2_TRIM_INIT          0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_5_M_DELAY                         31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_5_M_DELAY_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_5_M_DELAY_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_6                            0x000010CC /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_6_C0_DELAY                          3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_C0_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_C1_DELAY                          7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_C1_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_C2_DELAY                         11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_C2_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_C3_DELAY                        15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_C3_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_C4_DELAY                        19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_C4_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_C5_DELAY                        23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_C5_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_C6_DELAY                        27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_C6_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_C7_DELAY                        31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_C7_DELAY_0                 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_0_DELAY                  3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_0_DELAY_0         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_0_DELAY_INIT      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_1_DELAY                  7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_1_DELAY_0         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_1_DELAY_INIT      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_2_DELAY                 11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_2_DELAY_0         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_2_DELAY_INIT      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_3_DELAY                15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_3_DELAY_0         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_3_DELAY_INIT      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_0_DELAY                19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_0_DELAY_0         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_0_DELAY_INIT      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_1_DELAY                23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_1_DELAY_0         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_1_DELAY_INIT      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_2_DELAY                27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_2_DELAY_0         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_2_DELAY_INIT      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_3_DELAY                31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_3_DELAY_0         0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_3_DELAY_INIT      0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_AGPPLL                             0x000010C0 /* RW-4R */
#define NV_PBUS_DEBUG_AGPPLL_COEFF_MDIV                         7:0 /* RWIUF */
#define NV_PBUS_DEBUG_AGPPLL_COEFF_MDIV_1                0x00000001 /* RWI-V */
#define NV_PBUS_DEBUG_AGPPLL_COEFF_NDIV                        15:8 /* RWIUF */
#define NV_PBUS_DEBUG_AGPPLL_COEFF_NDIV_4                0x00000004 /* RWI-V */
#define NV_PBUS_DEBUG_AGPPLL_SETUP                            24:16 /* RWIUF */
#define NV_PBUS_DEBUG_AGPPLL_SETUP_DEFAULT               0x0000011C /* RWI-V */
#define NV_PBUS_DEBUG_AGPPLL_PWRDWN                           28:28 /* RWIVF */
#define NV_PBUS_DEBUG_AGPPLL_PWRDWN_ON                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_AGPPLL_PWRDWN_OFF                  0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_AGPPLL_STATUS                           31:31 /* R--VF */
#define NV_PBUS_DEBUG_AGPPLL_STATUS_NOTLOCKED            0x00000000 /* R---V */
#define NV_PBUS_DEBUG_AGPPLL_STATUS_LOCKED               0x00000001 /* R---V */
#define NV_PBUS_DEBUG_PORT                               0x000010D0 /* RW-4R */
#define NV_PBUS_DEBUG_PORT_MODE                                 0:0 /* RWIVF */
#define NV_PBUS_DEBUG_PORT_MODE_NORMAL                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PORT_MODE_AGP4X                    0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7                            0x000010D4 /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_7_CCDP_TRIM                         3:0 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_CCDP_TRIM_0                0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_CCDP_TRIM_INIT             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_CCDP_SHAPE                        7:4 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_CCDP_SHAPE_0               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_CCDP_SHAPE_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_CCIO_SHAPE                       11:8 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_CCIO_SHAPE_0               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_CCIO_SHAPE_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_FP2_SHAPE                       15:12 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_FP2_SHAPE_0                0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_FP2_SHAPE_INIT             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_IFP1_SHAPE                      19:16 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_IFP1_SHAPE_0               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_IFP1_SHAPE_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_IFP2_SHAPE                      23:20 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_IFP2_SHAPE_0               0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_IFP2_SHAPE_INIT            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_SPARE0                          27:24 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_SPARE0_0                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_SPARE0_INIT                0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_FBIO_MCLK_DIV2SDR               26:26 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_FBIO_MCLK_DIV2SDR_DISABLED 0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_FBIO_MCLK_DIV2SDR_ENABLED  0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_FBIO_MCLK_DIV2SDR_INIT     0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_7_SPARE1                          31:28 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_7_SPARE1_0                   0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_7_SPARE1_INIT                0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_8                            0x000010D8 /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_0_TRIM                      3:0 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_0_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_0_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_1                           7:4 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_1_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_1_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_2                          11:8 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_2_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_2_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_3                         15:12 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_3_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_3_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_4                         19:16 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_4_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_4_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_5                         23:20 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_5_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_5_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_6                         27:24 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_6_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_6_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_7                         31:28 /* RWISF */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_7_0                  0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_8_DQSOB_7_INIT               0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_CTRIM_9                            0x000010DC /* RW-4R */
#define NV_PBUS_DEBUG_CTRIM_9_NV_P8_TRIM                        3:0 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_9_NV_P8_TRIM_8               0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_9_NV_P9_TRIM                        7:4 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_9_NV_P9_TRIM_8               0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_9_M_P0_TRIM                        11:8 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_9_M_P0_TRIM_8                0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_9_M_P1_TRIM                       15:12 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_9_M_P1_TRIM_8                0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_9_M_P2_TRIM                       19:16 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_9_M_P2_TRIM_8                0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_9_M_P3_TRIM                       23:20 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_9_M_P3_TRIM_8                0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_9_M_P4_TRIM                       27:24 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_9_M_P4_TRIM_8                0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_CTRIM_9_M_P5_TRIM                       31:28 /* RWIUF */
#define NV_PBUS_DEBUG_CTRIM_9_M_P5_TRIM_8                0x00000008 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC                          0x000010E0 /* RW-4R */
#define NV_PBUS_DEBUG_PRIV_ASRC_0__ALIAS_1  NV_PBUS_DEBUG_PRIV_ASRC /*       */
#define NV_PBUS_DEBUG_PRIV_ASRC_EAST_SEL                      31:31 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_EAST_NORMAL              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC_EAST_OVERIDE             0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_EAST_VALUE                    30:24 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_EAST_VALUE_0             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_SOUTH_SEL                     23:23 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_SOUTH_NORMAL             0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC_SOUTH_OVERIDE            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_SOUTH_VALUE                   22:16 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_SOUTH_VALUE_0            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_WEST_SEL                      15:15 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_WEST_NORMAL              0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC_WEST_OVERIDE             0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_WEST_VALUE                     14:8 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_WEST_VALUE_0             0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_NORTH_SEL                       7:7 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_NORTH_NORMAL             0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC_NORTH_OVERIDE            0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_NORTH_VALUE                     6:0 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_NORTH_VALUE_0            0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1                        0x000010E4 /* RW-4R */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_0_SEL                    31:31 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_0_NORMAL            0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_0_OVERIDE           0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_0_VALUE                  30:24 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_0_VALUE_0           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_1_SEL                    23:23 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_1_NORMAL            0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_1_OVERIDE           0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_1_VALUE                  22:16 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_1_VALUE_0           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_2_SEL                    15:15 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_2_NORMAL            0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_2_OVERIDE           0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_2_VALUE                   14:8 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_2_VALUE_0           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_3_SEL                      7:7 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_3_NORMAL            0x00000000 /* RWI-V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_3_OVERIDE           0x00000001 /* RW--V */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_3_VALUE                    6:0 /* RWIVF */
#define NV_PBUS_DEBUG_PRIV_ASRC_1_BK_3_VALUE_0           0x00000000 /* RW--V */
#define NV_PBUS_DEBUG_DUALHEAD_CTL                       0x000010F0 /* RW-4R */
#define NV_PBUS_DEBUG_DUALHEAD_CTL_BLAH                        31:0 /* RWIUF */
#define NV_PBUS_DEBUG_DUALHEAD_CTL_BLAH_0                0x00000000 /* RWI-V */
#define NV_PBUS_INTR_0                                   0x00001100 /* RW-4R */
#define NV_PBUS_INTR_0_PCI_BUS_ERROR                            0:0 /* RWXVF */
#define NV_PBUS_INTR_0_PCI_BUS_ERROR_NOT_PENDING         0x00000000 /* R---V */
#define NV_PBUS_INTR_0_PCI_BUS_ERROR_PENDING             0x00000001 /* R---V */
#define NV_PBUS_INTR_0_PCI_BUS_ERROR_RESET               0x00000001 /* -W--V */
#define NV_PBUS_INTR_0_HOTPLUG                                  4:4 /* RWXVF */
#define NV_PBUS_INTR_0_HOTPLUG_NOT_PENDING               0x00000000 /* R---V */
#define NV_PBUS_INTR_0_HOTPLUG_PENDING                   0x00000001 /* R---V */
#define NV_PBUS_INTR_0_HOTPLUG_RESET                     0x00000001 /* -W--V */
#define NV_PBUS_INTR_EN_0                                0x00001140 /* RWI4R */
#define NV_PBUS_INTR_EN_0_PCI_BUS_ERROR                         0:0 /* RWIVF */
#define NV_PBUS_INTR_EN_0_PCI_BUS_ERROR_DISABLED         0x00000000 /* RWI-V */
#define NV_PBUS_INTR_EN_0_PCI_BUS_ERROR_ENABLED          0x00000001 /* RW--V */
#define NV_PBUS_INTR_EN_0_HOTPLUG                               4:4 /* RWIVF */
#define NV_PBUS_INTR_EN_0_HOTPLUG_DISABLED               0x00000000 /* RWI-V */
#define NV_PBUS_INTR_EN_0_HOTPLUG_ENABLED                0x00000001 /* RW--V */
#define NV_PBUS_ROM_CONFIG                               0x00001200 /* RWI4R */
#define NV_PBUS_ROM_CONFIG_TW1                                  5:0 /* RWIVF */
#define NV_PBUS_ROM_CONFIG_TW1_DEFAULT                   0x0000000F /* RWI-V */
#define NV_PBUS_ROM_CONFIG_TW0                                  7:6 /* RWIVF */
#define NV_PBUS_ROM_CONFIG_TW0_DEFAULT                   0x00000003 /* RWI-V */


#define NV_PBUS_PCI_NV_2_REVISION_ID_A01                 0x00000000 /* C---V */
#define NV_PBUS_PCI_NV_2_REVISION_ID_B01                 0x00000010 /* ----V */
#define NV_PBUS_PCI_NV_5_BASE_ADDRESS                         31:27 /* RWXUF */
#define NV_PBUS_PCI_NV_17_AGP_REV_MAJOR_1                0x00000001 /* C---V */
/* dev_bus.ref */
/* dev_bus.ref */
/* dev_bus.ref */
#define NV_PRMIO_RMA_ID                                  0x00007100 /* R--4R */
#define NV_PRMIO_RMA_ID_CODE                                   31:0 /* C--UF */
#define NV_PRMIO_RMA_ID_CODE_VALID                       0x2B16D065 /* C---V */
#define NV_PRMIO_RMA_PTR                                 0x00007104 /* RW-4R */
#define NV_PRMIO_RMA_PTR_SPACE                                31:31 /* RWIVF */
#define NV_PRMIO_RMA_PTR_SPACE_REGISTER                  0x00000000 /* RWI-V */
#define NV_PRMIO_RMA_PTR_SPACE_MEMORY                    0x00000001 /* RW--V */
#define NV_PRMIO_RMA_PTR_ADDRESS                               26:2 /* RWIUF */
#define NV_PRMIO_RMA_PTR_ADDRESS_0                       0x00000000 /* RWI-V */
#define NV_PRMIO_RMA_DATA                                0x00007108 /* RW-4R */
#define NV_PRMIO_RMA_DATA_PORT                                 31:0 /* RWXUF */
#define NV_PRMIO_RMA_DATA32                              0x0000710C /* RW-4R */
#define NV_PRMIO_RMA_DATA32_BYTE2                             23:16 /* RWXUF */
#define NV_PRMIO_RMA_DATA32_BYTE1                              15:8 /* RWXUF */
#define NV_PRMIO_RMA_DATA32_BYTE0                               7:0 /* RWXUF */
/* dev_bus.ref */
#define NV_EXPROM                             0x0000FFFF:0x00000000 /* R---D */
#define NV_EXPROM_BIOS_ROM008(i)                   (0x00000000+(i)) /* RW-1A */
#define NV_EXPROM_BIOS_ROM008__SIZE_1                         65536 /*       */
#define NV_EXPROM_BIOS_ROM008_VALUE                             7:0 /* RW-VF */
#define NV_EXPROM_BIOS_ROM016(i)                 (0x00000000+(i)*2) /* RW-2A */
#define NV_EXPROM_BIOS_ROM016__SIZE_1                         32768 /*       */
#define NV_EXPROM_BIOS_ROM016_VALUE                            15:0 /* RW-VF */
#define NV_EXPROM_BIOS_ROM032(i)                 (0x00000000+(i)*4) /* RW-4A */
#define NV_EXPROM_BIOS_ROM032__SIZE_1                         16384 /*       */
#define NV_EXPROM_BIOS_ROM032_VALUE                            31:0 /* RW-VF */
/* dev_bus.ref */
#define NV_MEMORY                             0xFFFFFFFF:0x00000000 /* RW--D */
/* dev_bus.ref */
#define NV_IO                                 0xFFFFFFFF:0x00000000 /* RW--D */
/* dev_dac.ref */
#define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN                   14:12 /* RWIVF */
#define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_ON           0x00000000 /* RWI-V */
#define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_MPLL         0x00000001 /* RWI-V */
#define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_VPLL         0x00000002 /* RWI-V */
#define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_NVPLL        0x00000004 /* RWI-V */
#define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_OFF          0x00000007 /* RW--V */
#define NV_PRAMDAC_PLL_TEST_COUNTER_SOURCE                    25:24 /* RWIVF */
/* dev_fifo.ref */
#define NV_PFIFO_DELAY_0                                 0x00002040 /* RW-4R */
#define NV_PFIFO_DELAY_0_WAIT_RETRY                             9:0 /* RWIUF */
#define NV_PFIFO_DELAY_0_WAIT_RETRY_0                    0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_TIMESLICE                           0x00002044 /* RW-4R */
#define NV_PFIFO_DMA_TIMESLICE_SELECT                          16:0 /* RWIUF */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_1                  0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_16K                0x00003fff /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_32K                0x00007fff /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_64K                0x0000ffff /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_128K               0x0001ffff /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT                        24:24 /* RWIUF */
#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT_DISABLED          0x00000000 /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLED           0x00000001 /* RWI-V */
#define NV_PFIFO_PIO_TIMESLICE                           0x00002048 /* RW-4R */
#define NV_PFIFO_PIO_TIMESLICE_SELECT                          16:0 /* RWIUF */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_1                  0x00000000 /* RWI-V */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_16K                0x00003fff /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_32K                0x00007fff /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_64K                0x0000ffff /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_128K               0x0001ffff /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT                        24:24 /* RWIUF */
#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT_DISABLED          0x00000000 /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT_ENABLED           0x00000001 /* RWI-V */
#define NV_PFIFO_TIMESLICE                               0x0000204C /* RW-4R */
#define NV_PFIFO_TIMESLICE_TIMER                               17:0 /* RWIUF */
#define NV_PFIFO_TIMESLICE_TIMER_EXPIRED                 0x0003FFFF /* RWI-V */
#define NV_PFIFO_NEXT_CHANNEL                            0x00002050 /* RW-4R */
#define NV_PFIFO_NEXT_CHANNEL_CHID                              4:0 /* RWXUF */
#define NV_PFIFO_NEXT_CHANNEL_MODE                              8:8 /* RWXVF */
#define NV_PFIFO_NEXT_CHANNEL_MODE_PIO                   0x00000000 /* RW--V */
#define NV_PFIFO_NEXT_CHANNEL_MODE_DMA                   0x00000001 /* RW--V */
#define NV_PFIFO_NEXT_CHANNEL_SWITCH                          12:12 /* RWIVF */
#define NV_PFIFO_NEXT_CHANNEL_SWITCH_NOT_PENDING         0x00000000 /* RWI-V */
#define NV_PFIFO_NEXT_CHANNEL_SWITCH_PENDING             0x00000001 /* RW--V */
#define NV_PFIFO_DELAY_1                                 0x00002054 /* RW-4R */
#define NV_PFIFO_DELAY_1_ACQUIRE_WAIT                           9:0 /* RWIUF */
#define NV_PFIFO_DELAY_1_ACQUIRE_WAIT_2                  0x00000002 /* RWI-V */
#define NV_PFIFO_RAMHT                                   0x00002210 /* RW-4R */
#define NV_PFIFO_RAMHT_BASE_ADDRESS                             8:4 /* RWIUF */
#define NV_PFIFO_RAMHT_BASE_ADDRESS_10000                0x00000010 /* RWI-V */
#define NV_PFIFO_RAMHT_SIZE                                   17:16 /* RWIUF */
#define NV_PFIFO_RAMHT_SIZE_4K                           0x00000000 /* RWI-V */
#define NV_PFIFO_RAMHT_SIZE_8K                           0x00000001 /* RW--V */
#define NV_PFIFO_RAMHT_SIZE_16K                          0x00000002 /* RW--V */
#define NV_PFIFO_RAMHT_SIZE_32K                          0x00000003 /* RW--V */
#define NV_PFIFO_RAMHT_SEARCH                                 25:24 /* RWIUF */
#define NV_PFIFO_RAMHT_SEARCH_16                         0x00000000 /* RWI-V */
#define NV_PFIFO_RAMHT_SEARCH_32                         0x00000001 /* RW--V */
#define NV_PFIFO_RAMHT_SEARCH_64                         0x00000002 /* RW--V */
#define NV_PFIFO_RAMHT_SEARCH_128                        0x00000003 /* RW--V */
#define NV_PFIFO_RAMFC                                   0x00002214 /* RW-4R */
#define NV_PFIFO_RAMFC_BASE_ADDRESS                             8:2 /* RWIUF */
#define NV_PFIFO_RAMFC_BASE_ADDRESS_11000                0x00000044 /* RWI-V */
#define NV_PFIFO_RAMFC_SIZE                                   16:16 /* RWIVF */
#define NV_PFIFO_RAMFC_SIZE_1K                           0x00000000 /* RWI-V */
#define NV_PFIFO_RAMFC_SIZE_2K                           0x00000001 /* RW--V */
#define NV_PFIFO_RAMFC_BASE_ADDRESS2                          23:17 /* RWIUF */
#define NV_PFIFO_RAMFC_BASE_ADDRESS_11400                0x00000045 /* RWI-V */
#define NV_PFIFO_RAMRO                                   0x00002218 /* RW-4R */
#define NV_PFIFO_RAMRO_BASE_ADDRESS                             8:1 /* RWIUF */
#define NV_PFIFO_RAMRO_BASE_ADDRESS_11200                0x00000089 /* RWI-V */
#define NV_PFIFO_RAMRO_BASE_ADDRESS_11400                0x0000008A /* RWI-V */
#define NV_PFIFO_RAMRO_BASE_ADDRESS_11500                0x0000008B /* RWI-V */
#define NV_PFIFO_RAMRO_BASE_ADDRESS_11800                0x0000008C /* RW--V */
#define NV_PFIFO_RAMRO_BASE_ADDRESS_12000                0x00000090 /* RW--V */
#define NV_PFIFO_RAMRO_SIZE                                   16:16 /* RWIVF */
#define NV_PFIFO_RAMRO_SIZE_512                          0x00000000 /* RWI-V */
#define NV_PFIFO_RAMRO_SIZE_8K                           0x00000001 /* RW--V */
#define NV_PFIFO_MODE                                    0x00002504 /* RW-4R */
#define NV_PFIFO_MODE_CHANNEL_0                                 0:0 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_0_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_0_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_1                                 1:1 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_1_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_1_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_2                                 2:2 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_2_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_2_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_3                                 3:3 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_3_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_3_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_4                                 4:4 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_4_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_4_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_5                                 5:5 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_5_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_5_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_6                                 6:6 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_6_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_6_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_7                                 7:7 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_7_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_7_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_8                                 8:8 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_8_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_8_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_9                                 9:9 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_9_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_9_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_10                              10:10 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_10_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_10_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_11                              11:11 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_11_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_11_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_12                              12:12 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_12_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_12_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_13                              13:13 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_13_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_13_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_14                              14:14 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_14_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_14_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_15                              15:15 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_15_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_15_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_16                              16:16 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_16_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_16_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_17                              17:17 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_17_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_17_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_18                              18:18 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_18_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_18_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_19                              19:19 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_19_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_19_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_20                              20:20 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_20_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_20_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_21                              21:21 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_21_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_21_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_22                              22:22 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_22_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_22_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_23                              23:23 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_23_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_23_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_24                              24:24 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_24_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_24_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_25                              25:25 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_25_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_25_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_26                              26:26 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_26_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_26_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_27                              27:27 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_27_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_27_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_28                              28:28 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_28_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_28_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_29                              29:29 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_29_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_29_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_30                              30:30 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_30_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_30_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_31                              31:31 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_31_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_31_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_DMA                                     0x00002508 /* RW-4R */
#define NV_PFIFO_DMA_CHANNEL_0                                  0:0 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_0_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_0_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_1                                  1:1 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_1_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_1_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_2                                  2:2 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_2_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_2_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_3                                  3:3 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_3_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_3_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_4                                  4:4 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_4_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_4_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_5                                  5:5 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_5_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_5_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_6                                  6:6 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_6_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_6_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_7                                  7:7 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_7_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_7_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_8                                  8:8 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_8_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_8_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_9                                  9:9 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_9_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_9_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_10                               10:10 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_10_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_10_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_11                               11:11 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_11_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_11_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_12                               12:12 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_12_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_12_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_13                               13:13 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_13_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_13_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_14                               14:14 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_14_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_14_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_15                               15:15 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_15_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_15_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_16                               16:16 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_16_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_16_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_17                               17:17 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_17_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_17_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_18                               18:18 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_18_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_18_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_19                               19:19 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_19_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_19_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_20                               20:20 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_20_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_20_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_21                               21:21 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_21_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_21_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_22                               22:22 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_22_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_22_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_23                               23:23 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_23_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_23_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_24                               24:24 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_24_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_24_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_25                               25:25 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_25_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_25_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_26                               26:26 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_26_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_26_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_27                               27:27 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_27_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_27_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_28                               28:28 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_28_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_28_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_29                               29:29 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_29_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_29_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_30                               30:30 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_30_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_30_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_31                               31:31 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_31_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_31_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_SIZE                                    0x0000250C /* RW-4R */
#define NV_PFIFO_SIZE_CHANNEL_0                                 0:0 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_0_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_0_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_1                                 1:1 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_1_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_1_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_2                                 2:2 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_2_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_2_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_3                                 3:3 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_3_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_3_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_4                                 4:4 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_4_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_4_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_5                                 5:5 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_5_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_5_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_6                                 6:6 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_6_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_6_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_7                                 7:7 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_7_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_7_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_8                                 8:8 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_8_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_8_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_9                                 9:9 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_9_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_9_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_10                              10:10 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_10_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_10_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_11                              11:11 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_11_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_11_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_12                              12:12 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_12_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_12_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_13                              13:13 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_13_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_13_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_14                              14:14 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_14_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_14_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_15                              15:15 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_15_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_15_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_16                              16:16 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_16_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_16_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_17                              17:17 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_17_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_17_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_18                              18:18 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_18_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_18_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_19                              19:19 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_19_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_19_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_20                              20:20 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_20_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_20_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_21                              21:21 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_21_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_21_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_22                              22:22 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_22_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_22_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_23                              23:23 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_23_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_23_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_24                              24:24 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_24_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_24_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_25                              25:25 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_25_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_25_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_26                              26:26 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_26_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_26_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_27                              27:27 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_27_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_27_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_28                              28:28 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_28_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_28_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_29                              29:29 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_29_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_29_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_30                              30:30 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_30_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_30_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_31                              31:31 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_31_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_31_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH                        0x00003224 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG                          7:3 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_8_BYTES           0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_16_BYTES          0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_24_BYTES          0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_32_BYTES          0x00000003 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_40_BYTES          0x00000004 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_48_BYTES          0x00000005 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_56_BYTES          0x00000006 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_64_BYTES          0x00000007 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_72_BYTES          0x00000008 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_80_BYTES          0x00000009 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_88_BYTES          0x0000000A /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_96_BYTES          0x0000000B /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_104_BYTES         0x0000000C /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_112_BYTES         0x0000000D /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_120_BYTES         0x0000000E /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES         0x0000000F /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_136_BYTES         0x00000010 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_144_BYTES         0x00000011 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_152_BYTES         0x00000012 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_160_BYTES         0x00000013 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_168_BYTES         0x00000014 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_176_BYTES         0x00000015 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_184_BYTES         0x00000016 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_192_BYTES         0x00000017 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_200_BYTES         0x00000018 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_208_BYTES         0x00000019 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_216_BYTES         0x0000001A /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_224_BYTES         0x0000001B /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_232_BYTES         0x0000001C /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_240_BYTES         0x0000001D /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_248_BYTES         0x0000001E /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_256_BYTES         0x0000001F /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE                        15:13 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_32_BYTES          0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_64_BYTES          0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_96_BYTES          0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES         0x00000003 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_160_BYTES         0x00000004 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_192_BYTES         0x00000005 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_224_BYTES         0x00000006 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_256_BYTES         0x00000007 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS                    20:16 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_0             0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_1             0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_2             0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_3             0x00000003 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_4             0x00000004 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_5             0x00000005 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_6             0x00000006 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_7             0x00000007 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8             0x00000008 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_9             0x00000009 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_10            0x0000000A /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_11            0x0000000B /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_12            0x0000000C /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_13            0x0000000D /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_14            0x0000000E /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_15            0x0000000F /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_ENDIAN                      31:31 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_FETCH_ENDIAN_LITTLE          0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_FETCH_ENDIAN_BIG             0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_PUT_OFFSET                         28:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_GET_OFFSET                         28:2 /* RWXUF */
#define NV_PFIFO_CACHE1_REF                              0x00003248 /* RW-4R */
#define NV_PFIFO_CACHE1_REF_CNT                                31:0 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_DCOUNT                       0x000032A0 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_DCOUNT_VALUE                       12:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_GET_JMP_SHADOW               0x000032A4 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_GET_JMP_SHADOW_OFFSET              28:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_RSVD_SHADOW                  0x000032A8 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_RSVD_SHADOW_CMD                    31:0 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_TYPE                   0:0 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_TYPE_INC        0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_TYPE_NON_INC    0x00000001 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD                       12:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE_SUBCHANNEL                  15:13 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_COUNT                28:18 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_COUNT_0         0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR                       31:30 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_NONE             0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_NON_CACHE        0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_RESERVED_CMD     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_PROTECTION       0x00000003 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_INSTANCE                     0x0000322C /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_INSTANCE_ADDRESS                   15:0 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL                          0x00003230 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_CTL_ADJUST                         11:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE                    12:12 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE_NOT_PRESENT   0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE_PRESENT       0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY                    13:13 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY_NOT_LINEAR    0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY_LINEAR        0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE                   17:16 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_NVM          0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_PCI          0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_AGP          0x00000003 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO                       31:31 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO_INVALID          0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO_VALID            0x00000001 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_LIMIT                        0x00003234 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_LIMIT_OFFSET                       28:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG                      0x00003238 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG_ADDRESS                   28:12 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE                       0:0 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE_INVALID        0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE_VALID          0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_TLB_PTE                      0x0000323C /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_TLB_PTE_FRAME_ADDRESS             31:12 /* RWXUF */
#define NV_PFIFO_DEVICE(i)                       (0x00002800+(i)*4) /* R--4A */
#define NV_PFIFO_DEVICE__SIZE_1                                 128 /*       */
#define NV_PFIFO_DEVICE_CHID                                    4:0 /* R--UF */
#define NV_PFIFO_DEVICE_SWITCH                                24:24 /* R--VF */
#define NV_PFIFO_DEVICE_SWITCH_UNAVAILABLE               0x00000000 /* R---V */
#define NV_PFIFO_DEVICE_SWITCH_AVAILABLE                 0x00000001 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS                           0x00002400 /* R--4R */
#define NV_PFIFO_RUNOUT_STATUS_RANOUT                           0:0 /* R--VF */
#define NV_PFIFO_RUNOUT_STATUS_RANOUT_FALSE              0x00000000 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_RANOUT_TRUE               0x00000001 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK                         4:4 /* R--VF */
#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK_NOT_EMPTY        0x00000000 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK_EMPTY            0x00000001 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK                        8:8 /* R--VF */
#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK_NOT_FULL        0x00000000 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK_FULL            0x00000001 /* R---V */
#define NV_PFIFO_RUNOUT_PUT                              0x00002410 /* RW-4R */
#define NV_PFIFO_RUNOUT_PUT_ADDRESS                            12:3 /* RWXUF */
#define NV_PFIFO_RUNOUT_PUT_ADDRESS__SIZE_0                     8:3 /* RWXUF */
#define NV_PFIFO_RUNOUT_PUT_ADDRESS__SIZE_1                    12:3 /* RWXUF */
#define NV_PFIFO_RUNOUT_GET                              0x00002420 /* RW-4R */
#define NV_PFIFO_RUNOUT_GET_ADDRESS                            13:3 /* RWXUF */
/* dev_ram.ref */
#define NV_PNVM                               0x0FFFFFFF:0x08000000 /* RW--M */
#define NV_PNVM_DATA032(i)                       (0x08000000+(i)*4) /* RW-4A */
#define NV_PNVM_DATA032__SIZE_1                            33554432 /*       */
#define NV_PNVM_DATA032_VALUE                                  31:0 /* RWXVF */
#define NV_PNVM_DATA016(i)           (0x08000000+((i)/3)*4+((i)%3)) /* RW-2A */
#define NV_PNVM_DATA016__SIZE_1                           67108864  /*       */
#define NV_PNVM_DATA016_VALUE                                  15:0 /* RWXVF */
#define NV_PNVM_DATA008(i)                         (0x08000000+(i)) /* RW-1A */
#define NV_PNVM_DATA008__SIZE_1                           134217728 /*       */
#define NV_PNVM_DATA008_VALUE                                   7:0 /* RWXVF */
/* dev_ram.ref */
#define NV_PRAMIN                             0x007FFFFF:0x00700000 /* RW--M */
#define NV_PRAMIN_CONTEXT_0                   ( 0*32+31):( 0*32+ 0) /*       */
#define NV_PRAMIN_CONTEXT_1                   ( 1*32+31):( 1*32+ 0) /*       */
#define NV_PRAMIN_CONTEXT_2                   ( 2*32+31):( 2*32+ 0) /*       */
#define NV_PRAMIN_CONTEXT_3                   ( 3*32+31):( 3*32+ 0) /*       */
#define NV_PRAMIN_RAMHT_0                     0x00710FFF:0x00710000 /* RW--M */
#define NV_PRAMIN_RAMFC_0                     0x007113FF:0x00711000 /* RW--M */
#define NV_PRAMIN_RAMRO_0                     0x007115FF:0x00711400 /* RW--M */
#define NV_PRAMIN_CTX_0(i)                    (0x00700000 + (i)*16) /* RW--M */
#define NV_PRAMIN_CTX_0__SIZE_1                             0x10000 /*       */
#define NV_PRAMIN_CTX_0_NVCLASS                                11:0 /* RWXUF */
#define NV_PRAMIN_CTX_0_NVCLASS_NV_ROOT                  0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_NVCLASS_012                      0x00000012 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_017                      0x00000017 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_018                      0x00000018 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_019                      0x00000019 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_01C                      0x0000001C /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_01D                      0x0000001D /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_01E                      0x0000001E /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_01F                      0x0000001F /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_021                      0x00000021 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_030                      0x00000030 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_036                      0x00000036 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_037                      0x00000037 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_038                      0x00000038 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_039                      0x00000039 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_042                      0x00000042 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_043                      0x00000043 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_044                      0x00000044 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_048                      0x00000048 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_04A                      0x0000004A /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_04B                      0x0000004B /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_052                      0x00000052 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_053                      0x00000053 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_054                      0x00000054 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_055                      0x00000055 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_057                      0x00000057 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_058                      0x00000058 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_059                      0x00000059 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_05A                      0x0000005A /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_05B                      0x0000005B /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_05C                      0x0000005C /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_05E                      0x0000005E /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_05F                      0x0000005F /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_060                      0x00000060 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_061                      0x00000061 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_064                      0x00000064 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_065                      0x00000065 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_066                      0x00000066 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_067                      0x00000067 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_072                      0x00000072 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_076                      0x00000076 /* RWC-V */
#define NV_PRAMIN_CTX_0_NVCLASS_077                      0x00000077 /* RWC-V */
#define NV_PRAMIN_CTX_0_CHROMA_KEY                            12:12 /* RWXUF */
#define NV_PRAMIN_CTX_0_CHROMA_KEY_DISABLE               0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_CHROMA_KEY_ENABLE                0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_USER_CLIP                             13:13 /* RWXUF */
#define NV_PRAMIN_CTX_0_USER_CLIP_DISABLE                0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_USER_CLIP_ENABLE                 0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_SWIZZLE                               14:14 /* RWXUF */
#define NV_PRAMIN_CTX_0_SWIZZLE_DISABLE                  0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_SWIZZLE_ENABLE                   0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_PATCH_CONFIG                          17:15 /* RWXUF */
#define NV_PRAMIN_CTX_0_PATCH_CONFIG_SRCCOPY_AND         0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_PATCH_CONFIG_ROP_AND             0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_PATCH_CONFIG_BLEND_AND           0x00000002 /* RW--V */
#define NV_PRAMIN_CTX_0_PATCH_CONFIG_SRCCOPY             0x00000003 /* RW--V */
#define NV_PRAMIN_CTX_0_PATCH_CONFIG_SRCCOPY_PRE         0x00000004 /* RW--V */
#define NV_PRAMIN_CTX_0_PATCH_CONFIG_BLEND_PRE           0x00000005 /* RW--V */
#define NV_PRAMIN_CTX_0_DITHER_MODE                           21:20 /* RWXUF */
#define NV_PRAMIN_CTX_0_DITHER_MODE_COMPATIBILITY        0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_DITHER_MODE_DITHER               0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_DITHER_MODE_TRUNCATE             0x00000002 /* RW--V */
#define NV_PRAMIN_CTX_0_DITHER_MODE_SUBTRACT_TRUNCATE    0x00000003 /* RW--V */
#define NV_PRAMIN_CTX_0_SINGLE_STEP                           23:23 /* RWXUF */
#define NV_PRAMIN_CTX_0_SINGLE_STEP_DISABLE              0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_SINGLE_STEP_ENABLE               0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_PATCH_STATUS                          24:24 /* RWXUF */
#define NV_PRAMIN_CTX_0_PATCH_STATUS_INVALID             0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_PATCH_STATUS_VALID               0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE                       25:25 /* RWXUF */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE_INVALID          0x00000000 /* RW--V */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE_VALID            0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE0                      25:25 /* RWXUF */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE0_INVALID         0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE0_VALID           0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE1                      26:26 /* RWXUF */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE1_INVALID         0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_CONTEXT_SURFACE1_VALID           0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_CONTEXT_PATTERN                       27:27 /* RWXUF */
#define NV_PRAMIN_CTX_0_CONTEXT_PATTERN_INVALID          0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_CONTEXT_PATTERN_VALID            0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_CONTEXT_ROP                           28:28 /* RWXUF */
#define NV_PRAMIN_CTX_0_CONTEXT_ROP_INVALID              0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_CONTEXT_ROP_VALID                0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_CONTEXT_BETA1                         29:29 /* RWXUF */
#define NV_PRAMIN_CTX_0_CONTEXT_BETA1_INVALID            0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_CONTEXT_BETA1_VALID              0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_0_CONTEXT_BETA4                         30:30 /* RWXUF */
#define NV_PRAMIN_CTX_0_CONTEXT_BETA4_INVALID            0x00000000 /* RWD-V */
#define NV_PRAMIN_CTX_0_CONTEXT_BETA4_VALID              0x00000001 /* RW--V */
#define NV_PRAMIN_CTX_1(i)                    (0x00700004 + (i)*16) /* RW--M */
#define NV_PRAMIN_CTX_1__SIZE_1                             0x10000 /*       */
#define NV_PRAMIN_CTX_1_MONO_FORMAT                             7:0 /* RWXUF */
#define NV_PRAMIN_CTX_1_MONO_FORMAT_INVALID                    0x00 /* RWD-V */
#define NV_PRAMIN_CTX_1_MONO_FORMAT_CGA6_M1                    0x01 /* RW--V */
#define NV_PRAMIN_CTX_1_MONO_FORMAT_LE_M1                      0x02 /* RW--V */
#define NV_PRAMIN_CTX_1_MONO_FORMAT_018                        0x01 /* RWC-V */
#define NV_PRAMIN_CTX_1_MONO_FORMAT_044                        0x01 /* RWC-V */
#define NV_PRAMIN_CTX_1_MONO_FORMAT_04A                        0x01 /* RWC-V */
#define NV_PRAMIN_CTX_1_MONO_FORMAT_04B                        0x01 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT                           15:8 /* RWXUF */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_INVALID                   0x00 /* RWD-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_Y8                     0x01 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X16A8Y8                0x02 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X24Y8                  0x03 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_A1R5G5B5               0x06 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X1R5G5B5               0x07 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X16A1R5G5B5            0x08 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X17R5G5B5              0x09 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_R5G6B5                 0x0A /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_A16R5G6B5              0x0B /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X16R5G6B5              0x0C /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_A8R8G8B8               0x0D /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X8R8G8B8               0x0E /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_Y16                    0x0F /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_A16Y16                 0x10 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X16Y16                 0x11 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_V8YB8U8YA8             0x12 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_YB8V8YA8U8             0x13 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_Y32                    0x14 /* RW--V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_017                 0x00000002 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_018                 0x00000002 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_01C                 0x00000003 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_01D                 0x00000003 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_01E                 0x00000003 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_021                 0x00000001 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_036                 0x00000001 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_037                 0x00000006 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_044                 0x0000000B /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_04A                 0x0000000C /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_04B                 0x00000003 /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_057                 0x0000000B /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_05C                 0x0000000C /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_05D                 0x0000000C /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_05E                 0x0000000C /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_060                 0x0000000A /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_061                 0x0000000A /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_076                 0x0000000A /* RWC-V */
#define NV_PRAMIN_CTX_1_COLOR_FORMAT_077                 0x00000006 /* RWC-V */
#define NV_PRAMIN_CTX_1_NOTIFY_INSTANCE                       31:16 /* RWXUF */
#define NV_PRAMIN_CTX_1_NOTIFY_INSTANCE_INVALID              0x0000 /* RWD-V */
#define NV_PRAMIN_CTX_2(i)                    (0x00700008 + (i)*16) /* RW--M */
#define NV_PRAMIN_CTX_2__SIZE_1                             0x10000 /*       */
#define NV_PRAMIN_CTX_2_DMA_0_INSTANCE                         15:0 /* RWXUF */
#define NV_PRAMIN_CTX_2_DMA_0_INSTANCE_INVALID               0x0000 /* RWD-V */
#define NV_PRAMIN_CTX_2_DMA_1_INSTANCE                        31:16 /* RWXUF */
#define NV_PRAMIN_CTX_2_DMA_1_INSTANCE_INVALID               0x0000 /* RWD-V */
#define NV_PRAMIN_CTX_3(i)                    (0x0070000C + (i)*16) /* RW--M */
#define NV_PRAMIN_CTX_3__SIZE_1                             0x10000 /*       */
#define NV_PRAMIN_CTX_3_METHOD_TRAPS                           31:0 /* RWXUF */
#define NV_PRAMIN_CTX_3_METHOD_TRAPS_DISABLED            0x00000000 /* RWD-V */
#define NV_PRAMIN_DATA032(i)                     (0x00700000+(i)*4) /* RW-4A */
#define NV_PRAMIN_DATA032__SIZE_1                            524288 /*       */
#define NV_PRAMIN_DATA032_VALUE                                31:0 /* RWXVF */
#define NV_PRAMIN_DATA016(i)         (0x00700000+((i)/3)*4+((i)%3)) /* RW-2A */
#define NV_PRAMIN_DATA016__SIZE_1                           1572864 /*       */
#define NV_PRAMIN_DATA016_VALUE                                15:0 /* RWXVF */
#define NV_PRAMIN_DATA008(i)                       (0x00700000+(i)) /* RW-1A */
#define NV_PRAMIN_DATA008__SIZE_1                           2097152 /*       */
#define NV_PRAMIN_DATA008_VALUE                                 7:0 /* RWXVF */
/* dev_ram.ref */
#define NV_FIFO_DMA_OPCODE                    ( 0*32+31):( 0*32+29) /* RWXUF */
#define NV_FIFO_DMA_OPCODE_METHOD                        0x00000000 /* ----V */
#define NV_FIFO_DMA_OPCODE_JUMP                          0x00000001 /* ----V */
#define NV_FIFO_DMA_OPCODE_NONINC_METHOD                 0x00000002 /* ----V */
#define NV_FIFO_DMA_METHOD_COUNT              ( 0*32+28):( 0*32+18) /* RWXUF */
#define NV_FIFO_DMA_METHOD_SUBCHANNEL         ( 0*32+15):( 0*32+13) /* RWXUF */
#define NV_FIFO_DMA_METHOD_ADDRESS            ( 0*32+12):( 0*32+ 2) /* RWXUF */
#define NV_FIFO_DMA_DATA                      ( 1*32+31):( 1*32+ 0) /* RWXUF */
#define NV_FIFO_DMA_JUMP_OFFSET                                28:2 /* RWXUF */
/* dev_ram.ref */
#define NV_PRAM                               0x00006FFF:0x00006000 /* RW--D */
/* dev_fifo.ref */
#define NV_USER                               0x00FFFFFF:0x00800000 /* RW--D */
#define NV_USER_OBJECT(i,j)     (0x00800000+(i)*0x10000+(j)*0x2000) /* -W-4A */
#define NV_USER_OBJECT__SIZE_1                                   32 /*       */
#define NV_USER_OBJECT__SIZE_2                                    8 /*       */
#define NV_USER_OBJECT_HANDLE                                  31:0 /* -W-VF */
#define NV_USER_FREE016(i,j)        (0x00800010+(i)*65536+(j)*8192) /* R--2A */
#define NV_USER_FREE016__SIZE_1                                  32 /*       */
#define NV_USER_FREE016__SIZE_2                                   8 /*       */
#define NV_USER_FREE016_COUNT_LO                                1:0 /* C--UF */
#define NV_USER_FREE016_COUNT_LO_0                       0x00000000 /* C---V */
#define NV_USER_FREE016_COUNT                                   9:2 /* R--UF */
#define NV_USER_FREE016_COUNT_HI                              15:10 /* C--UF */
#define NV_USER_FREE016_COUNT_HI_0                       0x00000000 /* C---V */
#define NV_USER_FREE032(i,j)        (0x00800010+(i)*65536+(j)*8192) /* R--4A */
#define NV_USER_FREE032__SIZE_1                                  32 /*       */
#define NV_USER_FREE032__SIZE_2                                   8 /*       */
#define NV_USER_FREE032_COUNT_LO                                1:0 /* C--UF */
#define NV_USER_FREE032_COUNT_LO_0                       0x00000000 /* C---V */
#define NV_USER_FREE032_COUNT                                   9:2 /* R--UF */
#define NV_USER_FREE032_COUNT_HI                              31:10 /* C--UF */
#define NV_USER_FREE032_COUNT_HI_0                       0x00000000 /* C---V */
#define NV_USER_ZERO016(i,j,k) (0x0800012+(i)*65536+(j)*8192+(k)*2) /* R--2A */
#define NV_USER_ZERO016__SIZE_1                                  32 /*       */
#define NV_USER_ZERO016__SIZE_2                                   8 /*       */
#define NV_USER_ZERO016__SIZE_3                                   7 /*       */
#define NV_USER_ZERO016_COUNT                                  15:0 /* C--UF */
#define NV_USER_ZERO016_COUNT_0                          0x00000000 /* C---V */
#define NV_USER_ZERO032(i,j,k) (0x0800014+(i)*65536+(j)*8192+(k)*4) /* R--4A */
#define NV_USER_ZERO032__SIZE_1                                  32 /*       */
#define NV_USER_ZERO032__SIZE_2                                   8 /*       */
#define NV_USER_ZERO032__SIZE_3                                   3 /*       */
#define NV_USER_ZERO032_COUNT                                  31:0 /* C--UF */
#define NV_USER_ZERO032_COUNT_0                          0x00000000 /* C---V */
#define NV_USER_DMA_PUT(i,j)    (0x00800040+(i)*0x10000+(j)*0x2000) /* -W-4A */
#define NV_USER_DMA_PUT__SIZE_1                                  32 /*       */
#define NV_USER_DMA_PUT__SIZE_2                                   8 /*       */
#define NV_USER_DMA_PUT_OFFSET                                 28:2 /* -WXUF */
#define NV_USER_DMA_GET(i,j)    (0x00800044+(i)*0x10000+(j)*0x2000) /* R--4A */
#define NV_USER_DMA_GET__SIZE_1                                  32 /*       */
#define NV_USER_DMA_GET__SIZE_2                                   8 /*       */
#define NV_USER_DMA_GET_OFFSET                                 28:2 /* R-XUF */
#define NV_USER_REF(i,j)        (0x00800048+(i)*0x10000+(j)*0x2000) /* R--4A */
#define NV_USER_REF__SIZE_1                                      32 /*       */
#define NV_USER_REF__SIZE_2                                       8 /*       */
#define NV_USER_REF_CNT                                        31:0 /* R-XUF */
/* dev_vga.ref */
#define NV_CIO_CRE_FFLWM_LWM                                    7:0 /* RW--F */
#define NV_CIO_GPIO0__INDEX                              0x00000034 /*       */
#define NV_CIO_GPIO1__INDEX                              0x00000035 /*       */
#define NV_CIO_CRE_DDC0_STATUS__INDEX                    0x00000036 /*       */
#define NV_CIO_CRE_DDC0_WR__INDEX                        0x00000037 /*       */
/* dev_graphics.ref */
#define NV_PGRAPH_DEBUG_0                                0x00400080 /* RW-4R */
#define NV_PGRAPH_DEBUG_0_STATE                                 0:0 /* CWIVF */
#define NV_PGRAPH_DEBUG_0_STATE_NORMAL                   0x00000000 /* CWI-V */
#define NV_PGRAPH_DEBUG_0_STATE_RESET                    0x00000001 /* -W--T */
#define NV_PGRAPH_DEBUG_0_FE_2D_STATE                           1:1 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_FE_2D_STATE_NORMAL             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_FE_2D_STATE_RESET              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_FE_3D_STATE                           2:2 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_FE_3D_STATE_NORMAL             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_FE_3D_STATE_RESET              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_CACHE_STATE                           3:3 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_CACHE_STATE_NORMAL             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_CACHE_STATE_RESET              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_PREROP_STATE                          4:4 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_PREROP_STATE_NORMAL            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_PREROP_STATE_RESET             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_ROP_STATE                             5:5 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_ROP_STATE_NORMAL               0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_ROP_STATE_RESET                0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_RSTR_3D_STATE                         6:6 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_RSTR_3D_STATE_NORMAL           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_RSTR_3D_STATE_RESET            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_LIGHT_STATE                           7:7 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_LIGHT_STATE_NORMAL             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_LIGHT_STATE_RESET              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_DMA_STATE                             8:8 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_DMA_STATE_NORMAL               0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_DMA_STATE_RESET                0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_RSTR_2D_STATE                         9:9 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_RSTR_2D_STATE_NORMAL           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_RSTR_2D_STATE_RESET            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_SETUP_STATE                         10:10 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_SETUP_STATE_NORMAL             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_SETUP_STATE_RESET              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_TEXMATH_STATE                       11:11 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_TEXMATH_STATE_NORMAL           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_TEXMATH_STATE_RESET            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_CFIFO_STATE                         12:12 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_CFIFO_STATE_NORMAL             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_CFIFO_STATE_RESET              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_PIPE_STATE                          13:13 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_PIPE_STATE_NORMAL              0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_PIPE_STATE_RESET               0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_COLOR_STATE                         14:14 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_COLOR_STATE_NORMAL             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_COLOR_STATE_RESET              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_XF_STATE                            15:15 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_XF_STATE_NORMAL                0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_XF_STATE_RESET                 0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_IDX_STATE                           16:16 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_IDX_STATE_NORMAL               0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_IDX_STATE_RESET                0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_0_VTX_STATE                           17:17 /* RWIVF */
#define NV_PGRAPH_DEBUG_0_VTX_STATE_NORMAL               0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_0_VTX_STATE_RESET                0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1                                0x00400084 /* RW-4R */
#define NV_PGRAPH_DEBUG_1_VOLATILE_RESET                        0:0 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_VOLATILE_RESET_NOT_LAST        0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_VOLATILE_RESET_LAST            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_VOLATILE_RESET_INIT            0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_1_DMA_ACTIVITY                          4:4 /* CWIVF */
#define NV_PGRAPH_DEBUG_1_DMA_ACTIVITY_IGNORE            0x00000000 /* CWI-V */
#define NV_PGRAPH_DEBUG_1_DMA_ACTIVITY_CANCEL            0x00000001 /* -W--T */
#define NV_PGRAPH_DEBUG_1_VTX_PTE                               8:8 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_VTX_PTE_DISABLED               0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_VTX_PTE_ENABLED                0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_VTX_PTE_INIT                   0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_VTX_CACHE                             9:9 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_VTX_CACHE_DISABLED             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_VTX_CACHE_ENABLED              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_VTX_CACHE_INIT                 0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_VTX_FILE                            10:10 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_VTX_FILE_DISABLED              0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_VTX_FILE_ENABLED               0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_VTX_FILE_INIT                  0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_XF_ASYNC                            12:12 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_XF_ASYNC_DISABLED              0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_XF_ASYNC_ENABLED               0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_LT_ASYNC                            13:13 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_LT_ASYNC_DISABLED              0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_LT_ASYNC_ENABLED               0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_DRAWDIR_AUTO                        14:14 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_DRAWDIR_AUTO_DISABLED          0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_DRAWDIR_AUTO_ENABLED           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_DRAWDIR_AUTO_INIT              0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_1_DRAWDIR_Y                           15:15 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_DRAWDIR_Y_DECR                 0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_DRAWDIR_Y_INCR                 0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_DRAWDIR_Y_INIT                 0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_INSTANCE                            16:16 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_INSTANCE_DISABLED              0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_INSTANCE_ENABLED               0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_INSTANCE_INIT                  0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_CTX                                 20:20 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_CTX_DISABLED                   0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_CTX_ENABLED                    0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_CTX_INIT                       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_BIG_ENDIAN_FB                       21:21 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_BIG_ENDIAN_FB_FOLLOW_OBJECT    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_BIG_ENDIAN_FB_TRUE             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_BIG_ENDIAN_FB_INIT             0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_1_BIG_ENDIAN_DMA                      22:22 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_BIG_ENDIAN_DMA_FOLLOW_OBJECT   0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_BIG_ENDIAN_DMA_TRUE            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_BIG_ENDIAN_DMA_INIT            0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_1_CACHE                               24:24 /* CWIVF */
#define NV_PGRAPH_DEBUG_1_CACHE_IGNORE                   0x00000000 /* CWI-V */
#define NV_PGRAPH_DEBUG_1_CACHE_INVALIDATE               0x00000001 /* -W--T */
#define NV_PGRAPH_DEBUG_1_CACHE_COUNTERS                      25:25 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_CACHE_COUNTERS_DISABLED        0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_CACHE_COUNTERS_ENABLED         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_CACHE_NO_COALESCE                   26:26 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_CACHE_NO_COALESC_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_CACHE_NO_COALESC_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_CACHE_FORCE_MISS                    27:27 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_CACHE_FORCE_MISS_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_CACHE_FORCE_MISS_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_CACHE_FORCE_HIT                     28:28 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_CACHE_FORCE_HIT_DISABLED       0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_CACHE_FORCE_HIT_ENABLED        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_TEXTURE_BYPASS                      29:29 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_TEXTURE_BYPASS_DISABLED        0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_TEXTURE_BYPASS_ENABLED         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_TEXTURE_CHECKERBOARD                30:30 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_TEXTURE_CHECKERBOARD_DISABLED  0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_TEXTURE_CHECKERBOARD_ENABLED   0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_1_SMART_PALETTE_LOAD                  31:31 /* RWIVF */
#define NV_PGRAPH_DEBUG_1_SMART_PALETTE_LOAD_DISABLED    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_1_SMART_PALETTE_LOAD_ENABLED     0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2                                0x00400088 /* RW-4R */
#define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_CHECK                    0:0 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_CHECK_DISABLED    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_CHECK_ENABLED     0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_CHECK_INIT        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_INT                      1:1 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_INT_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_INT_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_INT_INIT          0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_OVRFLW_INT                     2:2 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_OVRFLW_INT_DISABLED     0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_OVRFLW_INT_ENABLED      0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_OVRFLW_INT_INIT         0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_COALESCE_3D                    3:3 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_COALESCE_3D_DISABLED    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_COALESCE_3D_ENABLED     0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_COALESCE_3D_INIT        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_COALESCE_2D                    4:4 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_COALESCE_2D_DISABLED    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_COALESCE_2D_ENABLED     0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_COALESCE_2D_INIT        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_TRIEND_FLUSH                   5:5 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_TRIEND_FLUSH_DISABLED   0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_TRIEND_FLUSH_ENABLED    0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_TRIEND_FLUSH_INIT       0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_3D                      6:6 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_3D_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_3D_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_3D_INIT          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_2D                      7:7 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_2D_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_2D_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_2D_INIT          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH                    9:8 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_DISABLED    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_AUTO1       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_AUTO2       0x00000002 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_ENABLED     0x00000003 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_INIT        0x00000002 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_SWALLOW_REQS                 10:10 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_SWALLOW_REQS_DISABLED   0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_SWALLOW_REQS_ENABLED    0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_SWALLOW_REQS_INIT       0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_ALPHA_ABORT                  11:11 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_ALPHA_ABORT_DISABLED    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_ALPHA_ABORT_ENABLED     0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_ALPHA_ABORT_INIT        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_FIXED_ADRS                   12:12 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_FIXED_ADRS_DISABLED     0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_FIXED_ADRS_ENABLED      0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_FIXED_ADRS_INIT         0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_RANGE                 13:13 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_RANGE_DISABLED   0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_RANGE_ENABLED    0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_DITHER_RANGE_INIT       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_2D               14:14 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_2D_DISABLED 0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_2D_ENABLED  0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_2D_INIT     0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_3D               15:15 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_3D_DISABLED 0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_3D_ENABLED  0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_3D_INIT     0x00000000 /* RW--V */
// NV10/NV15
#define NV_PGRAPH_DEBUG_2_ROP_SPARE1                          16:16 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_SPARE1_DISABLED            0x00000000 /* RWI-V */
// NV11
#define NV_PGRAPH_DEBUG_2_ROP_NV11_OPTS                       16:16 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_NV11_OPTS_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_NV11_OPTS_ENABLED          0x00000001 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_NV11_OPTS_INIT             0x00000001 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_TILEVIOL                        17:17 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_TILEVIOL_DISABLED          0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_TILEVIOL_ENABLED           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_TILEVIOL_INIT              0x00000000 /* RW0-V */
#define NV_PGRAPH_DEBUG_2_ROP_SEP_ZC_READS                    18:18 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_SEP_ZC_READS_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_SEP_ZC_READS_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_SEP_ZC_READS_INIT          0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_DITHER_3D                       19:19 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_DITHER_3D_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_DITHER_3D_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_DITHER_3D_INIT             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_DITHER_2D                       20:20 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_DITHER_2D_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_DITHER_2D_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_DITHER_2D_INIT             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_EARLY_ZABORT                    21:21 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_EARLY_ZABORT_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_EARLY_ZABORT_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_EARLY_ZABORT_INIT          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_BLIT_MULTILINE                  22:22 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_BLIT_MULTILINE_DISABLED    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_BLIT_MULTILINE_ENABLED     0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_BLIT_MULTILINE_INIT        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_BLIT_DST_LIMIT                  23:23 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_BLIT_DST_LIMIT_DISABLED    0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_BLIT_DST_LIMIT_ENABLED     0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_BLIT_DST_LIMIT_INIT        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_SDR_FAST_BLEND                  24:24 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_SDR_FAST_BLEND_DISABLED    0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_SDR_FAST_BLEND_ENABLED     0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_SDR_FAST_BLEND_INIT        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_2D_FAST_CONV                    25:25 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_2D_FAST_CONV_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_2D_FAST_CONV_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_2D_FAST_CONV_INIT          0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_HPREQ                           26:26 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_HPREQ_DISABLED             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_HPREQ_ENABLED              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_HPREQ_INIT                 0x00000001 /* RW--V */
// NV10/NV15
#define NV_PGRAPH_DEBUG_2_ROP_BITBUCKET                       27:27 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_BITBUCKET_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_BITBUCKET_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_BITBUCKET_INIT             0x00000000 /* RW--V */
// NV11
#define NV_PGRAPH_DEBUG_2_ROP_ALLOW_ZCMIX                     27:27 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_ALLOW_ZCMIX_DISABLED       0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_ALLOW_ZCMIX_ENABLED        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_ALLOW_ZCMIX_INIT           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FIXED_ADRS                      28:28 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_FIXED_ADRS_DISABLED        0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_FIXED_ADRS_ENABLED         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FIXED_ADRS_INIT            0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FAST_KEEP_DST                   29:29 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_FAST_KEEP_DST_DISABLED     0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_FAST_KEEP_DST_ENABLED      0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FAST_KEEP_DST_INIT         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FORCE_CREAD                     30:30 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_FORCE_CREAD_DISABLED       0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_FORCE_CREAD_ENABLED        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FORCE_CREAD_INIT           0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FORCE_ZREAD                     31:31 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_FORCE_ZREAD_DISABLED       0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_2_ROP_FORCE_ZREAD_ENABLED        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FORCE_ZREAD_INIT           0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_2_ROP_FAST_SYNC                       24:24 /* RWIVF */
#define NV_PGRAPH_DEBUG_2_ROP_FAST_SYNC_INIT             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3                                0x0040008C /* RW-4R */
#define NV_PGRAPH_DEBUG_3_FAST_DATA_STRTCH                      4:4 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_FAST_DATA_STRTCH_DISABLED      0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_FAST_DATA_STRTCH_ENABLED       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_FAST_DATA_STRTCH_INIT          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_FAST_3D_SHADOW_DATA                   5:5 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_FAST_3D_SHADOW_DATA_DISABLED   0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_FAST_3D_SHADOW_DATA_ENABLED    0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_FAST_3D_SHADOW_DATA_INIT       0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_FAST_DMA_READ                         6:6 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_FAST_DMA_READ_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_FAST_DMA_READ_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_FAST_DMA_READ_INIT             0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_ZFLUSH                                7:7 /* CWIVF */
#define NV_PGRAPH_DEBUG_3_ZFLUSH_IGNORE                  0x00000000 /* CWI-V */
#define NV_PGRAPH_DEBUG_3_ZFLUSH_ACTIVATE                0x00000001 /* -W--T */
#define NV_PGRAPH_DEBUG_3_IDLE_FILTER                         10:10 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_IDLE_FILTER_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_IDLE_FILTER_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_IDLE_FILTER_INIT               0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_INHIBIT_IMCLASS_BLOCK               11:11 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_INHIBIT_IMCLASS_BLOCK_DISABLED 0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_INHIBIT_IMCLASS_BLOCK_ENABLED  0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_INHIBIT_IMCLASS_BLOCK_INIT     0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_SYNCHRONIZE                         12:12 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_SYNCHRONIZE_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_SYNCHRONIZE_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_SYNCHRONIZE_INIT               0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_D3D_STATE3D                         13:13 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_D3D_STATE3D_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_D3D_STATE3D_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_D3D_STATE3D_INIT               0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_OBJECT_RELOAD                       14:14 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_OBJECT_RELOAD_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_OBJECT_RELOAD_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_OBJECT_RELOAD_INIT             0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_PM_TRIGGER                          15:15 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_PM_TRIGGER_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_PM_TRIGGER_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_PM_TRIGGER_INIT                0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_ALTARCH                             16:16 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_ALTARCH_DISABLED               0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_ALTARCH_ENABLED                0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_ALTARCH_INIT                   0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_SINGLE_CYCLE_LOAD                   17:17 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_SINGLE_CYCLE_LOAD_DISABLED     0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_SINGLE_CYCLE_LOAD_ENABLED      0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_SINGLE_CYCLE_LOAD_INIT         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_BILINEAR_3D                         18:18 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_BILINEAR_3D_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_BILINEAR_3D_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_BILINEAR_3D_INIT               0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_VOLATILE_RESET                      19:19 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_VOLATILE_RESET_DISABLED        0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_VOLATILE_RESET_ENABLED         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_VOLATILE_RESET_INIT            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_DATA_CHECK                          20:20 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_DATA_CHECK_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_DATA_CHECK_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_DATA_CHECK_INIT                0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_DATA_CHECK_FAIL                     21:21 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_DATA_CHECK_FAIL_DISABLED       0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_DATA_CHECK_FAIL_ENABLED        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_DATA_CHECK_FAIL_INIT           0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_FORMAT_CHECK                        22:22 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_FORMAT_CHECK_DISABLED          0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_FORMAT_CHECK_ENABLED           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_FORMAT_CHECK_INIT              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_DMA_CHECK                           23:23 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_DMA_CHECK_DISABLED             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_DMA_CHECK_ENABLED              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_DMA_CHECK_INIT                 0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_STATE_CHECK                         24:24 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_STATE_CHECK_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_STATE_CHECK_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_STATE_CHECK_INIT               0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_IMAGE_64BIT                         25:25 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_IMAGE_64BIT_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_IMAGE_64BIT_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_IMAGE_64BIT_INIT               0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_CELSIUS_64BIT                       26:26 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_CELSIUS_64BIT_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_CELSIUS_64BIT_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_CELSIUS_64BIT_INIT             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_STATE3D_CHECK                       27:27 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_STATE3D_CHECK_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_STATE3D_CHECK_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_STATE3D_CHECK_INIT             0x00000000 /* RW--V */
#define NV_PGRAPH_DEBUG_3_XFMODE_COALESCE                     28:28 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_XFMODE_COALESCE_DISABLED       0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_XFMODE_COALESCE_ENABLED        0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_XFMODE_COALESCE_INIT           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_CTX_METHODS                         29:29 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_CTX_METHODS_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_CTX_METHODS_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_CTX_METHODS_INIT               0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_OP_METHODS                          30:30 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_OP_METHODS_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_OP_METHODS_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_OP_METHODS_INIT                0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_IGNORE_PATCHVALID                   31:31 /* RWIVF */
#define NV_PGRAPH_DEBUG_3_IGNORE_PATCHVALID_DISABLED     0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_3_IGNORE_PATCHVALID_ENABLED      0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_3_IGNORE_PATCHVALID_INIT         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4                                0x00400090 /* RW-4R */
#define NV_PGRAPH_DEBUG_4_COLOR_SPARE1                          0:0 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_COLOR_SPARE1_DISABLED          0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_COLOR_SPARE1_ENABLED           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_COLOR_SPARE2                          1:1 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_COLOR_SPARE2_DISABLE           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_COLOR_SPARE2_ENABLED           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_PIPE_SPARE1                           2:2 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_PIPE_SPARE1_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_PIPE_SPARE1_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_PIPE_SPARE2                           3:3 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_PIPE_SPARE2_DISABLE            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_PIPE_SPARE2_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE1                         4:4 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE1_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE1_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE2                         5:5 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE2_DISABLE          0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE2_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_RSTR3D_SPARE1                         6:6 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_RSTR3D_SPARE1_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_RSTR3D_SPARE1_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_RSTR3D_SPARE2                         7:7 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_RSTR3D_SPARE2_DISABLE          0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_RSTR3D_SPARE2_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_TEX_SPARE1                            8:8 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_TEX_SPARE1_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_TEX_SPARE1_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_TEX_SPARE2                            9:9 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_TEX_SPARE2_DISABLE             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_TEX_SPARE2_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_TEXMATH_SPARE1                      10:10 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_TEXMATH_SPARE1_DISABLED        0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_TEXMATH_SPARE1_ENABLED         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_TEXMATH_SPARE2                      11:11 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_TEXMATH_SPARE2_DISABLE         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_TEXMATH_SPARE2_ENABLED         0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_LIT_SPARE1                          12:12 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_LIT_SPARE1_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_LIT_SPARE1_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_LIT_SPARE2                          13:13 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_LIT_SPARE2_DISABLE             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_LIT_SPARE2_ENABLED             0x00000001 /* RW--V */
// NV15 defines
#define NV_PGRAPH_DEBUG_4_SWATHCONTROL                        15:14 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_SWATHCONTROL_MUL2              0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_SWATHCONTROL_MUL1P5            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_SWATHCONTROL_MUL1              0x00000002 /* RW--V */
#define NV_PGRAPH_DEBUG_4_SWATHCONTROL_DISABLED          0x00000003 /* RW--V */
// NV10 defines
#define NV_PGRAPH_DEBUG_4_SETUP_SPARE1                        14:14 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_SETUP_SPARE1_DISABLED          0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_SETUP_SPARE1_ENABLED           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_SETUP_SPARE2                        15:15 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_SETUP_SPARE2_DISABLE           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_SETUP_SPARE2_ENABLED           0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_XF_SPARE1                           16:16 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_XF_SPARE1_DISABLED             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_XF_SPARE1_ENABLED              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_XF_SPARE2                           17:17 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_XF_SPARE2_DISABLE              0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_XF_SPARE2_ENABLED              0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_CFFIFO_SPARE1                       18:18 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_CFFIFO_SPARE1_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_CFFIFO_SPARE1_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_CFFIFO_SPARE2                       19:19 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_CFFIFO_SPARE2_DISABLE          0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_CFFIFO_SPARE2_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_IDX_SPARE1                          20:20 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_IDX_SPARE1_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_IDX_SPARE1_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_IDX_SPARE2                          21:21 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_IDX_SPARE2_DISABLE             0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_IDX_SPARE2_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_ASSM_SPARE1                         22:22 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_ASSM_SPARE1_DISABLED           0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_ASSM_SPARE1_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_DEBUG_4_ASSM_SPARE2                         23:23 /* RWIVF */
#define NV_PGRAPH_DEBUG_4_ASSM_SPARE2_DISABLE            0x00000000 /* RWI-V */
#define NV_PGRAPH_DEBUG_4_ASSM_SPARE2_ENABLED            0x00000001 /* RW--V */
#define NV_PGRAPH_NSTATUS                                0x00400104 /* RW-4R */
#define NV_PGRAPH_NSTATUS_STATE_IN_USE                        23:23 /* RWIVF */
#define NV_PGRAPH_NSTATUS_STATE_IN_USE_NOT_PENDING       0x00000000 /* RWI-V */
#define NV_PGRAPH_NSTATUS_STATE_IN_USE_PENDING           0x00000001 /* RW--V */
#define NV_PGRAPH_NSTATUS_INVALID_STATE                       24:24 /* RWIVF */
#define NV_PGRAPH_NSTATUS_INVALID_STATE_NOT_PENDING      0x00000000 /* RWI-V */
#define NV_PGRAPH_NSTATUS_INVALID_STATE_PENDING          0x00000001 /* RW--V */
#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT                        25:25 /* RWIVF */
#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT_NOT_PENDING       0x00000000 /* RWI-V */
#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT_PENDING           0x00000001 /* RW--V */
#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT                    26:26 /* RWIVF */
#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT_NOT_PENDING   0x00000000 /* RWI-V */
#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT_PENDING       0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL                            0x00400144 /* RW-4R */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME                      1:0 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_33US          0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_262US         0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_2MS           0x00000002 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_17MS          0x00000003 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_TIME                              8:8 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_TIME_EXPIRED               0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_TIME_NOT_EXPIRED           0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_CHID                            16:16 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_CHID_INVALID               0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_CHID_VALID                 0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_CHANGE                          20:20 /* R--VF */
#define NV_PGRAPH_CTX_CONTROL_CHANGE_UNAVAILABLE         0x00000000 /* R---V */
#define NV_PGRAPH_CTX_CONTROL_CHANGE_AVAILABLE           0x00000001 /* R---V */
#define NV_PGRAPH_CTX_CONTROL_SWITCHING                       24:24 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_SWITCHING_IDLE             0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_SWITCHING_BUSY             0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_DEVICE                          28:28 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_DEVICE_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_DEVICE_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_USER                               0x00400148 /* RW-4R */
#define NV_PGRAPH_CTX_USER_SUBCH                              15:13 /* RWIVF */
#define NV_PGRAPH_CTX_USER_SUBCH_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_USER_CHID                               28:24 /* RWIVF */
#define NV_PGRAPH_CTX_USER_CHID_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_USER_SINGLE_STEP                        31:31 /* RWIVF */
#define NV_PGRAPH_CTX_USER_SINGLE_STEP_DISABLED          0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_USER_SINGLE_STEP_ENABLED           0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1                            0x0040014C /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH2                            0x00400150 /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT                       1:0 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_INVALID              0x00 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_CGA6_M1              0x01 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_LE_M1                0x02 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT                     13:8 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_INVALID             0x00 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y8               0x01 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16A8Y8          0x02 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X24Y8            0x03 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A1R5G5B5         0x06 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X1R5G5B5         0x07 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16A1R5G5B5      0x08 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X17R5G5B5        0x09 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_R5G6B5           0x0A /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A16R5G6B5        0x0B /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16R5G6B5        0x0C /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A8R8G8B8         0x0D /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X8R8G8B8         0x0E /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y16              0x0F /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A16Y16           0x10 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16Y16           0x11 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_V8YB8U8YA8       0x12 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_YB8V8YA8U8       0x13 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y32              0x14 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_AY8              0x15 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_EYB8ECR8EYA8ECB8 0x16 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_ECR8EYB8ECB8EYA8 0x17 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_NOTIFY_INSTANCE                 31:16 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH2_NOTIFY_INSTANCE_INVALID        0x0000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH3                            0x00400154 /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_0                   15:0 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_0_INVALID         0x0000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_1                  31:16 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_1_INVALID         0x0000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH4                            0x00400158 /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH4_USER_INSTANCE                    15:0 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH4_USER_INSTANCE_INVALID          0x0000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH5                            0x0040015C /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH5_TRAP_BITS                        31:0 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH5_TRAP_BITS_DISABLED             0x0000 /* RW--V */
#define NV_PGRAPH_CTX_CACHE1(i)                  (0x00400160+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE1__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE1_GRCLASS                            7:0 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CHROMA_KEY                       12:12 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_USER_CLIP                        13:13 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_SWIZZLE                          14:14 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_PATCH_CONFIG                     17:15 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_SYNCHRONIZE                      18:18 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_ENDIAN_MODE                      19:19 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_DITHER_MODE                      21:20 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CLASS_TYPE                       22:22 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_SINGLE_STEP                      23:23 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_PATCH_STATUS                     24:24 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CONTEXT_SURFACE                  25:25 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CONTEXT_SURFACE0                 25:25 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CONTEXT_SURFACE1                 26:26 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CONTEXT_PATTERN                  27:27 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CONTEXT_ROP                      28:28 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CONTEXT_BETA1                    29:29 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CONTEXT_BETA4                    30:30 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE2(i)                  (0x00400180+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE2__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE2_MONO_FORMAT                        1:0 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE2_COLOR_FORMAT                      13:8 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE2_NOTIFY_INSTANCE                  31:16 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE3(i)                  (0x004001a0+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE3__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE3_DMA_INSTANCE_0                    15:0 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE3_DMA_INSTANCE_1                   31:16 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE4(i)                  (0x004001c0+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE4__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE4_USER_INSTANCE                     15:0 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE5(i)                  (0x004001e0+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE5__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE5_TRAP_BITS                         31:0 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_0(i)              (0x00400730+(i)*4) /* RW-4A */
#define NV_PGRAPH_FFINTFC_FIFO_0__SIZE_1                          4 /*       */
#define NV_PGRAPH_FFINTFC_FIFO_0_MTHD                          12:2 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_0_MTHD_CTX_SWITCH         0x00000000 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH                        18:16 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_0                 0x00000000 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_1                 0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_2                 0x00000002 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_3                 0x00000003 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_4                 0x00000004 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_5                 0x00000005 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_6                 0x00000006 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_7                 0x00000007 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_TAG                          24:24 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_0_TAG_MTHD                0x00000000 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_TAG_CHSW                0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_DATAHIGH                     20:20 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_0_DATAHIGH_INVALID        0x00000000 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_DATAHIGH_VALID          0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_1(i)              (0x00400740+(i)*4) /* RW-4A */
#define NV_PGRAPH_FFINTFC_FIFO_1__SIZE_1                          4 /*       */
#define NV_PGRAPH_FFINTFC_FIFO_1_ARGUMENT                      31:0 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_2(i)              (0x00400750+(i)*4) /* RW-4A */
#define NV_PGRAPH_FFINTFC_FIFO_2__SIZE_1                          4 /*       */
#define NV_PGRAPH_FFINTFC_FIFO_2_ARGUMENT                      31:0 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_PTR                       0x00400760 /* RW-4R */
#define NV_PGRAPH_FFINTFC_FIFO_PTR_WRITE                        2:0 /* RWIVF */
#define NV_PGRAPH_FFINTFC_FIFO_PTR_WRITE_0               0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_FIFO_PTR_READ                         6:4 /* RWIVF */
#define NV_PGRAPH_FFINTFC_FIFO_PTR_READ_0                0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2                            0x00400764 /* RW-4R */
#define NV_PGRAPH_FFINTFC_ST2_STATUS                          26:26 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_STATUS_INVALID             0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_STATUS_VALID               0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_MTHD                             12:2 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_MTHD_CTX_SWITCH            0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH                           18:16 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_0                    0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_1                    0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_2                    0x00000002 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_3                    0x00000003 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_4                    0x00000004 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_5                    0x00000005 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_6                    0x00000006 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_7                    0x00000007 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID                            24:20 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_CHID_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_1                     0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_2                     0x00000002 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_3                     0x00000003 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_4                     0x00000004 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_5                     0x00000005 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_6                     0x00000006 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_7                     0x00000007 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_8                     0x00000008 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_9                     0x00000009 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_10                    0x0000000A /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_11                    0x0000000B /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_12                    0x0000000C /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_13                    0x0000000D /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_14                    0x0000000E /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_15                    0x0000000F /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_16                    0x00000010 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_17                    0x00000011 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_18                    0x00000012 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_19                    0x00000013 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_20                    0x00000014 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_21                    0x00000015 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_22                    0x00000016 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_23                    0x00000017 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_24                    0x00000018 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_25                    0x00000019 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_26                    0x0000001A /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_27                    0x0000001B /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_28                    0x0000001C /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_29                    0x0000001D /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_30                    0x0000001E /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_31                    0x0000001F /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_DATAHIGH                        25:25 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_DATAHIGH_INVALID           0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_DATAHIGH_VALID             0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS                     27:27 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS_INVALID        0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS_VALID          0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHSWITCH                        28:28 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_CHSWITCH_CLEAR             0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_CHSWITCH_SET               0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_FIFOHOLD                        29:29 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_FIFOHOLD_CLEAR             0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_FIFOHOLD_SET               0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_DL                         0x00400768 /* RW-4R */
#define NV_PGRAPH_FFINTFC_ST2_DL_ARGUMENT                      31:0 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_DL_ARGUMENT_0              0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_DH                         0x0040076c /* RW-4R */
#define NV_PGRAPH_FFINTFC_ST2_DH_ARGUMENT                      31:0 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_DH_ARGUMENT_0              0x00000000 /* RWI-V */
#define NV_PGRAPH_STATUS_STATE                                  0:0 /* R-IVF */
#define NV_PGRAPH_STATUS_STATE_IDLE                      0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_STATE_BUSY                      0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_WAITCRTC                               2:2 /* R-IVF */
#define NV_PGRAPH_STATUS_WAITCRTC_IDLE                   0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_WAITCRTC_BUSY                   0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_FE_3D                                  3:3 /* R-IVF */
#define NV_PGRAPH_STATUS_FE_3D_IDLE                      0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_FE_3D_BUSY                      0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_FE_2D                                  4:4 /* R-IVF */
#define NV_PGRAPH_STATUS_FE_2D_IDLE                      0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_FE_2D_BUSY                      0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_XY_LOGIC                               5:5 /* R-IVF */
#define NV_PGRAPH_STATUS_XY_LOGIC_IDLE                   0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_XY_LOGIC_BUSY                   0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_RASTERIZER_3D                          6:6 /* R-IVF */
#define NV_PGRAPH_STATUS_RASTERIZER_3D_IDLE              0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_RASTERIZER_3D_BUSY              0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_RASTERIZER_2D                          7:7 /* R-IVF */
#define NV_PGRAPH_STATUS_RASTERIZER_2D_IDLE              0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_RASTERIZER_2D_BUSY              0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_IDX                                    8:8 /* R-IVF */
#define NV_PGRAPH_STATUS_IDX_IDLE                        0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_IDX_BUSY                        0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_XF                                     9:9 /* R-IVF */
#define NV_PGRAPH_STATUS_XF_IDLE                         0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_XF_BUSY                         0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_VTX                                  10:10 /* R-IVF */
#define NV_PGRAPH_STATUS_VTX_IDLE                        0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_VTX_BUSY                        0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_COLOR                                11:11 /* R-IVF */
#define NV_PGRAPH_STATUS_COLOR_IDLE                      0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_COLOR_BUSY                      0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PORT_NOTIFY                          12:12 /* R-IVF */
#define NV_PGRAPH_STATUS_PORT_NOTIFY_IDLE                0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PORT_NOTIFY_BUSY                0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PORT_DMA                             16:16 /* R-IVF */
#define NV_PGRAPH_STATUS_PORT_DMA_IDLE                   0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PORT_DMA_BUSY                   0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_DMA_ENGINE                           17:17 /* R-IVF */
#define NV_PGRAPH_STATUS_DMA_ENGINE_IDLE                 0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_DMA_ENGINE_BUSY                 0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_DMA_NOTIFY                           20:20 /* R-IVF */
#define NV_PGRAPH_STATUS_DMA_NOTIFY_IDLE                 0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_DMA_NOTIFY_BUSY                 0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY                    21:21 /* R-IVF */
#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY_IDLE          0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY_BUSY          0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_DMA_WARNING_NOTIFY                   22:22 /* R-IVF */
#define NV_PGRAPH_STATUS_DMA_WARNING_NOTIFY_IDLE         0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_DMA_WARNING_NOTIFY_BUSY         0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PIPE                                 23:23 /* R-IVF */
#define NV_PGRAPH_STATUS_PIPE_IDLE                       0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PIPE_BUSY                       0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_TEXMATH                              24:24 /* R-IVF */
#define NV_PGRAPH_STATUS_TEXMATH_IDLE                    0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_TEXMATH_BUSY                    0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_SETUP                                25:25 /* R-IVF */
#define NV_PGRAPH_STATUS_SETUP_IDLE                      0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_SETUP_BUSY                      0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_CACHE                                26:26 /* R-IVF */
#define NV_PGRAPH_STATUS_CACHE_IDLE                      0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_CACHE_BUSY                      0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_LIGHTING                             27:27 /* R-IVF */
#define NV_PGRAPH_STATUS_LIGHTING_IDLE                   0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_LIGHTING_BUSY                   0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PREROP                               28:28 /* R-IVF */
#define NV_PGRAPH_STATUS_PREROP_IDLE                     0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PREROP_BUSY                     0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_ROP                                  29:29 /* R-IVF */
#define NV_PGRAPH_STATUS_ROP_IDLE                        0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_ROP_BUSY                        0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PORT_USER                            30:30 /* R-IVF */
#define NV_PGRAPH_STATUS_PORT_USER_IDLE                  0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PORT_USER_BUSY                  0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PORT_FB                              31:31 /* R-IVF */
#define NV_PGRAPH_STATUS_PORT_FB_IDLE                    0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PORT_FB_BUSY                    0x00000001 /* R---V */
#define NV_PGRAPH_TRAPPED_ADDR                           0x00400704 /* R--4R */
#define NV_PGRAPH_TRAPPED_ADDR_MTHD                            12:2 /* R-XUF */
#define NV_PGRAPH_TRAPPED_ADDR_SUBCH                          18:16 /* R-XUF */
#define NV_PGRAPH_TRAPPED_ADDR_CHID                           24:20 /* R-XUF */
#define NV_PGRAPH_TRAPPED_ADDR_DHV                            28:28 /* R-XUF */
#define NV_PGRAPH_TRAPPED_DATA_LOW                       0x00400708 /* R--4R */
#define NV_PGRAPH_TRAPPED_DATA_LOW_VALUE                       31:0 /* R-XVF */
#define NV_PGRAPH_TRAPPED_DATA_HIGH                      0x0040070C /* R--4R */
#define NV_PGRAPH_TRAPPED_DATA_HIGH_VALUE                      31:0 /* R-XVF */
#define NV_PGRAPH_SURFACE                                0x00400710 /* RW-4R */
#define NV_PGRAPH_SURFACE_TYPE                                  1:0 /* RWIVF */
#define NV_PGRAPH_SURFACE_TYPE_INVALID                   0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_TYPE_NON_SWIZZLE               0x00000001 /* RW--V */
#define NV_PGRAPH_SURFACE_TYPE_SWIZZLE                   0x00000002 /* RW--V */
#define NV_PGRAPH_SURFACE_TYPE_0053                      0x00000001 /* RWC-V */
#define NV_PGRAPH_SURFACE_TYPE_0093                      0x00000001 /* RWC-V */
#define NV_PGRAPH_SURFACE_TYPE_1193                      0x00000001 /* RWC-V */
#define NV_PGRAPH_SURFACE_Z16_OVERRIDE                          4:4 /* RWIVF */
#define NV_PGRAPH_SURFACE_Z16_OVERRIDE_FALSE             0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_Z16_OVERRIDE_TRUE              0x00000001 /* RW--V */
#define NV_PGRAPH_SURFACE_Z16_OVERRIDE_0053              0x00000000 /* RWC-V */
#define NV_PGRAPH_SURFACE_Z16_OVERRIDE_0093              0x00000000 /* RWC-V */
#define NV_PGRAPH_SURFACE_Z16_OVERRIDE_1193              0x00000000 /* RWC-V */
#define NV_PGRAPH_SURFACE_WRITE_BLIT                           10:8 /* RWIVF */
#define NV_PGRAPH_SURFACE_WRITE_BLIT_0                   0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_WRITE_BLIT_009F                0x00000000 /* RWC-V */
#define NV_PGRAPH_SURFACE_READ_BLIT                           14:12 /* RWIVF */
#define NV_PGRAPH_SURFACE_READ_BLIT_0                    0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_READ_BLIT_009F                 0x00000000 /* RWC-V */
#define NV_PGRAPH_SURFACE_MODULO_BLIT                         18:16 /* RWIVF */
#define NV_PGRAPH_SURFACE_MODULO_BLIT_0                  0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_MODULO_BLIT_009F               0x00000001 /* RWC-V */
#define NV_PGRAPH_SURFACE_WRITE_3D                            22:20 /* RWIVF */
#define NV_PGRAPH_SURFACE_WRITE_3D_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_WRITE_3D_0096                  0x00000000 /* RWC-V */
#define NV_PGRAPH_SURFACE_READ_3D                             26:24 /* RWIVF */
#define NV_PGRAPH_SURFACE_READ_3D_0                      0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_READ_3D_0096                   0x00000000 /* RWC-V */
#define NV_PGRAPH_SURFACE_MODULO_3D                           30:28 /* RWIVF */
#define NV_PGRAPH_SURFACE_MODULO_3D_0                    0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_MODULO_3D_0096                 0x00000001 /* RWC-V */
/* NV_PGRAPH_INCREMENT is needed by dac code */
#ifdef NOTYET
#define NV_PGRAPH_INCREMENT                              0x0040071C /* RW-4R */
#define NV_PGRAPH_INCREMENT_READ_BLIT                           0:0 /* CWIVF */
#define NV_PGRAPH_INCREMENT_READ_BLIT_IGNORE             0x00000000 /* CWI-V */
#define NV_PGRAPH_INCREMENT_READ_BLIT_TRIGGER            0x00000001 /* -W--T */
#define NV_PGRAPH_INCREMENT_READ_3D                             1:1 /* CWIVF */
#define NV_PGRAPH_INCREMENT_READ_3D_IGNORE               0x00000000 /* CWI-V */
#define NV_PGRAPH_INCREMENT_READ_3D_TRIGGER              0x00000001 /* -W--T */
#endif
#define NV_PGRAPH_NOTIFY                                 0x00400718 /* RW-4R */
#define NV_PGRAPH_NOTIFY_BUFFER_REQ                             0:0 /* RWIVF */
#define NV_PGRAPH_NOTIFY_BUFFER_REQ_NOT_PENDING          0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_BUFFER_REQ_PENDING              0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_BUFFER_STYLE                           8:8 /* RWIVF */
#define NV_PGRAPH_NOTIFY_BUFFER_STYLE_WRITE_ONLY         0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_BUFFER_STYLE_WRITE_THEN_AWAKEN  0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_REQ                                  16:16 /* RWIVF */
#define NV_PGRAPH_NOTIFY_REQ_NOT_PENDING                 0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_REQ_PENDING                     0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_STYLE                                20:20 /* RWIVF */
#define NV_PGRAPH_NOTIFY_STYLE_WRITE_ONLY                0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_STYLE_WRITE_THEN_AWAKEN         0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_WARNING_REQ                          24:24 /* RWIVF */
#define NV_PGRAPH_NOTIFY_WARNING_REQ_NOT_PENDING         0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_WARNING_REQ_PENDING             0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_WARNING_STYLE                        25:25 /* RWIVF */
#define NV_PGRAPH_NOTIFY_WARNING_STYLE_WRITE_ONLY        0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_WARNING_STYLE_WRITE_THEN_AWAKEN 0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_WARNING_STATUS                       30:28 /* RWIVF */
#define NV_PGRAPH_NOTIFY_WARNING_STATUS_NO_WARNING       0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_WARNING_STATUS_INVALID_ENUM     0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_WARNING_STATUS_INVALID_VALUE    0x00000002 /* RW--V */
#define NV_PGRAPH_NOTIFY_WARNING_STATUS_INVALID_OP       0x00000004 /* RW--V */
#define NV_PGRAPH_BOFFSET(i)                     (0x00400640+(i)*4) /* RW-4A */
#define NV_PGRAPH_BOFFSET__SIZE_1                                 6 /*       */
#define NV_PGRAPH_BOFFSET_LINADRS                              26:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET_LINADRS_0                      0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET0                               0x00400640 /* RW-4R */
#define NV_PGRAPH_BOFFSET0__ALIAS_1            NV_PGRAPH_BOFFSET(0) /*       */
#define NV_PGRAPH_BOFFSET0_LINADRS                             26:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET0_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET0_LINADRS_042                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BOFFSET0_LINADRS_058                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BOFFSET1                               0x00400644 /* RW-4R */
#define NV_PGRAPH_BOFFSET1__ALIAS_1            NV_PGRAPH_BOFFSET(1) /*       */
#define NV_PGRAPH_BOFFSET1_LINADRS                             26:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET1_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET1_LINADRS_042                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BOFFSET1_LINADRS_059                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BOFFSET2                               0x00400648 /* RW-4R */
#define NV_PGRAPH_BOFFSET2__ALIAS_1            NV_PGRAPH_BOFFSET(2) /*       */
#define NV_PGRAPH_BOFFSET2_LINADRS                             26:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET2_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET2_LINADRS_053                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BOFFSET2_LINADRS_05A                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BOFFSET3                               0x0040064C /* RW-4R */
#define NV_PGRAPH_BOFFSET3__ALIAS_1            NV_PGRAPH_BOFFSET(3) /*       */
#define NV_PGRAPH_BOFFSET3_LINADRS                             26:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET3_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET3_LINADRS_053                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BOFFSET3_LINADRS_05B                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BOFFSET4                               0x00400650 /* RW-4R */
#define NV_PGRAPH_BOFFSET4__ALIAS_1            NV_PGRAPH_BOFFSET(4) /*       */
#define NV_PGRAPH_BOFFSET4_LINADRS                             26:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET4_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET5                               0x00400654 /* RW-4R */
#define NV_PGRAPH_BOFFSET5__ALIAS_1            NV_PGRAPH_BOFFSET(5) /*       */
#define NV_PGRAPH_BOFFSET5_LINADRS                             26:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET5_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET5_LINADRS_052                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BBASE(i)                       (0x00400658+(i)*4) /* RW-4A */
#define NV_PGRAPH_BBASE__SIZE_1                                   6 /*       */
#define NV_PGRAPH_BBASE_LINADRS                                26:0 /* RWIUF */
#define NV_PGRAPH_BBASE_LINADRS_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE0                                 0x00400658 /* RW-4R */
#define NV_PGRAPH_BBASE0__ALIAS_1                NV_PGRAPH_BBASE(0) /*       */
#define NV_PGRAPH_BBASE0_LINADRS                               26:0 /* RWIUF */
#define NV_PGRAPH_BBASE0_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE1                                 0x0040065c /* RW-4R */
#define NV_PGRAPH_BBASE1__ALIAS_1                NV_PGRAPH_BBASE(1) /*       */
#define NV_PGRAPH_BBASE1_LINADRS                               26:0 /* RWIUF */
#define NV_PGRAPH_BBASE1_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE2                                 0x00400660 /* RW-4R */
#define NV_PGRAPH_BBASE2__ALIAS_1                NV_PGRAPH_BBASE(2) /*       */
#define NV_PGRAPH_BBASE2_LINADRS                               26:0 /* RWIUF */
#define NV_PGRAPH_BBASE2_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE3                                 0x00400664 /* RW-4R */
#define NV_PGRAPH_BBASE3__ALIAS_1                NV_PGRAPH_BBASE(3) /*       */
#define NV_PGRAPH_BBASE3_LINADRS                               26:0 /* RWIUF */
#define NV_PGRAPH_BBASE3_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE4                                 0x00400668 /* RW-4R */
#define NV_PGRAPH_BBASE4__ALIAS_1                NV_PGRAPH_BBASE(4) /*       */
#define NV_PGRAPH_BBASE4_LINADRS                               26:0 /* RWIUF */
#define NV_PGRAPH_BBASE4_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE5                                 0x0040066C /* RW-4R */
#define NV_PGRAPH_BBASE5__ALIAS_1                NV_PGRAPH_BBASE(5) /*       */
#define NV_PGRAPH_BBASE5_LINADRS                               26:0 /* RWIUF */
#define NV_PGRAPH_BBASE5_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH(i)                      (0x00400670+(i)*4) /* RW-4A */
#define NV_PGRAPH_BPITCH__SIZE_1                                  5 /*       */
#define NV_PGRAPH_BPITCH_VALUE                                 15:0 /* RWIUF */
#define NV_PGRAPH_BPITCH_VALUE_0                         0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH0                                0x00400670 /* RW-4R */
#define NV_PGRAPH_BPITCH0__ALIAS_1              NV_PGRAPH_BPITCH(0) /*       */
#define NV_PGRAPH_BPITCH0_VALUE                                15:0 /* RWIUF */
#define NV_PGRAPH_BPITCH0_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH0_VALUE_042                      0x00000020 /* RWC-V */
#define NV_PGRAPH_BPITCH0_VALUE_058                      0x00000010 /* RWC-V */
#define NV_PGRAPH_BPITCH1                                0x00400674 /* RW-4R */
#define NV_PGRAPH_BPITCH1__ALIAS_1              NV_PGRAPH_BPITCH(1) /*       */
#define NV_PGRAPH_BPITCH1_VALUE                                15:0 /* RWIUF */
#define NV_PGRAPH_BPITCH1_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH1_VALUE_042                      0x00000020 /* RWC-V */
#define NV_PGRAPH_BPITCH1_VALUE_059                      0x00000010 /* RWC-V */
#define NV_PGRAPH_BPITCH2                                0x00400678 /* RW-4R */
#define NV_PGRAPH_BPITCH2__ALIAS_1              NV_PGRAPH_BPITCH(2) /*       */
#define NV_PGRAPH_BPITCH2_VALUE                                15:0 /* RWIUF */
#define NV_PGRAPH_BPITCH2_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH2_VALUE_053                      0x00000020 /* RWC-V */
#define NV_PGRAPH_BPITCH2_VALUE_05A                      0x00000010 /* RWC-V */
#define NV_PGRAPH_BPITCH3                                0x0040067C /* RW-4R */
#define NV_PGRAPH_BPITCH3__ALIAS_1              NV_PGRAPH_BPITCH(3) /*       */
#define NV_PGRAPH_BPITCH3_VALUE                                15:0 /* RWIUF */
#define NV_PGRAPH_BPITCH3_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH3_VALUE_053                      0x00000020 /* RWC-V */
#define NV_PGRAPH_BPITCH3_VALUE_05B                      0x00000010 /* RWC-V */
#define NV_PGRAPH_BPITCH4                                0x00400680 /* RW-4R */
#define NV_PGRAPH_BPITCH4__ALIAS_1              NV_PGRAPH_BPITCH(4) /*       */
#define NV_PGRAPH_BPITCH4_VALUE                                15:0 /* RWIUF */
#define NV_PGRAPH_BPITCH4_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BLIMIT(i)                      (0x00400684+(i)*4) /* RW-4A */
#define NV_PGRAPH_BLIMIT__SIZE_1                                  6 /*       */
#define NV_PGRAPH_BLIMIT_VALUE                                 26:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT_TYPE                                 31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT_TYPE_IN_MEMORY                  0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT_TYPE_NULL                       0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT0                                0x00400684 /* RW-4R */
#define NV_PGRAPH_BLIMIT0__ALIAS_1              NV_PGRAPH_BLIMIT(0) /*       */
#define NV_PGRAPH_BLIMIT0_VALUE                                26:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT0_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT0_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT0_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT1                                0x00400688 /* RW-4R */
#define NV_PGRAPH_BLIMIT1__ALIAS_1              NV_PGRAPH_BLIMIT(1) /*       */
#define NV_PGRAPH_BLIMIT1_VALUE                                26:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT1_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT1_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT1_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT2                                0x0040068c /* RW-4R */
#define NV_PGRAPH_BLIMIT2__ALIAS_1              NV_PGRAPH_BLIMIT(2) /*       */
#define NV_PGRAPH_BLIMIT2_VALUE                                26:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT2_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT2_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT2_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT3                                0x00400690 /* RW-4R */
#define NV_PGRAPH_BLIMIT3__ALIAS_1              NV_PGRAPH_BLIMIT(3) /*       */
#define NV_PGRAPH_BLIMIT3_VALUE                                26:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT3_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT3_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT3_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT4                                0x00400694 /* RW-4R */
#define NV_PGRAPH_BLIMIT4__ALIAS_1              NV_PGRAPH_BLIMIT(4) /*       */
#define NV_PGRAPH_BLIMIT4_VALUE                                26:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT4_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT4_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT4_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT5                                0x00400698 /* RW-4R */
#define NV_PGRAPH_BLIMIT5__ALIAS_1              NV_PGRAPH_BLIMIT(5) /*       */
#define NV_PGRAPH_BLIMIT5_VALUE                                26:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT5_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT5_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT5_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE2                              0x0040069c /* RW-4R */
#define NV_PGRAPH_BSWIZZLE2_WIDTH                             19:16 /* RWIUF */
#define NV_PGRAPH_BSWIZZLE2_WIDTH_0                      0x00000000 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE2_WIDTH_MAX                    0x0000000b /* RW--V */
#define NV_PGRAPH_BSWIZZLE2_WIDTH_053                    0x00000000 /* RWC-V */
#define NV_PGRAPH_BSWIZZLE2_HEIGHT                            27:24 /* RWIUF */
#define NV_PGRAPH_BSWIZZLE2_HEIGHT_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE2_HEIGHT_MAX                   0x0000000b /* RW--V */
#define NV_PGRAPH_BSWIZZLE2_HEIGHT_053                   0x00000000 /* RWC-V */
#define NV_PGRAPH_BSWIZZLE5                              0x004006a0 /* RW-4R */
#define NV_PGRAPH_BSWIZZLE5_WIDTH                             19:16 /* RWIUF */
#define NV_PGRAPH_BSWIZZLE5_WIDTH_0                      0x00000000 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE5_WIDTH_052                    0x00000000 /* RWC-V */
#define NV_PGRAPH_BSWIZZLE5_HEIGHT                            27:24 /* RWIUF */
#define NV_PGRAPH_BSWIZZLE5_HEIGHT_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE5_HEIGHT_052                   0x00000000 /* RWC-V */
#define NV_PGRAPH_TILE(i)                       (0x00400b00+(i)*16) /* RW-4A */
#define NV_PGRAPH_TILE__SIZE_1                                    8 /*       */
#define NV_PGRAPH_TILE_ADR                                    26:14 /* RW-UF */
#define NV_PGRAPH_TILE_REGION                                 31:31 /* RWIVF */
#define NV_PGRAPH_TLIMIT(i)                     (0x00400b04+(i)*16) /* RW-4A */
#define NV_PGRAPH_TLIMIT__SIZE_1                                  8 /*       */
#define NV_PGRAPH_TLIMIT_ADR                                  26:14 /* RW-UF */
#define NV_PGRAPH_TSIZE(i)                      (0x00400b08+(i)*16) /* RW-4A */
#define NV_PGRAPH_TSIZE__SIZE_1                                   8 /*       */
#define NV_PGRAPH_TSIZE_PITCH                                  15:8 /* RW-UF */
#define NV_PGRAPH_TSTATUS(i)                    (0x00400b0c+(i)*16) /* R--4A */
#define NV_PGRAPH_TSTATUS__SIZE_1                                 8 /*       */
#define NV_PGRAPH_TSTATUS_PRIME                                 1:0 /* R--VF */
#define NV_PGRAPH_TSTATUS_FACTOR                                6:4 /* R--VF */
#define NV_PGRAPH_TSTATUS_REGION                              31:31 /* R-I-F */
#define NV_PGRAPH_BPIXEL                                 0x00400724 /* RW-4R */
#define NV_PGRAPH_BPIXEL_DEPTH0                                 3:0 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH0_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH0_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_YB8V8YA8U8               0x0000000f /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_042                      0x00000001 /* RWC-V */
#define NV_PGRAPH_BPIXEL_DEPTH0_058                      0x00000001 /* RWC-V */
#define NV_PGRAPH_BPIXEL_DEPTH1                                 7:4 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH1_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH1_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_YB8V8YA8U8               0x0000000f /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_059                      0x00000001 /* RWC-V */
#define NV_PGRAPH_BPIXEL_DEPTH2                                11:8 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH2_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH2_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_YB8V8YA8U8               0x0000000f /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_053                      0x00000002 /* RWC-V */
#define NV_PGRAPH_BPIXEL_DEPTH2_05A                      0x00000002 /* RWC-V */
#define NV_PGRAPH_BPIXEL_DEPTH3                               15:12 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH3_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH3_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_YB8V8YA8U8               0x0000000f /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_05B                      0x00000002 /* RWC-V */
#define NV_PGRAPH_BPIXEL_DEPTH4                               19:16 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH4_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH4_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_YB8V8YA8U8               0x0000000f /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5                               23:20 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH5_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH5_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_YB8V8YA8U8               0x0000000f /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_052                      0x00000001 /* RWC-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX                         0x00400610 /* RW-4R */
#define NV_PGRAPH_LIMIT_VIOL_PIX_ADRS                          26:0 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_ADRS_0                  0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BTILED                       27:27 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BTILED_NO_VIOL          0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BTILED_VIOL             0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BPITCH                       28:28 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BPITCH_NO_VIOL          0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BPITCH_VIOL             0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT                         29:29 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT_NO_VIOL            0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT_VIOL               0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT                        30:30 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT_NO_VIOL           0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT_VIOL              0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW                       31:31 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW_NO_VIOL          0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW_VIOL             0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_Z                           0x00400614 /* RW-4R */
#define NV_PGRAPH_LIMIT_VIOL_Z_ADRS                            26:0 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_Z_ADRS_0                    0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT                          30:30 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT_NO_VIOL             0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT_VIOL                0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW                         31:31 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW_NO_VIOL            0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW_VIOL               0x00000001 /* RW--V */
#define NV_PGRAPH_STATE                                  0x00400714 /* RW-4R */
#define NV_PGRAPH_STATE_BUFFER_0                                0:0 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_0_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_0_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_0_042                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_0_058                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_1                                1:1 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_1_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_1_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_1_042                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_1_059                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_2                                2:2 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_2_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_2_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_2_053                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_2_05A                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_3                                3:3 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_3_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_3_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_3_053                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_3_05B                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_4                                4:4 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_4_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_4_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_4_038                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_BUFFER_5                                5:5 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_5_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_5_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_5_052                     0x00000000 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_0                                 8:8 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_0_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_0_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_0_042                      0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_0_058                      0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_1                                 9:9 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_1_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_1_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_1_042                      0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_1_059                      0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_2                               10:10 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_2_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_2_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_2_053                      0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_2_05A                      0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_3                               11:11 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_3_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_3_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_3_053                      0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_3_05B                      0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PITCH_4                               12:12 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_4_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_4_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CHROMA_COLOR                          16:16 /* RWIVF */
#define NV_PGRAPH_STATE_CHROMA_COLOR_INVALID             0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CHROMA_COLOR_VALID               0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CHROMA_COLOR_057                 0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_CHROMA_COLORFMT                       17:17 /* RWIVF */
#define NV_PGRAPH_STATE_CHROMA_COLORFMT_INVALID          0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CHROMA_COLORFMT_VALID            0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CHROMA_COLORFMT_017              0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_CPATTERN_COLORFMT                     20:20 /* RWIVF */
#define NV_PGRAPH_STATE_CPATTERN_COLORFMT_INVALID        0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CPATTERN_COLORFMT_VALID          0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CPATTERN_COLORFMT_044            0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_CPATTERN_MONOFMT                      21:21 /* RWIVF */
#define NV_PGRAPH_STATE_CPATTERN_MONOFMT_INVALID         0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CPATTERN_MONOFMT_VALID           0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CPATTERN_MONOFMT_044             0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_CPATTERN_SELECT                       22:22 /* RWIVF */
#define NV_PGRAPH_STATE_CPATTERN_SELECT_INVALID          0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CPATTERN_SELECT_VALID            0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CPATTERN_SELECT_044              0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PATTERN_COLOR0                        24:24 /* RWIVF */
#define NV_PGRAPH_STATE_PATTERN_COLOR0_INVALID           0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PATTERN_COLOR0_VALID             0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PATTERN_COLOR0_018               0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PATTERN_COLOR1                        25:25 /* RWIVF */
#define NV_PGRAPH_STATE_PATTERN_COLOR1_INVALID           0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PATTERN_COLOR1_VALID             0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PATTERN_COLOR1_018               0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PATTERN_PATT0                         26:26 /* RWIVF */
#define NV_PGRAPH_STATE_PATTERN_PATT0_INVALID            0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PATTERN_PATT0_VALID              0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PATTERN_PATT0_018                0x00000001 /* RWC-V */
#define NV_PGRAPH_STATE_PATTERN_PATT1                         27:27 /* RWIVF */
#define NV_PGRAPH_STATE_PATTERN_PATT1_INVALID            0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PATTERN_PATT1_VALID              0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PATTERN_PATT1_018                0x00000001 /* RWC-V */
#define NV_PGRAPH_CACHE_INDEX                            0x00400728 /* RW-4R */
#define NV_PGRAPH_CACHE_INDEX_ADRS                             11:2 /* RWIVF */
#define NV_PGRAPH_CACHE_INDEX_ADRS_0                     0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_1024                  0x00000400 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_TEXTURE_RAM_0         0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_TEXTURE_RAM_1K        0x00000400 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_PALETTE_RAM_0         0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_PALETTE_RAM_512       0x00000200 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_MISS_DATA_RAM_0       0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_MISS_DATA_RAM_32      0x00000020 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_RLATENCY_RAM_0        0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_RLATENCY_RAM_384      0x00000180 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_FLATENCY_RAM_0        0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_FLATENCY_RAM_448      0x000001C0 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP                              19:16 /* RWIVF */
#define NV_PGRAPH_CACHE_INDEX_OP_WR_CACHE                0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_RD_CACHE                0x00000001 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_RD_INDEX                0x00000002 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_NOP                     0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_TEXTURE_RAM             0x00000001 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_PALETTE_RAM             0x00000002 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_MISS_DATA_RAM           0x00000003 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_RLATENCY_RAM            0x00000004 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_FLATENCY_RAM            0x00000005 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_TEX_PIPE                        15:15 /* RWIVF */
#define NV_PGRAPH_CACHE_INDEX_TEX_PIPE_0                 0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_TEX_PIPE_1                 0x00000001 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL                           29:24 /* RWIVF */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_NOP                  0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_INDEX_REG            0x00000001 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TIME_CNT             0x00000020 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_CACHE_IDLE_CNT       0x00000021 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_PIX_CNT          0x00000022 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_MISS_CNT         0x00000023 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_COAL_STALL_CNT   0x00000024 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_REPL_STALL_CNT   0x00000025 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_MP_Q_STALL_CNT   0x00000026 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_TEX2MA_STALL_CNT 0x00000027 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_LIT2TEX_STALL_CNT    0x00000028 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_RBFR_FULL_STALL_CNT  0x00000029 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_PIX_CNT          0x0000002A /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_MISS_CNT         0x0000002B /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_COAL_STALL_CNT   0x0000002C /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_REPL_STALL_CNT   0x0000002D /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_MP_Q_STALL_CNT   0x0000002E /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_TEX2MA_STALL_CNT 0x0000002F /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_TEX2LIT_REGLD_CNT    0x00000030 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_RDSEL_C2DMA_TAKEN_CNT      0x00000031 /* RW--V */
#define NV_PGRAPH_CACHE_RAM                              0x0040072c /* RW-4R */
#define NV_PGRAPH_CACHE_RAM_VALUE                              31:0 /* RWXVF */
#define NV_PGRAPH_DMA_PITCH                              0x00400770 /* RW-4R */
#define NV_PGRAPH_DMA_PITCH_S0                                 15:0 /* RWXSF */
#define NV_PGRAPH_DMA_PITCH_S1                                31:16 /* RWXSF */
#define NV_PGRAPH_DVD_COLORFMT                           0x00400774 /* RW-4R */
#define NV_PGRAPH_DVD_COLORFMT_IMAGE                            5:0 /* RWNVF */
#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_INVALID            0x00 /* RWN-V */
#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_LE_V8YB8U8YA8      0x12 /* RW--V */
#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_LE_YB8V8YA8U8      0x13 /* RW--V */
#define NV_PGRAPH_DVD_COLORFMT_OVLY                             9:8 /* RWNVF */
#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_INVALID             0x00 /* RWN-V */
#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_LE_A8CR8CB8Y8       0x01 /* RW--V */
#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_LE_A4CR6YB6A4CB6YA6 0x02 /* RW--V */
#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_TRANSPARENT         0x03 /* RW--V */
#define NV_PGRAPH_SCALED_FORMAT                          0x00400778 /* RW-4R */
#define NV_PGRAPH_SCALED_FORMAT_ORIGIN                        17:16 /* RWIVF */
#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_INVALID           0x00000000 /* RWI-V */
#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_CENTER            0x00000001 /* RW--V */
#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_CORNER            0x00000002 /* RW--V */
#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR                  24:24 /* RWIVF */
#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR_ZOH         0x00000000 /* RWI-V */
#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR_FOH         0x00000001 /* RW--V */
#define NV_PGRAPH_STATE3D                                0x0040077C /* RW-4R */
#define NV_PGRAPH_STATE3D_CELSIUS_TAG_ID                       15:0 /* RWIVF */
#define NV_PGRAPH_STATE3D_CELSIUS_TAG_ID_0               0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE3D_CELSIUS_TAG_VALID                   24:24 /* RWIVF */
#define NV_PGRAPH_STATE3D_CELSIUS_TAG_VALID_FALSE        0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE3D_CELSIUS_TAG_VALID_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_STATE3D_DX3_INITIALIZED                     28:28 /* RWIVF */
#define NV_PGRAPH_STATE3D_DX3_INITIALIZED_FALSE          0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE3D_DX3_INITIALIZED_TRUE           0x00000001 /* RWI-V */
#define NV_PGRAPH_STATE3D_DX5_INITIALIZED                     29:29 /* RWIVF */
#define NV_PGRAPH_STATE3D_DX5_INITIALIZED_FALSE          0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE3D_DX5_INITIALIZED_TRUE           0x00000001 /* RWI-V */
#define NV_PGRAPH_STATE3D_DX6_INITIALIZED                     30:30 /* RWIVF */
#define NV_PGRAPH_STATE3D_DX6_INITIALIZED_FALSE          0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE3D_DX6_INITIALIZED_TRUE           0x00000001 /* RWI-V */
#define NV_PGRAPH_PIPE_INDEX                             0x00400780 /* RW-4R */
#define NV_PGRAPH_PIPE_INDEX_ADDRESS                            6:0 /* RWIVF */
#define NV_PGRAPH_PIPE_INDEX_ADDRESS_0                   0x00000000 /* RW--V */
#define NV_PGRAPH_PIPE_INDEX_OP                                10:8 /* RWIVF */
#define NV_PGRAPH_PIPE_INDEX_OP_ZPIPE_NOP                0x00000000 /* RW--V */
#define NV_PGRAPH_PIPE_INDEX_OP_ZPIPE_Z0                 0x00000001 /* RW--V */
#define NV_PGRAPH_PIPE_INDEX_OP_ZPIPE_Z1                 0x00000002 /* RW--V */
#define NV_PGRAPH_PIPE_INDEX_OP_ZPIPE_Z2                 0x00000003 /* RW--V */
#define NV_PGRAPH_PIPE_INDEX_OP_ZPIPE_Z3                 0x00000004 /* RW--V */
#define NV_PGRAPH_PIPE_INDEX_OP_CVGPIPE                  0x00000005 /* RW--V */
#define NV_PGRAPH_PIPE_INDEX_OP_XYPIPE                   0x00000006 /* RW--V */
#define NV_PGRAPH_PIPE_RAM                               0x00400784 /* RW-4R */
#define NV_PGRAPH_PIPE_RAM_VALUE                               31:0 /* RWXVF */
#define NV_PGRAPH_PIPE_RAM_VALUE_Z                             23:0 /* RWXVF */
#define NV_PGRAPH_PIPE_RAM_VALUE_XY                            23:0 /* RWXVF */
#define NV_PGRAPH_PIPE_RAM_VALUE_CVG                           15:0 /* RWXVF */
#define NV_PGRAPH_PATT_COLOR0                            0x00400800 /* RW-4R */
#define NV_PGRAPH_PATT_COLOR0_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_PATT_COLOR0_VALUE_018                  0x00000000 /* RWC-V */
#define NV_PGRAPH_PATT_COLOR0_VALUE_044                  0x00000000 /* RWC-V */
#define NV_PGRAPH_PATT_COLOR1                            0x00400804 /* RW-4R */
#define NV_PGRAPH_PATT_COLOR1_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_PATT_COLOR1_VALUE_018                  0x00000000 /* RWC-V */
#define NV_PGRAPH_PATT_COLOR1_VALUE_044                  0x00000000 /* RWC-V */
#define NV_PGRAPH_PATT_COLORRAM(i)               (0x00400900+(i)*4) /* R--4A */
#define NV_PGRAPH_PATT_COLORRAM__SIZE_1                          64 /*       */
#define NV_PGRAPH_PATT_COLORRAM_VALUE                          23:0 /* R--UF */
#define NV_PGRAPH_PATT_COLORRAM_VALUE_044                0x00000000 /* R-C-V */
#define NV_PGRAPH_PATTERN(i)                     (0x00400808+(i)*4) /* RW-4A */
#define NV_PGRAPH_PATTERN__SIZE_1                                 2 /*       */
#define NV_PGRAPH_PATTERN_BITMAP                               31:0 /* RWXVF */
#define NV_PGRAPH_PATTERN_BITMAP_018                     0x00000000 /* RWC-V */
#define NV_PGRAPH_PATTERN_BITMAP_044                     0x00000000 /* RWC-V */
#define NV_PGRAPH_PATTERN_SHAPE                          0x00400810 /* RW-4R */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE                           1:0 /* RWXVF */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE_8X_8Y              0x00000000 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE_64X_1Y             0x00000001 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE_1X_64Y             0x00000002 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE_018                0x00000000 /* RWC-V */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE_044                0x00000000 /* RWC-V */
#define NV_PGRAPH_PATTERN_SHAPE_SELECT                          4:4 /* RWXVF */
#define NV_PGRAPH_PATTERN_SHAPE_SELECT_2COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_SELECT_FULLCOLOR         0x00000001 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_SELECT_044               0x00000000 /* RWC-V */
#define NV_PGRAPH_MONO_COLOR0                            0x00400600 /* RW-4R */
#define NV_PGRAPH_MONO_COLOR0_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_ROP3                                   0x00400604 /* RW-4R */
#define NV_PGRAPH_ROP3_VALUE                                    7:0 /* RWXVF */
#define NV_PGRAPH_ROP3_VALUE_043                         0x00000000 /* RWC-V */
#define NV_PGRAPH_CHROMA                                 0x00400814 /* RW-4R */
#define NV_PGRAPH_CHROMA_VALUE                                 31:0 /* RWXUF */
#define NV_PGRAPH_CHROMA_VALUE_017                       0x00000000 /* RWC-V */
#define NV_PGRAPH_CHROMA_VALUE_057                       0x00000000 /* RWC-V */
#define NV_PGRAPH_BETA_AND                               0x00400608 /* RW-4R */
#define NV_PGRAPH_BETA_AND_VALUE_FRACTION                     30:23 /* RWXUF */
#define NV_PGRAPH_BETA_AND_VALUE_FRACTION_012            0x00000000 /* RWC-V */
#define NV_PGRAPH_BETA_PREMULT                           0x0040060c /* RW-4R */
#define NV_PGRAPH_BETA_PREMULT_VALUE                           31:0 /* RWXUF */
#define NV_PGRAPH_BETA_PREMULT_VALUE_072                 0x00000000 /* RWC-V */
#define NV_PGRAPH_DPRAM_INDEX                            0x00400828 /* RW-4R */
#define NV_PGRAPH_DPRAM_INDEX_ADRS                              9:0 /* RWIVF */
#define NV_PGRAPH_DPRAM_INDEX_ADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT                          19:16 /* RWIVF */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ADRS                0x00000000 /* RWI-V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ADRS_0              0x00000000 /* RWI-V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ADRS_1              0x00000001 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_IDATA               0x00000001 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ALPHA               0x00000002 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_DATA_0              0x00000002 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_IWE                 0x00000003 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_DATA_1              0x00000003 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_XY                  0x00000004 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_WE_0                0x00000004 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ODATA               0x00000005 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_WE_1                0x00000005 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_OWE                 0x00000006 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ALPHA_0             0x00000006 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_SCOMP               0x00000007 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ALPHA_1             0x00000007 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_PWD                 0x00000008 /* RW--V */
#define NV_PGRAPH_DPRAM_DATA                             0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_DATA_VALUE                             31:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_ADRS_0                           0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_ADRS_0__ALIAS_1        NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_ADRS_0_VALUE                           19:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_ADRS_1                           0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_ADRS_1__ALIAS_1        NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_ADRS_1_VALUE                           19:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_DATA_0                           0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_DATA_0__ALIAS_1        NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_DATA_0_VALUE                           31:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_DATA_1                           0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_DATA_1__ALIAS_1        NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_DATA_1_VALUE                           31:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_WE_0                             0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_WE_0__ALIAS_1          NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_WE_0_VALUE                             23:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_WE_1                             0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_WE_1__ALIAS_1          NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_WE_1_VALUE                             23:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_ALPHA_0                          0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_ALPHA_0__ALIAS_1       NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_ALPHA_0_VALUE                          31:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_ALPHA_1                          0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_ALPHA_1__ALIAS_1       NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_ALPHA_1_VALUE                          31:0 /* RWXVF */
#define NV_PGRAPH_STORED_FMT                             0x00400830 /* RW-4R */
#define NV_PGRAPH_STORED_FMT_MONO0                              5:0 /* RWXVF */
#define NV_PGRAPH_STORED_FMT_MONO0_04A                   0x0000000C /* RWC-V */
#define NV_PGRAPH_STORED_FMT_PATT0                             13:8 /* RWXVF */
#define NV_PGRAPH_STORED_FMT_PATT0_044                   0x0000000B /* RWC-V */
#define NV_PGRAPH_STORED_FMT_PATT1                            21:16 /* RWXVF */
#define NV_PGRAPH_STORED_FMT_PATT1_044                   0x0000000B /* RWC-V */
#define NV_PGRAPH_STORED_FMT_CHROMA                           29:24 /* RWXVF */
#define NV_PGRAPH_STORED_FMT_CHROMA_057                  0x0000000B /* RWC-V */
#define NV_PGRAPH_FORMATS                                0x00400618 /* RW-4R */
#define NV_PGRAPH_FORMATS_ROP                                   2:0 /* R-XVF */
#define NV_PGRAPH_FORMATS_ROP_Y8                         0x00000000 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_RGB15                      0x00000001 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_RGB16                      0x00000002 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_Y16                        0x00000003 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_INVALID                    0x00000004 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_RGB24                      0x00000005 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_RGB30                      0x00000006 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_Y32                        0x00000007 /* -W--V */
#define NV_PGRAPH_FORMATS_SRC                                   9:4 /* R-XVF */
#define NV_PGRAPH_FORMATS_SRC_INVALID                    0x00000000 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_Y8                      0x00000001 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X16A8Y8                 0x00000002 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X24Y8                   0x00000003 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_A1R5G5B5                0x00000006 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X1R5G5B5                0x00000007 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X16A1R5G5B5             0x00000008 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X17R5G5B5               0x00000009 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_R5G6B5                  0x0000000A /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_A16R5G6B5               0x0000000B /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X16R5G6B5               0x0000000C /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_A8R8G8B8                0x0000000D /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X8R8G8B8                0x0000000E /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_Y16                     0x0000000F /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_A16Y16                  0x00000010 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X16Y16                  0x00000011 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_V8YB8U8YA8              0x00000012 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_YB8V8YA8U8              0x00000013 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_Y32                     0x00000014 /* RW--V */
#define NV_PGRAPH_FORMATS_FB                                  15:12 /* R-XVF */
#define NV_PGRAPH_FORMATS_FB_INVALID                     0x00000000 /* RWI-V */
#define NV_PGRAPH_FORMATS_FB_Y8                          0x00000001 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X1R5G5B5_Z1R5G5B5           0x00000002 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X1R5G5B5_O1R5G5B5           0x00000003 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_A1R5G5B5                    0x00000004 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_R5G6B5                      0x00000005 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_Y16                         0x00000006 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_Z8R8G8B8           0x00000007 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_O1Z7R8G8B8         0x00000008 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X1A7R8G8B8_Z1A7R8G8B8       0x00000009 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X1A7R8G8B8_O1A7R8G8B8       0x0000000a /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_O8R8G8B8           0x0000000b /* RW--V */
#define NV_PGRAPH_FORMATS_FB_A8R8G8B8                    0x0000000c /* RW--V */
#define NV_PGRAPH_FORMATS_FB_Y32                         0x0000000d /* RW--V */
#define NV_PGRAPH_FORMATS_FB_V8YB8U8YA8                  0x0000000e /* RW--V */
#define NV_PGRAPH_FORMATS_FB_YB8V8YA8U8                  0x0000000f /* RW--V */
#define NV_PGRAPH_ABS_X_RAM(i)                   (0x00400400+(i)*4) /* RW-4A */
#define NV_PGRAPH_ABS_X_RAM__SIZE_1                              10 /*       */
#define NV_PGRAPH_ABS_X_RAM_VALUE                              31:0 /* RWXUF */
#define NV_PGRAPH_X_RAM_BPORT(i)                 (0x00400c00+(i)*4) /* R--4A */
#define NV_PGRAPH_X_RAM_BPORT__SIZE_1                            10 /*       */
#define NV_PGRAPH_X_RAM_BPORT_VALUE                            31:0 /* R--UF */
#define NV_PGRAPH_ABS_Y_RAM(i)                   (0x00400480+(i)*4) /* RW-4A */
#define NV_PGRAPH_ABS_Y_RAM__SIZE_1                              10 /*       */
#define NV_PGRAPH_ABS_Y_RAM_VALUE                              31:0 /* RWXUF */
#define NV_PGRAPH_Y_RAM_BPORT(i)                 (0x00400c80+(i)*4) /* R--4A */
#define NV_PGRAPH_Y_RAM_BPORT__SIZE_1                            10 /*       */
#define NV_PGRAPH_Y_RAM_BPORT_VALUE                            31:0 /* R--UF */
#define NV_PGRAPH_XY_LOGIC_MISC0                         0x00400514 /* RW-4R */
#define NV_PGRAPH_XY_LOGIC_MISC0_COUNTER                       17:0 /* RWBUF */
#define NV_PGRAPH_XY_LOGIC_MISC0_COUNTER_0               0x00000000 /* RWB-V */
#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION                    20:20 /* RWVVF */
#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION_NONZERO       0x00000000 /* RWV-V */
#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC0_IMAGE_DATA_64                24:24 /* RWVVF */
#define NV_PGRAPH_XY_LOGIC_MISC0_IMAGE_DATA_64_FALSE     0x00000000 /* RWV-V */
#define NV_PGRAPH_XY_LOGIC_MISC0_IMAGE_DATA_64_TRUE      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC0_INDEX                        31:28 /* RWBUF */
#define NV_PGRAPH_XY_LOGIC_MISC0_INDEX_0                 0x00000000 /* RWB-V */
#define NV_PGRAPH_XY_LOGIC_MISC1                         0x00400518 /* RW-4R */
#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL                        0:0 /* RWNVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL_NEEDED          0x00000000 /* RWN-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL_DONE            0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX                      4:4 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX_NOTNULL       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX_NULL          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY                      5:5 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY_NOTNULL       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY_NULL          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX                    12:12 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX_UUMAX         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX                    16:16 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX_UUMAX         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA                    20:20 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA_CLIPMAX       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2                         0x0040051C /* RW-4R */
#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF                        0:0 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF_DISABLE         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF_ENABLE          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX                      4:4 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX_NOTNULL       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX_NULL          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY                      5:5 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY_NOTNULL       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY_NULL          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX                    12:12 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX_UCMAX         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX                    16:16 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX_UCMAX         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA                    20:20 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA_CLIPMAX       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3                         0x00400520 /* RW-4R */
#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0                     0:0 /* RWXVF */
#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0_NULL         0x00000000 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY                   4:4 /* RWXVF */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY_NULL       0x00000000 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX                      8:8 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX_NULL          0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG                     12:12 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG_NULL           0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG_TRUE           0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_DIMX                    22:16 /* RWXUF */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_DIMX_0             0x00000000 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_WDIMX                   30:24 /* RWXUF */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_WDIMX_0            0x00000000 /* RW--V */
#define NV_PGRAPH_X_MISC                                 0x00400500 /* RW-4R */
#define NV_PGRAPH_X_MISC_BIT33_0                                0:0 /* RWNVF */
#define NV_PGRAPH_X_MISC_BIT33_0_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_BIT33_1                                1:1 /* RWNVF */
#define NV_PGRAPH_X_MISC_BIT33_1_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_BIT33_2                                2:2 /* RWNVF */
#define NV_PGRAPH_X_MISC_BIT33_2_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_BIT33_3                                3:3 /* RWNVF */
#define NV_PGRAPH_X_MISC_BIT33_3_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_RANGE_0                                4:4 /* RWNVF */
#define NV_PGRAPH_X_MISC_RANGE_0_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_RANGE_1                                5:5 /* RWNVF */
#define NV_PGRAPH_X_MISC_RANGE_1_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_RANGE_2                                6:6 /* RWNVF */
#define NV_PGRAPH_X_MISC_RANGE_2_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_RANGE_3                                7:7 /* RWNVF */
#define NV_PGRAPH_X_MISC_RANGE_3_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_ADDER_OUTPUT                         29:28 /* RWXVF */
#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_EQ_0               0x00000000 /* RW--V */
#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_LT_0               0x00000001 /* RW--V */
#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_GT_0               0x00000002 /* RW--V */
#define NV_PGRAPH_Y_MISC                                 0x00400504 /* RW-4R */
#define NV_PGRAPH_Y_MISC_BIT33_0                                0:0 /* RWNVF */
#define NV_PGRAPH_Y_MISC_BIT33_0_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_BIT33_1                                1:1 /* RWNVF */
#define NV_PGRAPH_Y_MISC_BIT33_1_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_BIT33_2                                2:2 /* RWNVF */
#define NV_PGRAPH_Y_MISC_BIT33_2_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_BIT33_3                                3:3 /* RWNVF */
#define NV_PGRAPH_Y_MISC_BIT33_3_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_RANGE_0                                4:4 /* RWNVF */
#define NV_PGRAPH_Y_MISC_RANGE_0_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_RANGE_1                                5:5 /* RWNVF */
#define NV_PGRAPH_Y_MISC_RANGE_1_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_RANGE_2                                6:6 /* RWNVF */
#define NV_PGRAPH_Y_MISC_RANGE_2_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_RANGE_3                                7:7 /* RWNVF */
#define NV_PGRAPH_Y_MISC_RANGE_3_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT                         29:28 /* RWXVF */
#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_EQ_0               0x00000000 /* RW--V */
#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_LT_0               0x00000001 /* RW--V */
#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_GT_0               0x00000002 /* RW--V */
#define NV_PGRAPH_ABS_UCLIP_XMIN                         0x0040053C /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP_XMIN_VALUE                         15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP_XMIN_VALUE_019               0x00000000 /* RWC-V */
#define NV_PGRAPH_ABS_UCLIP_XMIN_VALUE_053               0x00000000 /* RWC-V */
#define NV_PGRAPH_ABS_UCLIP_XMAX                         0x00400544 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP_XMAX_VALUE                         17:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP_XMAX_VALUE_019               0x00000000 /* RWC-V */
#define NV_PGRAPH_ABS_UCLIP_XMAX_VALUE_053               0x00000000 /* RWC-V */
#define NV_PGRAPH_ABS_UCLIP_YMIN                         0x00400540 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP_YMIN_VALUE                         15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP_YMIN_VALUE_019               0x00000000 /* RWC-V */
#define NV_PGRAPH_ABS_UCLIP_YMIN_VALUE_053               0x00000000 /* RWC-V */
#define NV_PGRAPH_ABS_UCLIP_YMAX                         0x00400548 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP_YMAX_VALUE                         17:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP_YMAX_VALUE_019               0x00000000 /* RWC-V */
#define NV_PGRAPH_ABS_UCLIP_YMAX_VALUE_053               0x00000000 /* RWC-V */
#define NV_PGRAPH_ABS_UCLIP3D_XMIN                       0x00400550 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP3D_XMIN_VALUE                       15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP3D_XMAX                       0x00400558 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP3D_XMAX_VALUE                       17:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP3D_YMIN                       0x00400554 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP3D_YMIN_VALUE                       15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP3D_YMAX                       0x0040055C /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP3D_YMAX_VALUE                       17:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIPA_XMIN                        0x00400560 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIPA_XMIN_VALUE                        15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIPA_XMAX                        0x00400568 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIPA_XMAX_VALUE                        17:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIPA_YMIN                        0x00400564 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIPA_YMIN_VALUE                        15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIPA_YMAX                        0x0040056C /* RW-4R */
#define NV_PGRAPH_ABS_UCLIPA_YMAX_VALUE                        17:0 /* RWXSF */
#define NV_PGRAPH_SOURCE_COLOR                           0x0040050C /* RW-4R */
#define NV_PGRAPH_SOURCE_COLOR_VALUE                           31:0 /* RWNVF */
#define NV_PGRAPH_SOURCE_COLOR_VALUE_0                   0x00000000 /* RWN-V */
#define NV_PGRAPH_VALID1                                 0x00400508 /* RW-4R */
#define NV_PGRAPH_VALID1_VLD                                   22:0 /* RWNVF */
#define NV_PGRAPH_VALID1_VLD_0                           0x00000000 /* RWN-V */
#define NV_PGRAPH_VALID1_VLD_NOCLIP                       (0x1<<19) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_SRCCOLOR                     (0x1<<16) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTMOVE                      (0x1<<21) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTX01                        (0x3<<0) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTX02                        (0x7<<0) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTX03                        (0xf<<0) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTXCHAIN01                   (0x3<<4) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTXCHAIN02                   (0x7<<4) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTXCHAIN03                   (0xf<<4) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTY01                        (0x3<<8) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTY02                        (0x7<<8) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTY03                        (0xf<<8) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTYCHAIN01                  (0x3<<12) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTYCHAIN02                  (0x7<<12) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTYCHAIN03                  (0xf<<12) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_X_OFFSET                      (0x1<<0) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_XCHAIN_OFFSET                 (0x1<<4) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_Y_OFFSET                      (0x1<<8) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_YCHAIN_OFFSET                (0x1<<12) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTCOLOR0                    (0x1<<17) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTCOLOR1                    (0x1<<18) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTCLIP                      (0x1<<20) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTFONT                      (0x1<<22) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTOFFSET                    (0x1<<22) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTBPITCH                     (0x1<<2) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTBOFFSET                    (0x1<<3) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTDUDX                       (0x1<<4) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTDVDY                       (0x1<<5) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTPOINT                      (0x1<<8) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTSIZE                       (0x1<<9) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTPITCH                     (0x1<<10) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTSTART                     (0x1<<11) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTDUDX2                     (0x1<<12) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTDVDY2                     (0x1<<13) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTPOINT2                    (0x1<<14) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTSIZE2                     (0x1<<15) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTPITCH2                    (0x1<<16) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTSTART2                    (0x1<<17) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTOFFSIN                     (0x1<<0) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTOFFSOUT                    (0x1<<1) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTPITCHIN                    (0x1<<2) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTPITCHOUT                   (0x1<<3) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTLENGTH                     (0x1<<4) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTCOUNT                      (0x1<<5) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTFORMAT                     (0x1<<6) /* RW--V */
#define NV_PGRAPH_VALID1_VLD_GOTNOTIFY                     (0x1<<7) /* RW--V */
#define NV_PGRAPH_VALID1_CLIP_MIN                             28:28 /* RWIVF */
#define NV_PGRAPH_VALID1_CLIP_MIN_NO_ERROR               0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID1_CLIP_MIN_ONLY                   0x00000001 /* RW--V */
#define NV_PGRAPH_VALID1_CLIP_MIN_019                    0x00000000 /* RWC-V */
#define NV_PGRAPH_VALID1_CLIP_MIN_053                    0x00000000 /* RWC-V */
#define NV_PGRAPH_VALID1_CLIPA_MIN                            29:29 /* RWIVF */
#define NV_PGRAPH_VALID1_CLIPA_MIN_NO_ERROR              0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID1_CLIPA_MIN_ONLY                  0x00000001 /* RW--V */
#define NV_PGRAPH_VALID1_CLIP_MAX                             30:30 /* RWIVF */
#define NV_PGRAPH_VALID1_CLIP_MAX_NO_ERROR               0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID1_CLIP_MAX_ONLY                   0x00000001 /* RW--V */
#define NV_PGRAPH_VALID1_CLIP_MAX_019                    0x00000000 /* RWC-V */
#define NV_PGRAPH_VALID1_CLIP_MAX_053                    0x00000000 /* RWC-V */
#define NV_PGRAPH_VALID1_CLIPA_MAX                            31:31 /* RWIVF */
#define NV_PGRAPH_VALID1_CLIPA_MAX_NO_ERROR              0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID1_CLIPA_MAX_ONLY                  0x00000001 /* RW--V */
#define NV_PGRAPH_VALID2                                 0x00400578 /* RW-4R */
#define NV_PGRAPH_VALID2_VLD2                                  28:0 /* RWNVF */
#define NV_PGRAPH_VALID2_VLD2_0                          0x00000000 /* RWN-V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBINE0A               (1<<28) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBINE0C               (1<<27) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBINE1A               (1<<26) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBINE1C               (1<<25) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBFACTOR              (1<<24) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_FILTER1                 (1<<23) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_OFFSET1                 (1<<22) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_FORMAT1                 (1<<21) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_BLEND                   (1<<20) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_CONTROL2                (1<<19) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_CONTROL1                (1<<18) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_CONTROL0                (1<<17) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_FILTER0                 (1<<16) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_FORMAT0                 (1<<15) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_OFFSET0                 (1<<14) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_FOGCOLOR                (1<<13) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_COLORKEY                (1<<12) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_V1                       (1<<9) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_U1                       (1<<8) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_V0                       (1<<7) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_U0                       (1<<6) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_X                        (1<<5) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_Y                        (1<<4) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_ZETA                     (1<<3) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_M                        (1<<2) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_COLOR                    (1<<1) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_GOT3D_SPECULAR                 (1<<0) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_DX3FULLVERTEX               (0x7f<<0) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_DX5FULLVERTEX               (0x7f<<0) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_DX6FULLVERTEX              (0x1ff<<0) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_DX3FULLSTATE               (0x3f<<13) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_DX5FULLSTATE              (0x1ff<<12) /* RW--V */
#define NV_PGRAPH_VALID2_VLD2_DX6FULLSTATE             (0xffff<<13) /* RW--V */
#define NV_PGRAPH_VALID2_CLIP3D_MIN                           30:30 /* RWIVF */
#define NV_PGRAPH_VALID2_CLIP3D_MIN_NO_ERROR             0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID2_CLIP3D_MIN_ONLY                 0x00000001 /* RW--V */
#define NV_PGRAPH_VALID2_CLIP3D_MAX                           31:31 /* RWIVF */
#define NV_PGRAPH_VALID2_CLIP3D_MAX_NO_ERROR             0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID2_CLIP3D_MAX_ONLY                 0x00000001 /* RW--V */
#define NV_PGRAPH_ABS_ICLIP_XMAX                         0x00400534 /* RW-4R */
#define NV_PGRAPH_ABS_ICLIP_XMAX_VALUE                         17:0 /* RWXSF */
#define NV_PGRAPH_ABS_ICLIP_YMAX                         0x00400538 /* RW-4R */
#define NV_PGRAPH_ABS_ICLIP_YMAX_VALUE                         17:0 /* RWXSF */
#define NV_PGRAPH_CLIPX_0                                0x00400524 /* RW-4R */
#define NV_PGRAPH_CLIPX_0_CLIP0_MIN                             1:0 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MAX                             3:2 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MIN                             5:4 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MAX                             7:6 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MIN                             9:8 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MAX                           11:10 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MIN                           13:12 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MAX                           15:14 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MIN                           17:16 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MAX                           19:18 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MIN                           21:20 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MAX                           23:22 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MIN                           25:24 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MAX                           27:26 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MIN                           29:28 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MAX                           31:30 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1                                0x00400528 /* RW-4R */
#define NV_PGRAPH_CLIPX_1_CLIP8_MIN                             1:0 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MAX                             3:2 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MIN                             5:4 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MAX                             7:6 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MIN                            9:8 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MAX                          11:10 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MIN                          13:12 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP11_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP11MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MAX                          15:14 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MIN                          17:16 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MAX                          19:18 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MIN                          21:20 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MAX                          23:22 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MIN                          25:24 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MAX                          27:26 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MIN                          29:28 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MAX                          31:30 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0                                0x0040052c /* RW-4R */
#define NV_PGRAPH_CLIPY_0_CLIP0_MIN                             1:0 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MAX                             3:2 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MIN                             5:4 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MAX                             7:6 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MIN                             9:8 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MAX                           11:10 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MIN                           13:12 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MAX                           15:14 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MIN                           17:16 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MAX                           19:18 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MIN                           21:20 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MAX                           23:22 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MIN                           25:24 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MAX                           27:26 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MIN                           29:28 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MAX                           31:30 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1                                0x00400530 /* RW-4R */
#define NV_PGRAPH_CLIPY_1_CLIP8_MIN                             1:0 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MAX                             3:2 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MIN                             5:4 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MAX                             7:6 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MIN                            9:8 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MAX                          11:10 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MIN                          13:12 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP11_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP11MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MAX                          15:14 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MIN                          17:16 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MAX                          19:18 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MIN                          21:20 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MAX                          23:22 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MIN                          25:24 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MAX                          27:26 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MIN                          29:28 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MAX                          31:30 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_MISC24_0                               0x00400510 /* RW-4R */
#define NV_PGRAPH_MISC24_0_VALUE                               23:0 /* RWXUF */
#define NV_PGRAPH_MISC24_1                               0x00400570 /* RW-4R */
#define NV_PGRAPH_MISC24_1_VALUE                               23:0 /* RWXUF */
#define NV_PGRAPH_MISC24_2                               0x00400574 /* RW-4R */
#define NV_PGRAPH_MISC24_2_VALUE                               23:0 /* RWXUF */
#define NV_PGRAPH_PASSTHRU_0                             0x0040057C /* RW-4R */
#define NV_PGRAPH_PASSTHRU_0_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_PASSTHRU_1                             0x00400580 /* RW-4R */
#define NV_PGRAPH_PASSTHRU_1_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_PASSTHRU_2                             0x00400584 /* RW-4R */
#define NV_PGRAPH_PASSTHRU_2_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_DIMX_TEXTURE                           0x00400588 /* RW-4R */
#define NV_PGRAPH_DIMX_TEXTURE_VALUE                           15:0 /* RWXUF */
#define NV_PGRAPH_WDIMX_TEXTURE                          0x0040058c /* RW-4R */
#define NV_PGRAPH_WDIMX_TEXTURE_VALUE                          16:0 /* RWXSF */
#define NV_PGRAPH_U_RAM(i)                       (0x00400d00+(i)*4) /* RW-4A */
#define NV_PGRAPH_U_RAM__SIZE_1                                  16 /*       */
#define NV_PGRAPH_U_RAM_VALUE                                  31:6 /* RWXFF */
#define NV_PGRAPH_V_RAM(i)                       (0x00400d40+(i)*4) /* RW-4A */
#define NV_PGRAPH_V_RAM__SIZE_1                                  16 /*       */
#define NV_PGRAPH_V_RAM_VALUE                                  31:6 /* RWXFF */
#define NV_PGRAPH_M_RAM(i)                       (0x00400d80+(i)*4) /* RW-4A */
#define NV_PGRAPH_M_RAM__SIZE_1                                  16 /*       */
#define NV_PGRAPH_M_RAM_VALUE                                  31:6 /* RWXFF */
#define NV_PGRAPH_D3D_XY                                 0x004005c0 /* RW-4R */
#define NV_PGRAPH_D3D_XY_X_VALUE                               15:0 /* RWXSF */
#define NV_PGRAPH_D3D_XY_Y_VALUE                              31:16 /* RWXSF */
#define NV_PGRAPH_D3D_U0                                 0x004005c4 /* RW-4R */
#define NV_PGRAPH_D3D_U0_VALUE                                 31:6 /* RWXFF */
#define NV_PGRAPH_D3D_V0                                 0x004005c8 /* RW-4R */
#define NV_PGRAPH_D3D_V0_VALUE                                 31:6 /* RWXFF */
#define NV_PGRAPH_D3D_U1                                 0x004005cc /* RW-4R */
#define NV_PGRAPH_D3D_U1_VALUE                                 31:6 /* RWXFF */
#define NV_PGRAPH_D3D_V1                                 0x004005d0 /* RW-4R */
#define NV_PGRAPH_D3D_V1_VALUE                                 31:6 /* RWXFF */
#define NV_PGRAPH_D3D_ZETA                               0x004005d4 /* RW-4R */
#define NV_PGRAPH_D3D_ZETA_VALUE                               31:0 /* RWXFF */
#define NV_PGRAPH_D3D_RGB                                0x004005d8 /* RW-4R */
#define NV_PGRAPH_D3D_RGB_VALUE                                31:0 /* RWXUF */
#define NV_PGRAPH_D3D_S                                  0x004005dc /* RW-4R */
#define NV_PGRAPH_D3D_S_VALUE                                  31:0 /* RWXUF */
#define NV_PGRAPH_D3D_M                                  0x004005e0 /* RW-4R */
#define NV_PGRAPH_D3D_M_VALUE                                  31:6 /* RWXFF */
#define NV_PGRAPH_FORMAT0                                0x004005A8 /* RW-4R */
#define NV_PGRAPH_FORMAT0_CONTEXT_DMA                           1:1 /* RWXVF */
#define NV_PGRAPH_FORMAT0_CONTEXT_DMA_A                  0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_CONTEXT_DMA_B                  0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLORKEYENABLE                        2:2 /* RWXVF */
#define NV_PGRAPH_FORMAT0_COLORKEYENABLE_FALSE           0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLORKEYENABLE_TRUE            0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_ORIGIN_ZOH                            5:5 /* RWXVF */
#define NV_PGRAPH_FORMAT0_ORIGIN_ZOH_CENTER              0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_ORIGIN_ZOH_CORNER              0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_ORIGIN_FOH                            7:7 /* RWXVF */
#define NV_PGRAPH_FORMAT0_ORIGIN_FOH_CENTER              0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_ORIGIN_FOH_CORNER              0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLOR                                10:8 /* RWXVF */
#define NV_PGRAPH_FORMAT0_COLOR_LE_Y8                    0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLOR_LE_AY8                   0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLOR_LE_A1R5G5B5              0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLOR_LE_X1R5G5B5              0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLOR_LE_A4R4G4B4              0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLOR_LE_R5G6B5                0x00000005 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLOR_LE_A8R8G8B8              0x00000006 /* RW--V */
#define NV_PGRAPH_FORMAT0_COLOR_LE_X8R8G8B8              0x00000007 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS                       15:12 /* RWXVF */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_INVALID          0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_1                0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_2                0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_3                0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_4                0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_5                0x00000005 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_6                0x00000006 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_7                0x00000007 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_8                0x00000008 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_9                0x00000009 /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_10               0x0000000A /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_11               0x0000000B /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_12               0x0000000C /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_13               0x0000000D /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_14               0x0000000E /* RW--V */
#define NV_PGRAPH_FORMAT0_MIPMAP_LEVELS_15               0x0000000F /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U                         19:16 /* RWXVF */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_1                  0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_2                  0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_4                  0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_8                  0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_16                 0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_32                 0x00000005 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_64                 0x00000006 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_128                0x00000007 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_256                0x00000008 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_512                0x00000009 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_1024               0x0000000A /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_U_2048               0x0000000B /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V                         23:20 /* RWXVF */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_1                  0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_2                  0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_4                  0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_8                  0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_16                 0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_32                 0x00000005 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_64                 0x00000006 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_128                0x00000007 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_256                0x00000008 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_512                0x00000009 /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_1024               0x0000000A /* RW--V */
#define NV_PGRAPH_FORMAT0_BASE_SIZE_V_2048               0x0000000B /* RW--V */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSU                     26:24 /* RWXVF */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSU_WRAP           0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSU_MIRROR         0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSU_CLAMP          0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSU_BORDER         0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT0_WRAPU                               27:27 /* RWXVF */
#define NV_PGRAPH_FORMAT0_WRAPU_FALSE                    0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_WRAPU_TRUE                     0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSV                     30:28 /* RWXVF */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSV_WRAP           0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSV_MIRROR         0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSV_CLAMP          0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT0_TEXTUREADDRESSV_BORDER         0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT0_WRAPV                               31:31 /* RWXVF */
#define NV_PGRAPH_FORMAT0_WRAPV_FALSE                    0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT0_WRAPV_TRUE                     0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1                                0x004005AC /* RW-4R */
#define NV_PGRAPH_FORMAT1_CONTEXT_DMA                           1:1 /* RWXVF */
#define NV_PGRAPH_FORMAT1_CONTEXT_DMA_A                  0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_CONTEXT_DMA_B                  0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLORKEYENABLE                        2:2 /* RWXVF */
#define NV_PGRAPH_FORMAT1_COLORKEYENABLE_FALSE           0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLORKEYENABLE_TRUE            0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_ORIGIN_ZOH                            5:5 /* RWXVF */
#define NV_PGRAPH_FORMAT1_ORIGIN_ZOH_CENTER              0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_ORIGIN_ZOH_CORNER              0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_ORIGIN_FOH                            7:7 /* RWXVF */
#define NV_PGRAPH_FORMAT1_ORIGIN_FOH_CENTER              0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_ORIGIN_FOH_CORNER              0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLOR                                10:8 /* RWXVF */
#define NV_PGRAPH_FORMAT1_COLOR_LE_Y8                    0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLOR_LE_AY8                   0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLOR_LE_A1R5G5B5              0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLOR_LE_X1R5G5B5              0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLOR_LE_A4R4G4B4              0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLOR_LE_R5G6B5                0x00000005 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLOR_LE_A8R8G8B8              0x00000006 /* RW--V */
#define NV_PGRAPH_FORMAT1_COLOR_LE_X8R8G8B8              0x00000007 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS                       15:12 /* RWXVF */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_INVALID          0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_1                0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_2                0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_3                0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_4                0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_5                0x00000005 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_6                0x00000006 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_7                0x00000007 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_8                0x00000008 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_9                0x00000009 /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_10               0x0000000A /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_11               0x0000000B /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_12               0x0000000C /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_13               0x0000000D /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_14               0x0000000E /* RW--V */
#define NV_PGRAPH_FORMAT1_MIPMAP_LEVELS_15               0x0000000F /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U                         19:16 /* RWXVF */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_1                  0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_2                  0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_4                  0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_8                  0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_16                 0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_32                 0x00000005 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_64                 0x00000006 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_128                0x00000007 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_256                0x00000008 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_512                0x00000009 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_1024               0x0000000A /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_U_2048               0x0000000B /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V                         23:20 /* RWXVF */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_1                  0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_2                  0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_4                  0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_8                  0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_16                 0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_32                 0x00000005 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_64                 0x00000006 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_128                0x00000007 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_256                0x00000008 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_512                0x00000009 /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_1024               0x0000000A /* RW--V */
#define NV_PGRAPH_FORMAT1_BASE_SIZE_V_2048               0x0000000B /* RW--V */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSU                     26:24 /* RWXVF */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSU_WRAP           0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSU_MIRROR         0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSU_CLAMP          0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSU_BORDER         0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT1_WRAPU                               27:27 /* RWXVF */
#define NV_PGRAPH_FORMAT1_WRAPU_FALSE                    0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_WRAPU_TRUE                     0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSV                     30:28 /* RWXVF */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSV_WRAP           0x00000001 /* RW--V */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSV_MIRROR         0x00000002 /* RW--V */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSV_CLAMP          0x00000003 /* RW--V */
#define NV_PGRAPH_FORMAT1_TEXTUREADDRESSV_BORDER         0x00000004 /* RW--V */
#define NV_PGRAPH_FORMAT1_WRAPV                               31:31 /* RWXVF */
#define NV_PGRAPH_FORMAT1_WRAPV_FALSE                    0x00000000 /* RW--V */
#define NV_PGRAPH_FORMAT1_WRAPV_TRUE                     0x00000001 /* RW--V */
#define NV_PGRAPH_BUNDLE_BASE                            0x00400E00 /* RW-4R */
#define NV_PGRAPH_TEXTUREOFFSET0                         0x00400E00 /* RW-4R */
#define NV_PGRAPH_TEXTUREOFFSET0_BUNDLE                  0x00000000 /* ----B */
#define NV_PGRAPH_TEXTUREOFFSET0_VALUE                         31:0 /* RWXUF */
#define NV_PGRAPH_TEXTUREOFFSET1                         0x00400E04 /* RW-4R */
#define NV_PGRAPH_TEXTUREOFFSET1_BUNDLE                  0x00000001 /* ----B */
#define NV_PGRAPH_TEXTUREOFFSET1_VALUE                         31:0 /* RWXUF */
#define NV_PGRAPH_TEXTUREPALETTE0                        0x00400E08 /* RW-4R */
#define NV_PGRAPH_TEXTUREPALETTE0_BUNDLE                 0x00000002 /* ----B */
#define NV_PGRAPH_TEXTUREPALETTE0_CONTEXT_DMA                   0:0 /* RWXVF */
#define NV_PGRAPH_TEXTUREPALETTE0_CONTEXT_DMA_A          0x00000000 /* RW--V */
#define NV_PGRAPH_TEXTUREPALETTE0_CONTEXT_DMA_B          0x00000001 /* RW--V */
#define NV_PGRAPH_TEXTUREPALETTE0_OFFSET                       31:6 /* RWXUF */
#define NV_PGRAPH_TEXTUREPALETTE1                        0x00400E0C /* RW-4R */
#define NV_PGRAPH_TEXTUREPALETTE1_BUNDLE                 0x00000003 /* ----B */
#define NV_PGRAPH_TEXTUREPALETTE1_CONTEXT_DMA                   0:0 /* RWXVF */
#define NV_PGRAPH_TEXTUREPALETTE1_CONTEXT_DMA_A          0x00000000 /* RW--V */
#define NV_PGRAPH_TEXTUREPALETTE1_CONTEXT_DMA_B          0x00000001 /* RW--V */
#define NV_PGRAPH_TEXTUREPALETTE1_OFFSET                       31:6 /* RWXUF */
#define NV_PGRAPH_TEXFORMAT0                             0x00400E10 /* RW-4R */
#define NV_PGRAPH_TEXFORMAT0_BUNDLE                      0x00000004 /* ----B */
#define NV_PGRAPH_TEXFORMAT0_CONTEXT_DMA                        1:1 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_CONTEXT_DMA_A               0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_CONTEXT_DMA_B               0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_CUBEMAPENABLE                      2:2 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_CUBEMAPENABLE_OFF           0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_CUBEMAPENABLE_ON            0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_ORIGIN_ZOH                         4:4 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_ORIGIN_ZOH_CENTER           0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_ORIGIN_ZOH_CORNER           0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_ORIGIN_FOH                         6:6 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_ORIGIN_FOH_CENTER           0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_ORIGIN_FOH_CORNER           0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR                             11:7 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_Y8                 0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_AY8                0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_A1R5G5B5           0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_X1R5G5B5           0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_A4R4G4B4           0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_R5G6B5             0x00000005 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_A8R8G8B8           0x00000006 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_X8R8G8B8           0x00000007 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_I8_A1R5G5B5        0x00000008 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_I8_R5G6B5          0x00000009 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_I8_A4R4G4B4        0x0000000A /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_I8_A8R8G8B8        0x0000000B /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_DXT1_A1R5G5B5      0x0000000C /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_DXT23_A8R8G8B8     0x0000000E /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_DXT45_A8R8G8B8     0x0000000F /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_A1R5G5B5     0x00000010 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_R5G6B5       0x00000011 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_A8R8G8B8     0x00000012 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_Y8           0x00000013 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_SY8          0x00000014 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_X7SY9        0x00000015 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_R8B8         0x00000016 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_G8B8         0x00000017 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_COLOR_LE_IMAGE_SG8SB8       0x00000018 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS                    15:12 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_INVALID       0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_1             0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_2             0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_3             0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_4             0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_5             0x00000005 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_6             0x00000006 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_7             0x00000007 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_8             0x00000008 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_9             0x00000009 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_10            0x0000000A /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_11            0x0000000B /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_MIPMAP_LEVELS_12            0x0000000C /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U                      19:16 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_1               0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_2               0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_4               0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_8               0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_16              0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_32              0x00000005 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_64              0x00000006 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_128             0x00000007 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_256             0x00000008 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_512             0x00000009 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_1024            0x0000000A /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_U_2048            0x0000000B /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V                      23:20 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_1               0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_2               0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_4               0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_8               0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_16              0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_32              0x00000005 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_64              0x00000006 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_128             0x00000007 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_256             0x00000008 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_512             0x00000009 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_1024            0x0000000A /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_BASE_SIZE_V_2048            0x0000000B /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSU                  26:24 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSU_WRAP        0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSU_MIRROR      0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSU_CLAMP       0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSU_BORDER      0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_WRAPU                            27:27 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_WRAPU_FALSE                 0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_WRAPU_TRUE                  0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSV                  30:28 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSV_WRAP        0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSV_MIRROR      0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSV_CLAMP       0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_TEXTUREADDRESSV_BORDER      0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_WRAPV                            31:31 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT0_WRAPV_FALSE                 0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT0_WRAPV_TRUE                  0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1                             0x00400E14 /* RW-4R */
#define NV_PGRAPH_TEXFORMAT1_BUNDLE                      0x00000005 /* ----B */
#define NV_PGRAPH_TEXFORMAT1_CONTEXT_DMA                        1:1 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_CONTEXT_DMA_A               0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_CONTEXT_DMA_B               0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_CUBEMAPENABLE                      2:2 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_CUBEMAPENABLE_OFF           0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_CUBEMAPENABLE_ON            0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_ORIGIN_ZOH                         4:4 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_ORIGIN_ZOH_CENTER           0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_ORIGIN_ZOH_CORNER           0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_ORIGIN_FOH                         6:6 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_ORIGIN_FOH_CENTER           0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_ORIGIN_FOH_CORNER           0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR                             11:7 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_Y8                 0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_AY8                0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_A1R5G5B5           0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_X1R5G5B5           0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_A4R4G4B4           0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_R5G6B5             0x00000005 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_A8R8G8B8           0x00000006 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_X8R8G8B8           0x00000007 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_I8_A1R5G5B5        0x00000008 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_I8_R5G6B5          0x00000009 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_I8_A4R4G4B4        0x0000000A /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_I8_A8R8G8B8        0x0000000B /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_DXT1_A1R5G5B5      0x0000000C /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_DXT23_A8R8G8B8     0x0000000E /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_DXT45_A8R8G8B8     0x0000000F /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_A1R5G5B5     0x00000010 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_R5G6B5       0x00000011 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_A8R8G8B8     0x00000012 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_Y8           0x00000013 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_SY8          0x00000014 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_X7SY9        0x00000015 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_R8B8         0x00000016 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_G8B8         0x00000017 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_COLOR_LE_IMAGE_SG8SB8       0x00000018 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS                    15:12 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_INVALID       0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_1             0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_2             0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_3             0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_4             0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_5             0x00000005 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_6             0x00000006 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_7             0x00000007 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_8             0x00000008 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_9             0x00000009 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_10            0x0000000A /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_11            0x0000000B /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_12            0x0000000C /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_13            0x0000000D /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_14            0x0000000E /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_MIPMAP_LEVELS_15            0x0000000F /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U                      19:16 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_1               0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_2               0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_4               0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_8               0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_16              0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_32              0x00000005 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_64              0x00000006 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_128             0x00000007 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_256             0x00000008 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_512             0x00000009 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_1024            0x0000000A /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_U_2048            0x0000000B /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V                      23:20 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_1               0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_2               0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_4               0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_8               0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_16              0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_32              0x00000005 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_64              0x00000006 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_128             0x00000007 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_256             0x00000008 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_512             0x00000009 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_1024            0x0000000A /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_BASE_SIZE_V_2048            0x0000000B /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSU                  26:24 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSU_WRAP        0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSU_MIRROR      0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSU_CLAMP       0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSU_BORDER      0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_WRAPU                            27:27 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_WRAPU_FALSE                 0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_WRAPU_TRUE                  0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSV                  30:28 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSV_WRAP        0x00000001 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSV_MIRROR      0x00000002 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSV_CLAMP       0x00000003 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_TEXTUREADDRESSV_BORDER      0x00000004 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_WRAPV                            31:31 /* RWXVF */
#define NV_PGRAPH_TEXFORMAT1_WRAPV_FALSE                 0x00000000 /* RW--V */
#define NV_PGRAPH_TEXFORMAT1_WRAPV_TRUE                  0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0                          0x00400E18 /* RW-4R */
#define NV_PGRAPH_TEXCONTROL0_0_BUNDLE                   0x00000006 /* ----B */
#define NV_PGRAPH_TEXCONTROL0_0_COLORKEY_OP                     1:0 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_0_COLORKEY_OP_DISABLE      0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_COLORKEY_OP_CHANGE_ALPHA 0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_COLORKEY_OP_CHANGE_ALL   0x00000002 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_COLORKEY_OP_MATCH_KILL   0x00000003 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_ALPHAKILLENABLE                 2:2 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_0_ALPHAKILLENABLE_FALSE    0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_ALPHAKILLENABLE_TRUE     0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_FIELDENABLE                     3:3 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_0_FIELDENABLE_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_FIELDENABLE_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_LOGMAXANISO                     5:4 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_0_LOGMAXANISO_1            0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_LOGMAXANISO_2            0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_MAXLODCLAMP                    17:6 /* RWXSF */
#define NV_PGRAPH_TEXCONTROL0_0_MINLODCLAMP                   29:18 /* RWXSF */
#define NV_PGRAPH_TEXCONTROL0_0_ENABLE                        30:30 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_0_ENABLE_FALSE             0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_0_ENABLE_TRUE              0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1                          0x00400E1C /* RW-4R */
#define NV_PGRAPH_TEXCONTROL0_1_BUNDLE                   0x00000007 /* ----B */
#define NV_PGRAPH_TEXCONTROL0_1_COLORKEY_OP                     1:0 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_1_COLORKEY_OP_DISABLE      0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_COLORKEY_OP_CHANGE_ALPHA 0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_COLORKEY_OP_CHANGE_ALL   0x00000002 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_COLORKEY_OP_MATCH_KILL   0x00000003 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_ALPHAKILLENABLE                 2:2 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_1_ALPHAKILLENABLE_FALSE    0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_ALPHAKILLENABLE_TRUE     0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_FIELDENABLE                     3:3 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_1_FIELDENABLE_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_FIELDENABLE_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_LOGMAXANISO                     5:4 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_1_LOGMAXANISO_1            0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_LOGMAXANISO_2            0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_MAXLODCLAMP                    17:6 /* RWXSF */
#define NV_PGRAPH_TEXCONTROL0_1_MINLODCLAMP                   29:18 /* RWXSF */
#define NV_PGRAPH_TEXCONTROL0_1_ENABLE                        30:30 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL0_1_ENABLE_FALSE             0x00000000 /* RW--V */
#define NV_PGRAPH_TEXCONTROL0_1_ENABLE_TRUE              0x00000001 /* RW--V */
#define NV_PGRAPH_TEXCONTROL1_0                          0x00400E20 /* RW-4R */
#define NV_PGRAPH_TEXCONTROL1_0_BUNDLE                   0x00000008 /* ----B */
#define NV_PGRAPH_TEXCONTROL1_0_IMAGEPITCH                    31:16 /* RWXUF */
#define NV_PGRAPH_TEXCONTROL1_1                          0x00400E24 /* RW-4R */
#define NV_PGRAPH_TEXCONTROL1_1_BUNDLE                   0x00000009 /* ----B */
#define NV_PGRAPH_TEXCONTROL1_1_IMAGEPITCH                    31:16 /* RWXUF */
#define NV_PGRAPH_TEXCONTROL2_0                          0x00400E28 /* RW-4R */
#define NV_PGRAPH_TEXCONTROL2_0_BUNDLE                   0x0000000A /* ----B */
#define NV_PGRAPH_TEXCONTROL2_0_PERTURB_DU                     11:0 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL2_0_PERTURB_DV                    23:12 /* RWXUF */
#define NV_PGRAPH_TEXCONTROL2_0_IMAGE_LODF                    31:24 /* RWXUF */
#define NV_PGRAPH_TEXCONTROL2_1                          0x00400E2C /* RW-4R */
#define NV_PGRAPH_TEXCONTROL2_1_BUNDLE                   0x0000000B /* ----B */
#define NV_PGRAPH_TEXCONTROL2_1_PERTURB_DU                     11:0 /* RWXVF */
#define NV_PGRAPH_TEXCONTROL2_1_PERTURB_DV                    23:12 /* RWXUF */
#define NV_PGRAPH_TEXCONTROL2_1_IMAGE_LODF                    31:24 /* RWXUF */
#define NV_PGRAPH_IMAGERECT0                             0x00400E30 /* RW-4R */
#define NV_PGRAPH_IMAGERECT0_BUNDLE                      0x0000000C /* ----B */
#define NV_PGRAPH_IMAGERECT0_HEIGHT                            10:0 /* RWXUF */
#define NV_PGRAPH_IMAGERECT0_WIDTH                            26:16 /* RWXUF */
#define NV_PGRAPH_IMAGERECT1                             0x00400E34 /* RW-4R */
#define NV_PGRAPH_IMAGERECT1_BUNDLE                      0x0000000D /* ----B */
#define NV_PGRAPH_IMAGERECT1_HEIGHT                            10:0 /* RWXUF */
#define NV_PGRAPH_IMAGERECT1_WIDTH                            26:16 /* RWXUF */
#define NV_PGRAPH_FILTER0                                0x00400E38 /* RW-4R */
#define NV_PGRAPH_FILTER0_BUNDLE                         0x0000000E /* ----B */
#define NV_PGRAPH_FILTER0_KERNEL_SIZE_X                         4:1 /* RWXUF */
#define NV_PGRAPH_FILTER0_KERNEL_SIZE_Y                        12:9 /* RWXUF */
#define NV_PGRAPH_FILTER0_MIPMAPLODBIAS                        12:0 /* RWXSF */
#define NV_PGRAPH_FILTER0_MIPMAP_DITHER_ENABLE                15:15 /* RWXVF */
#define NV_PGRAPH_FILTER0_MIPMAP_DITHER_ENABLE_FALSE     0x00000000 /* RW--V */
#define NV_PGRAPH_FILTER0_MIPMAP_DITHER_ENABLE_TRUE      0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMIN                          26:24 /* RWXVF */
#define NV_PGRAPH_FILTER0_TEXTUREMIN_NEAREST             0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMIN_LINEAR              0x00000002 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMIN_MIPNEAREST          0x00000003 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMIN_MIPLINEAR           0x00000004 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMIN_LINEARMIPNEAREST    0x00000005 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMIN_LINEARMIPLINEAR     0x00000006 /* RW--V */
#define NV_PGRAPH_FILTER0_ANISOTROPIC_MIN_ENABLE              27:27 /* RWXVF */
#define NV_PGRAPH_FILTER0_ANISOTROPIC_MIN_ENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_FILTER0_ANISOTROPIC_MIN_ENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMAG                          30:28 /* RWXVF */
#define NV_PGRAPH_FILTER0_TEXTUREMAG_NEAREST             0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMAG_LINEAR              0x00000002 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMAG_MIPNEAREST          0x00000003 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMAG_MIPLINEAR           0x00000004 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMAG_LINEARMIPNEAREST    0x00000005 /* RW--V */
#define NV_PGRAPH_FILTER0_TEXTUREMAG_LINEARMIPLINEAR     0x00000006 /* RW--V */
#define NV_PGRAPH_FILTER0_ANISOTROPIC_MAG_ENABLE              31:31 /* RWXVF */
#define NV_PGRAPH_FILTER0_ANISOTROPIC_MAG_ENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_FILTER0_ANISOTROPIC_MAG_ENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER1                                0x00400E3C /* RW-4R */
#define NV_PGRAPH_FILTER1_BUNDLE                         0x0000000F /* ----B */
#define NV_PGRAPH_FILTER1_KERNEL_SIZE_X                         4:1 /* RWXUF */
#define NV_PGRAPH_FILTER1_KERNEL_SIZE_Y                        12:9 /* RWXUF */
#define NV_PGRAPH_FILTER1_MIPMAPLODBIAS                        12:0 /* RWXSF */
#define NV_PGRAPH_FILTER1_MIPMAP_DITHER_ENABLE                15:15 /* RWXVF */
#define NV_PGRAPH_FILTER1_MIPMAP_DITHER_ENABLE_FALSE     0x00000000 /* RW--V */
#define NV_PGRAPH_FILTER1_MIPMAP_DITHER_ENABLE_TRUE      0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMIN                          26:24 /* RWXVF */
#define NV_PGRAPH_FILTER1_TEXTUREMIN_NEAREST             0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMIN_LINEAR              0x00000002 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMIN_MIPNEAREST          0x00000003 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMIN_MIPLINEAR           0x00000004 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMIN_LINEARMIPNEAREST    0x00000005 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMIN_LINEARMIPLINEAR     0x00000006 /* RW--V */
#define NV_PGRAPH_FILTER1_ANISOTROPIC_MIN_ENABLE              27:27 /* RWXVF */
#define NV_PGRAPH_FILTER1_ANISOTROPIC_MIN_ENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_FILTER1_ANISOTROPIC_MIN_ENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMAG                          30:28 /* RWXVF */
#define NV_PGRAPH_FILTER1_TEXTUREMAG_NEAREST             0x00000001 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMAG_LINEAR              0x00000002 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMAG_MIPNEAREST          0x00000003 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMAG_MIPLINEAR           0x00000004 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMAG_LINEARMIPNEAREST    0x00000005 /* RW--V */
#define NV_PGRAPH_FILTER1_TEXTUREMAG_LINEARMIPLINEAR     0x00000006 /* RW--V */
#define NV_PGRAPH_FILTER1_ANISOTROPIC_MAG_ENABLE              31:31 /* RWXVF */
#define NV_PGRAPH_FILTER1_ANISOTROPIC_MAG_ENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_FILTER1_ANISOTROPIC_MAG_ENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW                       0x00400E40 /* RW-4R */
#define NV_PGRAPH_COMBINE0ALPHAICW_BUNDLE                0x00000010 /* ----B */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE                     3:0 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_ALPHA                      4:4 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_ALPHA_FROMBLUE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_ALPHA_FROMALPHA     0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP                        7:5 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_D_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE                    11:8 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_ALPHA                    12:12 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_ALPHA_FROMBLUE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_ALPHA_FROMALPHA     0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP                      15:13 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_C_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE                   19:16 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_ALPHA                    20:20 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_ALPHA_FROMBLUE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_ALPHA_FROMALPHA     0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP                      23:21 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_B_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE                   27:24 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_ALPHA                    28:28 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_ALPHA_FROMBLUE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_ALPHA_FROMALPHA     0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP                      31:29 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAICW_A_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW                       0x00400E44 /* RW-4R */
#define NV_PGRAPH_COMBINE1ALPHAICW_BUNDLE                0x00000011 /* ----B */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE                     3:0 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_ALPHA                      4:4 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_ALPHA_FROMBLUE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_ALPHA_FROMALPHA     0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP                        7:5 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_D_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE                    11:8 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_ALPHA                    12:12 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_ALPHA_FROMBLUE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_ALPHA_FROMALPHA     0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP                      15:13 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_C_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE                   19:16 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_ALPHA                    20:20 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_ALPHA_FROMBLUE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_ALPHA_FROMALPHA     0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP                      23:21 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_B_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE                   27:24 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_ALPHA                    28:28 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_ALPHA_FROMBLUE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_ALPHA_FROMALPHA     0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP                      31:29 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAICW_A_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW                       0x00400E48 /* RW-4R */
#define NV_PGRAPH_COMBINE0COLORICW_BUNDLE                0x00000012 /* ----B */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE                     3:0 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_ALPHA                      4:4 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_D_ALPHA_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_ALPHA_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP                        7:5 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_D_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE                    11:8 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_ALPHA                    12:12 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_C_ALPHA_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_ALPHA_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP                      15:13 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_C_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE                   19:16 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_ALPHA                    20:20 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_B_ALPHA_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_ALPHA_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP                      23:21 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_B_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE                   27:24 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_ALPHA                    28:28 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_A_ALPHA_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_ALPHA_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP                      31:29 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLORICW_A_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW                       0x00400E4C /* RW-4R */
#define NV_PGRAPH_COMBINE1COLORICW_BUNDLE                0x00000013 /* ----B */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE                     3:0 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_ALPHA                      4:4 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_D_ALPHA_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_ALPHA_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP                        7:5 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_D_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE                    11:8 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_ALPHA                    12:12 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_C_ALPHA_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_ALPHA_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP                      15:13 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_C_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE                   19:16 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_ALPHA                    20:20 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_B_ALPHA_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_ALPHA_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP                      23:21 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_B_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE                   27:24 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_R0           0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_R1           0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_R2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_R3           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_R4           0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_R5           0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_R8           0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_R9           0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_RC           0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_SOURCE_RD           0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_ALPHA                    28:28 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_A_ALPHA_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_ALPHA_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP                      31:29 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP_UNSIGNED_IDENT  0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP_UNSIGNED_INVERT 0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP_EXPAND_NORMAL   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP_EXPAND_NEGATE   0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP_HALFBIAS_NORMAL 0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP_HALFBIAS_NEGATE 0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP_SIGNED_IDENTITY 0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLORICW_A_MAP_SIGNED_NEGATE   0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0FACTOR                         0x00400E50 /* RW-4R */
#define NV_PGRAPH_COMBINE0FACTOR_BUNDLE                  0x00000014 /* ----B */
#define NV_PGRAPH_COMBINE0FACTOR_BLUE                           7:0 /* RWXUF */
#define NV_PGRAPH_COMBINE0FACTOR_GREEN                         15:8 /* RWXUF */
#define NV_PGRAPH_COMBINE0FACTOR_RED                          23:16 /* RWXUF */
#define NV_PGRAPH_COMBINE0FACTOR_ALPHA                        31:24 /* RWXUF */
#define NV_PGRAPH_COMBINE1FACTOR                         0x00400E54 /* RW-4R */
#define NV_PGRAPH_COMBINE1FACTOR_BUNDLE                  0x00000015 /* ----B */
#define NV_PGRAPH_COMBINE1FACTOR_BLUE                           7:0 /* RWXUF */
#define NV_PGRAPH_COMBINE1FACTOR_GREEN                         15:8 /* RWXUF */
#define NV_PGRAPH_COMBINE1FACTOR_RED                          23:16 /* RWXUF */
#define NV_PGRAPH_COMBINE1FACTOR_ALPHA                        31:24 /* RWXUF */
#define NV_PGRAPH_COMBINE0ALPHAOCW                       0x00400E58 /* RW-4R */
#define NV_PGRAPH_COMBINE0ALPHAOCW_BUNDLE                0x00000016 /* ----B */
#define NV_PGRAPH_COMBINE0ALPHAOCW_CD_DST                       3:0 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAOCW_CD_DST_R0             0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_CD_DST_R4             0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_CD_DST_R5             0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_CD_DST_R8             0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_CD_DST_R9             0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_CD_DST_RC             0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_CD_DST_RD             0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_AB_DST                       7:4 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAOCW_AB_DST_R0             0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_AB_DST_R4             0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_AB_DST_R5             0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_AB_DST_R8             0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_AB_DST_R9             0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_AB_DST_RC             0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_AB_DST_RD             0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_SUM_DST                     11:8 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAOCW_SUM_DST_R0            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_SUM_DST_R4            0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_SUM_DST_R5            0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_SUM_DST_R8            0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_SUM_DST_R9            0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_SUM_DST_RC            0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_SUM_DST_RD            0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_MUX_ENABLE                 14:14 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAOCW_MUX_ENABLE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_MUX_ENABLE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_OPERATION                  17:15 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHAOCW_OPERATION_NOSHIFT     0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_OPERATION_BIAS        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_OPERATION_LEFT1       0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_OPERATION_LEFT1_BIAS  0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_OPERATION_LEFT2       0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHAOCW_OPERATION_RIGHT1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW                       0x00400E5C /* RW-4R */
#define NV_PGRAPH_COMBINE1ALPHAOCW_BUNDLE                0x00000017 /* ----B */
#define NV_PGRAPH_COMBINE1ALPHAOCW_CD_DST                       3:0 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAOCW_CD_DST_R0             0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_CD_DST_R4             0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_CD_DST_R5             0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_CD_DST_R8             0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_CD_DST_R9             0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_CD_DST_RC             0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_CD_DST_RD             0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_AB_DST                       7:4 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAOCW_AB_DST_R0             0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_AB_DST_R4             0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_AB_DST_R5             0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_AB_DST_R8             0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_AB_DST_R9             0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_AB_DST_RC             0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_AB_DST_RD             0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_SUM_DST                     11:8 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAOCW_SUM_DST_R0            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_SUM_DST_R4            0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_SUM_DST_R5            0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_SUM_DST_R8            0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_SUM_DST_R9            0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_SUM_DST_RC            0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_SUM_DST_RD            0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_MUX_ENABLE                 14:14 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAOCW_MUX_ENABLE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_MUX_ENABLE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_OPERATION                  17:15 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHAOCW_OPERATION_NOSHIFT     0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_OPERATION_BIAS        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_OPERATION_LEFT1       0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_OPERATION_LEFT1_BIAS  0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_OPERATION_LEFT2       0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHAOCW_OPERATION_RIGHT1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA                          0x00400590 /* RW-4R */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_0                       0:0 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_0_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_0_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_0                      4:2 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_0_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_0_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_0_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_0_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_0_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_0_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_0_TEXTURELOD    0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_1                       8:8 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_1_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_1_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_1                    12:10 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_1_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_1_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_1_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_1_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_1_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_1_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_1_TEXTURELOD    0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_2                     16:16 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_2_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_2_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_2                    20:18 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_2_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_2_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_2_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_2_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_2_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_2_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_2_TEXTURELOD    0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_3                     24:24 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_3_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_INVERSE_3_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_3                    28:26 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_3_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_3_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_3_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_3_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_3_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_3_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_ARGUMENT_3_TEXTURELOD    0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_OPERATION                     31:29 /* RWXVF */
#define NV_PGRAPH_COMBINE0ALPHA_OPERATION_ADD            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_OPERATION_ADD2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_OPERATION_ADD4           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_OPERATION_ADDSIGNED      0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_OPERATION_MUX            0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_OPERATION_ADDCOMPLEMENT  0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0ALPHA_OPERATION_ADDSIGNED2     0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR                          0x00400594 /* RW-4R */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_0                       0:0 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_0_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_0_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_0                         1:1 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_0_COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_0_ALPHA            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_0                      4:2 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_0_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_0_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_0_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_0_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_0_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_0_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_0_TEXTURELOD    0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_1                       8:8 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_1_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_1_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_1                         9:9 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_1_COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_1_ALPHA            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_1                    12:10 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_1_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_1_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_1_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_1_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_1_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_1_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_1_TEXTURELOD    0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_2                     16:16 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_2_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_2_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_2                       17:17 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_2_COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_2_ALPHA            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_2                    20:18 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_2_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_2_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_2_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_2_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_2_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_2_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_2_TEXTURELOD    0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_3                     24:24 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_3_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_INVERSE_3_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_3                       25:25 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_3_COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ALPHA_3_ALPHA            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_3                    28:26 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_3_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_3_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_3_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_3_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_3_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_3_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_ARGUMENT_3_TEXTURELOD    0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_OPERATION                     31:29 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOR_OPERATION_ADD            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_OPERATION_ADD2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_OPERATION_ADD4           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_OPERATION_ADDSIGNED      0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_OPERATION_MUX            0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_OPERATION_ADDCOMPLEMENT  0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOR_OPERATION_ADDSIGNED2     0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA                          0x00400598 /* RW-4R */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_0                       0:0 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_0_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_0_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_0                      4:2 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_0_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_0_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_0_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_0_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_0_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_0_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_1                       8:8 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_1_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_1_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_1                    12:10 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_1_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_1_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_1_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_1_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_1_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_1_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_2                     16:16 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_2_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_2_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_2                    20:18 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_2_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_2_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_2_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_2_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_2_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_2_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_3                     24:24 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_3_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_INVERSE_3_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_3                    28:26 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_3_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_3_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_3_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_3_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_3_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_ARGUMENT_3_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_OPERATION                     31:29 /* RWXVF */
#define NV_PGRAPH_COMBINE1ALPHA_OPERATION_ADD            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_OPERATION_ADD2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_OPERATION_ADD4           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_OPERATION_ADDSIGNED      0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_OPERATION_MUX            0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_OPERATION_ADDCOMPLEMENT  0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1ALPHA_OPERATION_ADDSIGNED2     0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR                          0x0040059C /* RW-4R */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_0                       0:0 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_0_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_0_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_0                         1:1 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_0_COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_0_ALPHA            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_0                      4:2 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_0_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_0_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_0_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_0_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_0_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_0_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_1                       8:8 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_1_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_1_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_1                         9:9 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_1_COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_1_ALPHA            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_1                    12:10 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_1_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_1_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_1_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_1_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_1_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_1_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_2                     16:16 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_2_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_2_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_2                       17:17 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_2_COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_2_ALPHA            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_2                    20:18 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_2_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_2_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_2_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_2_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_2_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_2_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_3                     24:24 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_3_NORMAL         0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_INVERSE_3_INVERSE        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_3                       25:25 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_3_COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ALPHA_3_ALPHA            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_3                    28:26 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_3_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_3_FACTOR        0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_3_DIFFUSE       0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_3_INPUT         0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_3_TEXTURE0      0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_ARGUMENT_3_TEXTURE1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_OPERATION                     31:29 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOR_OPERATION_ADD            0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_OPERATION_ADD2           0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_OPERATION_ADD4           0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_OPERATION_ADDSIGNED      0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_OPERATION_MUX            0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_OPERATION_ADDCOMPLEMENT  0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOR_OPERATION_ADDSIGNED2     0x00000007 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW                       0x00400E60 /* RW-4R */
#define NV_PGRAPH_COMBINE0COLOROCW_BUNDLE                0x00000018 /* ----B */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DST                       3:0 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DST_R0             0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DST_R4             0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DST_R5             0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DST_R8             0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DST_R9             0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DST_RC             0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DST_RD             0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DST                       7:4 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DST_R0             0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DST_R4             0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DST_R5             0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DST_R8             0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DST_R9             0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DST_RC             0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DST_RD             0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_SUM_DST                     11:8 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOROCW_SUM_DST_R0            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_SUM_DST_R4            0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_SUM_DST_R5            0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_SUM_DST_R8            0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_SUM_DST_R9            0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_SUM_DST_RC            0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_SUM_DST_RD            0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DOT_ENABLE              12:12 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DOT_ENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_CD_DOT_ENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DOT_ENABLE              13:13 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DOT_ENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_AB_DOT_ENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_MUX_ENABLE                 14:14 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOROCW_MUX_ENABLE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_MUX_ENABLE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_OPERATION                  17:15 /* RWXVF */
#define NV_PGRAPH_COMBINE0COLOROCW_OPERATION_NOSHIFT     0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_OPERATION_BIAS        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_OPERATION_LEFT1       0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_OPERATION_LEFT1_BIAS  0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_OPERATION_LEFT2       0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE0COLOROCW_OPERATION_RIGHT1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW                       0x00400E64 /* RW-4R */
#define NV_PGRAPH_COMBINE1COLOROCW_BUNDLE                0x00000019 /* ----B */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DST                       3:0 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DST_R0             0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DST_R4             0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DST_R5             0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DST_R8             0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DST_R9             0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DST_RC             0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DST_RD             0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DST                       7:4 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DST_R0             0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DST_R4             0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DST_R5             0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DST_R8             0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DST_R9             0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DST_RC             0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DST_RD             0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_SUM_DST                     11:8 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_SUM_DST_R0            0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_SUM_DST_R4            0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_SUM_DST_R5            0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_SUM_DST_R8            0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_SUM_DST_R9            0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_SUM_DST_RC            0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_SUM_DST_RD            0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DOT_ENABLE              12:12 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DOT_ENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_CD_DOT_ENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DOT_ENABLE              13:13 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DOT_ENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_AB_DOT_ENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_MUX_ENABLE                 14:14 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_MUX_ENABLE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_MUX_ENABLE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_OPERATION                  17:15 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_OPERATION_NOSHIFT     0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_OPERATION_BIAS        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_OPERATION_LEFT1       0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_OPERATION_LEFT1_BIAS  0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_OPERATION_LEFT2       0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_OPERATION_RIGHT1      0x00000006 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_MUX_SELECT                 27:27 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_MUX_SELECT_LSB        0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_MUX_SELECT_MSB        0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_ITERATION_COUNT            29:28 /* RWXVF */
#define NV_PGRAPH_COMBINE1COLOROCW_ITERATION_COUNT_ONE   0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINE1COLOROCW_ITERATION_COUNT_TWO   0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0                      0x00400E68 /* RW-4R */
#define NV_PGRAPH_COMBINESPECFOGCW0_BUNDLE               0x0000001A /* ----B */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE                    3:0 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_R0          0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_R1          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_R2          0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_R3          0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_R4          0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_R5          0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_R8          0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_R9          0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_RC          0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_RD          0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_RE          0x0000000E /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_SOURCE_RF          0x0000000F /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_ALPHA                     4:4 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_ALPHA_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_ALPHA_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_INVERSE                   5:5 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_INVERSE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_D_INVERSE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE                   11:8 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_R0          0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_R1          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_R2          0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_R3          0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_R4          0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_R5          0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_R8          0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_R9          0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_RC          0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_RD          0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_RE          0x0000000E /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_SOURCE_RF          0x0000000F /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_ALPHA                   12:12 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_ALPHA_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_ALPHA_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_INVERSE                 13:13 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_INVERSE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_C_INVERSE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE                  19:16 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_R0          0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_R1          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_R2          0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_R3          0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_R4          0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_R5          0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_R8          0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_R9          0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_RC          0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_RD          0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_RE          0x0000000E /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_SOURCE_RF          0x0000000F /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_ALPHA                   20:20 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_ALPHA_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_ALPHA_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_INVERSE                 21:21 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_INVERSE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_B_INVERSE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE                  27:24 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_R0          0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_R1          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_R2          0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_R3          0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_R4          0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_R5          0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_R8          0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_R9          0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_RC          0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_RD          0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_RE          0x0000000E /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_SOURCE_RF          0x0000000F /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_ALPHA                   28:28 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_ALPHA_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_ALPHA_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_INVERSE                 29:29 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_INVERSE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW0_A_INVERSE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1                      0x00400E6C /* RW-4R */
#define NV_PGRAPH_COMBINESPECFOGCW1_BUNDLE               0x0000001B /* ----B */
#define NV_PGRAPH_COMBINESPECFOGCW1_ADDINV_R12                  5:5 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_ADDINV_R12_FALSE     0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_ADDINV_R12_TRUE      0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_ADDINV_R5                   6:6 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_ADDINV_R5_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_ADDINV_R5_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_SPECCLAMP                   7:7 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_SPECCLAMP_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_SPECCLAMP_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE                   11:8 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_R0          0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_R1          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_R2          0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_R3          0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_R4          0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_R5          0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_R8          0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_R9          0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_RC          0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_SOURCE_RD          0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_ALPHA                   12:12 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_ALPHA_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_ALPHA_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_INVERSE                 13:13 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_INVERSE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_G_INVERSE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE                  19:16 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_R0          0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_R1          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_R2          0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_R3          0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_R4          0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_R5          0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_R8          0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_R9          0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_RC          0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_SOURCE_RD          0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_ALPHA                   20:20 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_ALPHA_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_ALPHA_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_INVERSE                 21:21 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_INVERSE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_F_INVERSE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE                  27:24 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_R0          0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_R1          0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_R2          0x00000002 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_R3          0x00000003 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_R4          0x00000004 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_R5          0x00000005 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_R8          0x00000008 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_R9          0x00000009 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_RC          0x0000000C /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_SOURCE_RD          0x0000000D /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_ALPHA                   28:28 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_ALPHA_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_ALPHA_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_INVERSE                 29:29 /* RWXVF */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_INVERSE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_COMBINESPECFOGCW1_E_INVERSE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0                               0x00400E70 /* RW-4R */
#define NV_PGRAPH_CONTROL0_BUNDLE                        0x0000001C /* ----B */
#define NV_PGRAPH_CONTROL0_ALPHAREF                             7:0 /* RWXUF */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC                           11:8 /* RWXVF */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC_NEVER               0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC_LESS                0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC_EQUAL               0x00000002 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC_LESSEQUAL           0x00000003 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC_GREATER             0x00000004 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC_NOTEQUAL            0x00000005 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC_GREATEREQUAL        0x00000006 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHAFUNC_ALWAYS              0x00000007 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHATESTENABLE                    12:12 /* RWXVF */
#define NV_PGRAPH_CONTROL0_ALPHATESTENABLE_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHATESTENABLE_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_ORIGIN                             13:13 /* RWXVF */
#define NV_PGRAPH_CONTROL0_ORIGIN_CENTER                 0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_ORIGIN_CORNER                 0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZENABLE                            14:14 /* RWXVF */
#define NV_PGRAPH_CONTROL0_ZENABLE_FALSE                 0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZENABLE_TRUE                  0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZFUNC                              19:16 /* RWXVF */
#define NV_PGRAPH_CONTROL0_ZFUNC_NEVER                   0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZFUNC_LESS                    0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZFUNC_EQUAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZFUNC_LESSEQUAL               0x00000003 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZFUNC_GREATER                 0x00000004 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZFUNC_NOTEQUAL                0x00000005 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZFUNC_GREATEREQUAL            0x00000006 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZFUNC_ALWAYS                  0x00000007 /* RW--V */
#define NV_PGRAPH_CONTROL0_CULLMODE                           21:20 /* RWXVF */
#define NV_PGRAPH_CONTROL0_CULLMODE_NONE                 0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_CULLMODE_CW                   0x00000002 /* RW--V */
#define NV_PGRAPH_CONTROL0_CULLMODE_CCW                  0x00000003 /* RW--V */
#define NV_PGRAPH_CONTROL0_DITHERENABLE                       22:22 /* RWXVF */
#define NV_PGRAPH_CONTROL0_DITHERENABLE_FALSE            0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_DITHERENABLE_TRUE             0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_Z_PERSPECTIVE_ENABLE               23:23 /* RWXVF */
#define NV_PGRAPH_CONTROL0_Z_PERSPECTIVE_ENABLE_FALSE    0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_Z_PERSPECTIVE_ENABLE_TRUE     0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZWRITEENABLE                       24:24 /* RWXVF */
#define NV_PGRAPH_CONTROL0_ZWRITEENABLE_FALSE            0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_ZWRITEENABLE_TRUE             0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_STENCIL_WRITE_ENABLE               25:25 /* RWXVF */
#define NV_PGRAPH_CONTROL0_STENCIL_WRITE_ENABLE_FALSE    0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_STENCIL_WRITE_ENABLE_TRUE     0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHA_WRITE_ENABLE                 26:26 /* RWXVF */
#define NV_PGRAPH_CONTROL0_ALPHA_WRITE_ENABLE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_ALPHA_WRITE_ENABLE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_RED_WRITE_ENABLE                   27:27 /* RWXVF */
#define NV_PGRAPH_CONTROL0_RED_WRITE_ENABLE_FALSE        0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_RED_WRITE_ENABLE_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_GREEN_WRITE_ENABLE                 28:28 /* RWXVF */
#define NV_PGRAPH_CONTROL0_GREEN_WRITE_ENABLE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_GREEN_WRITE_ENABLE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_BLUE_WRITE_ENABLE                  29:29 /* RWXVF */
#define NV_PGRAPH_CONTROL0_BLUE_WRITE_ENABLE_FALSE       0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL0_BLUE_WRITE_ENABLE_TRUE        0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_Z_FORMAT                           31:30 /* RWXVF */
#define NV_PGRAPH_CONTROL0_Z_FORMAT_FIXED                0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL0_Z_FORMAT_FLOAT                0x00000002 /* RW--V */
#define NV_PGRAPH_CONTROL1                               0x00400E74 /* RW-4R */
#define NV_PGRAPH_CONTROL1_BUNDLE                        0x0000001D /* ----B */
#define NV_PGRAPH_CONTROL1_STENCIL_TEST_ENABLE                  0:0 /* RWXVF */
#define NV_PGRAPH_CONTROL1_STENCIL_TEST_ENABLE_FALSE     0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_TEST_ENABLE_TRUE      0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC                         7:4 /* RWXVF */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC_NEVER            0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC_LESS             0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC_EQUAL            0x00000002 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC_LESSEQUAL        0x00000003 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC_GREATER          0x00000004 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC_NOTEQUAL         0x00000005 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC_GREATEREQUAL     0x00000006 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_FUNC_ALWAYS           0x00000007 /* RW--V */
#define NV_PGRAPH_CONTROL1_STENCIL_REF                         15:8 /* RWXUF */
#define NV_PGRAPH_CONTROL1_STENCIL_MASK_READ                  23:16 /* RWXUF */
#define NV_PGRAPH_CONTROL1_STENCIL_MASK_WRITE                 31:24 /* RWXUF */
#define NV_PGRAPH_CONTROL2                               0x00400E78 /* RW-4R */
#define NV_PGRAPH_CONTROL2_BUNDLE                        0x0000001E /* ----B */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL                      3:0 /* RWXVF */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL_KEEP          0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL_ZERO          0x00000002 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL_REPLACE       0x00000003 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL_INCRSAT       0x00000004 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL_DECRSAT       0x00000005 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL_INVERT        0x00000006 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL_INCR          0x00000007 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_FAIL_DECR          0x00000008 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL                     7:4 /* RWXVF */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL_KEEP         0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL_ZERO         0x00000002 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL_REPLACE      0x00000003 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL_INCRSAT      0x00000004 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL_DECRSAT      0x00000005 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL_INVERT       0x00000006 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL_INCR         0x00000007 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZFAIL_DECR         0x00000008 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS                    11:8 /* RWXVF */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS_KEEP         0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS_ZERO         0x00000002 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS_REPLACE      0x00000003 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS_INCRSAT      0x00000004 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS_DECRSAT      0x00000005 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS_INVERT       0x00000006 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS_INCR         0x00000007 /* RW--V */
#define NV_PGRAPH_CONTROL2_STENCIL_OP_ZPASS_DECR         0x00000008 /* RW--V */
#define NV_PGRAPH_CONTROL3                               0x00400E7C /* RW-4R */
#define NV_PGRAPH_CONTROL3_BUNDLE                        0x0000001F /* ----B */
#define NV_PGRAPH_CONTROL3_FLATSHADE_OP                         0:0 /* RWXVF */
#define NV_PGRAPH_CONTROL3_FLATSHADE_OP_LASTVTX          0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL3_FLATSHADE_OP_FIRSTVTX         0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL3_PREMULTALPHA                         2:2 /* RWXVF */
#define NV_PGRAPH_CONTROL3_PREMULTALPHA_FALSE            0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL3_PREMULTALPHA_TRUE             0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL3_TEXTUREMAPBLEND                      4:4 /* RWXVF */
#define NV_PGRAPH_CONTROL3_SPECULARENABLE                       5:5 /* RWXVF */
#define NV_PGRAPH_CONTROL3_SPECULARENABLE_FALSE          0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL3_SPECULARENABLE_TRUE           0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL3_TEXTUREPERSPECTIVE                   6:6 /* RWXVF */
#define NV_PGRAPH_CONTROL3_TEXTUREPERSPECTIVE_FALSE      0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL3_TEXTUREPERSPECTIVE_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL3_SHADEMODE                            7:7 /* RWXVF */
#define NV_PGRAPH_CONTROL3_SHADEMODE_FLAT                0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL3_SHADEMODE_GOURAUD             0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL3_FOGENABLE                            8:8 /* RWXVF */
#define NV_PGRAPH_CONTROL3_FOGENABLE_FALSE               0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL3_FOGENABLE_TRUE                0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL3_POINT_PARAMS_EN                      9:9 /* RWXVF */
#define NV_PGRAPH_CONTROL3_POINT_PARAMS_EN_FALSE         0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL3_POINT_PARAMS_EN_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_CONTROL3_W_BUFFER_SELECT                    13:10 /* RWXVF */
#define NV_PGRAPH_CONTROL3_W_BUFFER_SELECT_0             0x00000000 /* RW--V */
#define NV_PGRAPH_CONTROL3_W_BUFFER_SELECT_1             0x00000001 /* RW--V */
#define NV_PGRAPH_BLEND                                  0x00400E80 /* RW-4R */
#define NV_PGRAPH_BLEND_BUNDLE                           0x00000020 /* ----B */
#define NV_PGRAPH_BLEND_BLENDEQUATION                           2:0 /* RWXVF */
#define NV_PGRAPH_BLEND_BLENDEQUATION_SUBTRACT           0x00000000 /* RW--V */
#define NV_PGRAPH_BLEND_BLENDEQUATION_REVSUBTRACT        0x00000001 /* RW--V */
#define NV_PGRAPH_BLEND_BLENDEQUATION_ADD                0x00000002 /* RW--V */
#define NV_PGRAPH_BLEND_BLENDEQUATION_MIN                0x00000003 /* RW--V */
#define NV_PGRAPH_BLEND_BLENDEQUATION_MAX                0x00000004 /* RW--V */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND                         3:0 /* -WXVF */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND_DECAL            0x00000001 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND_MODULATE         0x00000002 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND_DECALALPHA       0x00000003 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND_MODULATEALPHA    0x00000004 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND_DECALMASK        0x00000005 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND_MODULATEMASK     0x00000006 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND_COPY             0x00000007 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREMAPBLEND_ADD              0x00000008 /* -W--V */
#define NV_PGRAPH_BLEND_MASK_BIT                                5:4 /* -WXVF */
#define NV_PGRAPH_BLEND_MASK_BIT_LSB                     0x00000001 /* -W--V */
#define NV_PGRAPH_BLEND_MASK_BIT_MSB                     0x00000002 /* -W--V */
#define NV_PGRAPH_BLEND_SHADEMODE                               7:6 /* -WXVF */
#define NV_PGRAPH_BLEND_SHADEMODE_FLAT                   0x00000001 /* -W--V */
#define NV_PGRAPH_BLEND_SHADEMODE_GOURAUD                0x00000002 /* -W--V */
#define NV_PGRAPH_BLEND_SHADEMODE_PHONG                  0x00000003 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREPERSPECTIVE                      8:8 /* -WXVF */
#define NV_PGRAPH_BLEND_TEXTUREPERSPECTIVE_FALSE         0x00000000 /* -W--V */
#define NV_PGRAPH_BLEND_TEXTUREPERSPECTIVE_TRUE          0x00000001 /* -W--V */
#define NV_PGRAPH_BLEND_SPECULARENABLE                        12:12 /* -WXVF */
#define NV_PGRAPH_BLEND_SPECULARENABLE_FALSE             0x00000000 /* -W--V */
#define NV_PGRAPH_BLEND_SPECULARENABLE_TRUE              0x00000001 /* -W--V */
#define NV_PGRAPH_BLEND_FOGENABLE                             16:16 /* -WXVF */
#define NV_PGRAPH_BLEND_FOGENABLE_FALSE                  0x00000000 /* -W--V */
#define NV_PGRAPH_BLEND_FOGENABLE_TRUE                   0x00000001 /* -W--V */
#define NV_PGRAPH_BLEND_ALPHABLENDENABLE                        3:3 /* RWXVF */
#define NV_PGRAPH_BLEND_ALPHABLENDENABLE_FALSE           0x00000000 /* RW--V */
#define NV_PGRAPH_BLEND_ALPHABLENDENABLE_TRUE            0x00000001 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND                                7:4 /* RWXVF */
#define NV_PGRAPH_BLEND_SRCBLEND_INVCONSTCOLOR           0x0000000D /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_CONSTALPHA              0x0000000E /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_INVCONSTALPHA           0x0000000F /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_ZERO                    0x00000000 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_ONE                     0x00000001 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_SRCCOLOR                0x00000002 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_INVSRCCOLOR             0x00000003 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_SRCALPHA                0x00000004 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_INVSRCALPHA             0x00000005 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_DESTALPHA               0x00000006 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_INVDESTALPHA            0x00000007 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_DESTCOLOR               0x00000008 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_INVDESTCOLOR            0x00000009 /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_SRCALPHASAT             0x0000000A /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_INVSRCALPHASAT          0x0000000B /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_CONSTCOLOR              0x0000000C /* RW--V */
#define NV_PGRAPH_BLEND_SRCBLEND_BETA                    0x0000000C /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND                              11:8 /* RWXVF */
#define NV_PGRAPH_BLEND_DESTBLEND_ZERO                   0x00000000 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_ONE                    0x00000001 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_SRCCOLOR               0x00000002 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_INVSRCCOLOR            0x00000003 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_SRCALPHA               0x00000004 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_INVSRCALPHA            0x00000005 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_DESTALPHA              0x00000006 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_INVDESTALPHA           0x00000007 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_DESTCOLOR              0x00000008 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_INVDESTCOLOR           0x00000009 /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_SRCALPHASAT            0x0000000A /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_INVSRCALPHASAT         0x0000000B /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_CONSTCOLOR             0x0000000C /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_INVCONSTCOLOR          0x0000000D /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_CONSTALPHA             0x0000000E /* RW--V */
#define NV_PGRAPH_BLEND_DESTBLEND_INVCONSTALPHA          0x0000000F /* RW--V */
#define NV_PGRAPH_BLENDCOLOR                             0x00400E84 /* RW-4R */
#define NV_PGRAPH_BLENDCOLOR_BUNDLE                      0x00000021 /* ----B */
#define NV_PGRAPH_BLENDCOLOR_BLUE                               7:0 /* RWXVF */
#define NV_PGRAPH_BLENDCOLOR_GREEN                             15:8 /* RWXVF */
#define NV_PGRAPH_BLENDCOLOR_RED                              23:16 /* RWXVF */
#define NV_PGRAPH_BLENDCOLOR_ALPHA                            31:24 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER                            0x00400E88 /* RW-4R */
#define NV_PGRAPH_SETUPRASTER_BUNDLE                     0x00000022 /* ----B */
#define NV_PGRAPH_SETUPRASTER_FRONTFACEMODE                     1:0 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_FRONTFACEMODE_FILL         0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_FRONTFACEMODE_POINT        0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_FRONTFACEMODE_LINE         0x00000002 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_BACKFACEMODE                      3:2 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_BACKFACEMODE_FILL          0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_BACKFACEMODE_POINT         0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_BACKFACEMODE_LINE          0x00000002 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POFFSETPOINTENABLE                6:6 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_POFFSETPOINTENABLE_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POFFSETPOINTENABLE_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POFFSETLINEENABLE                 7:7 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_POFFSETLINEENABLE_FALSE    0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POFFSETLINEENABLE_TRUE     0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POFFSETFILLENABLE                 8:8 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_POFFSETFILLENABLE_FALSE    0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POFFSETFILLENABLE_TRUE     0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POINTSMOOTHENABLE                 9:9 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_POINTSMOOTHENABLE_FALSE    0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POINTSMOOTHENABLE_TRUE     0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_LINESMOOTHENABLE                10:10 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_LINESMOOTHENABLE_FALSE     0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_LINESMOOTHENABLE_TRUE      0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POLYSMOOTHENABLE                11:11 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_POLYSMOOTHENABLE_FALSE     0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_POLYSMOOTHENABLE_TRUE      0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_LINEWIDTH                       20:12 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_CULLCONTROL                     22:21 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_CULLCONTROL_CULLNON        0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_CULLCONTROL_CULLFRONTFACE  0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_CULLCONTROL_CULLBACKFACE   0x00000002 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_CULLCONTROL_CULLALL        0x00000003 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_FRONTFACE                       23:23 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_FRONTFACE_CW_FRONT         0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_FRONTFACE_CCW_FRONT        0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_SWATHWIDTH                      27:26 /* R-XVF */
#define NV_PGRAPH_SETUPRASTER_SWATHWIDTH_8               0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_SWATHWIDTH_16              0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_SWATHWIDTH_32              0x00000002 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_SWATHWIDTH_64              0x00000003 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_CULLENABLE                      28:28 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_CULLENABLE_FALSE           0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_CULLENABLE_TRUE            0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_Z_FORMAT                        29:29 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_Z_FORMAT_FIXED             0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_Z_FORMAT_FLOAT             0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_ZCLIPENABLE                     31:30 /* RWXVF */
#define NV_PGRAPH_SETUPRASTER_ZCLIPENABLE_NONE           0x00000000 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_ZCLIPENABLE_MIN_ONLY       0x00000001 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_ZCLIPENABLE_MAX_ONLY       0x00000002 /* RW--V */
#define NV_PGRAPH_SETUPRASTER_ZCLIPENABLE_MIN_AND_MAX    0x00000003 /* RW--V */
#define NV_PGRAPH_FOGCOLOR                               0x00400E8C /* RW-4R */
#define NV_PGRAPH_FOGCOLOR_BUNDLE                        0x00000023 /* ----B */
#define NV_PGRAPH_FOGCOLOR_BLUE                                 7:0 /* RWXVF */
#define NV_PGRAPH_FOGCOLOR_GREEN                               15:8 /* RWXVF */
#define NV_PGRAPH_FOGCOLOR_RED                                23:16 /* RWXVF */
#define NV_PGRAPH_FOGCOLOR_ALPHA                              31:24 /* RWXVF */
#define NV_PGRAPH_ZOFFSETFACTOR                          0x00400E90 /* RW-4R */
#define NV_PGRAPH_ZOFFSETFACTOR_BUNDLE                   0x00000024 /* ----B */
#define NV_PGRAPH_ZOFFSETFACTOR_VALUE                          31:0 /* RWXFF */
#define NV_PGRAPH_ZOFFSETBIAS                            0x00400E94 /* RW-4R */
#define NV_PGRAPH_ZOFFSETBIAS_BUNDLE                     0x00000025 /* ----B */
#define NV_PGRAPH_ZOFFSETBIAS_VALUE                            31:0 /* RWXFF */
#define NV_PGRAPH_ZCLIPMIN                               0x00400E98 /* RW-4R */
#define NV_PGRAPH_ZCLIPMIN_BUNDLE                        0x00000026 /* ----B */
#define NV_PGRAPH_ZCLIPMIN_VALUE                               31:0 /* RWXFF */
#define NV_PGRAPH_ZCLIPMAX                               0x00400E9C /* RW-4R */
#define NV_PGRAPH_ZCLIPMAX_BUNDLE                        0x00000027 /* ----B */
#define NV_PGRAPH_ZCLIPMAX_VALUE                               31:0 /* RWXFF */
#define NV_PGRAPH_COLORKEYCOLOR0                         0x00400EA0 /* RW-4R */
#define NV_PGRAPH_COLORKEYCOLOR0_BUNDLE                  0x00000028 /* ----B */
#define NV_PGRAPH_COLORKEYCOLOR0_VALUE                         31:0 /* RWXVF */
#define NV_PGRAPH_COLORKEYCOLOR1                         0x00400EA4 /* RW-4R */
#define NV_PGRAPH_COLORKEYCOLOR1_BUNDLE                  0x00000029 /* ----B */
#define NV_PGRAPH_COLORKEYCOLOR1_VALUE                         31:0 /* RWXVF */
#define NV_PGRAPH_POINTSIZE                              0x00400EA8 /* RW-4R */
#define NV_PGRAPH_POINTSIZE_BUNDLE                       0x0000002A /* ----B */
#define NV_PGRAPH_POINTSIZE_VALUE                               8:0 /* RWXVF */
#define NV_PGRAPH_WINDOWCLIP_HORIZONTAL(i)       (0x00400F00+(i)*4) /* RW-4A */
#define NV_PGRAPH_WINDOWCLIP_HORIZONTAL__SIZE_1                   8 /*       */
#define NV_PGRAPH_WINDOWCLIP_HORIZONTAL_MIN                    11:0 /* RWXSF */
#define NV_PGRAPH_WINDOWCLIP_HORIZONTAL_MAX                   27:16 /* RWXSF */
#define NV_PGRAPH_WINDOWCLIP_VERTICAL(i)         (0x00400F20+(i)*4) /* RW-4A */
#define NV_PGRAPH_WINDOWCLIP_VERTICAL__SIZE_1                     8 /*       */
#define NV_PGRAPH_WINDOWCLIP_VERTICAL_MIN                      11:0 /* RWXSF */
#define NV_PGRAPH_WINDOWCLIP_VERTICAL_MAX                     27:16 /* RWXSF */
#define NV_PGRAPH_XFMODE0                                0x00400F40 /* RW-4R */
#define NV_PGRAPH_XFMODE0_T0_EN                                 0:0 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T0_EN_OFF                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_EN_ON                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_MODE                               1:1 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T0_MODE_PASS                   0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_MODE_TRANSFORM              0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_DIV                                2:2 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T0_DIV_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_DIV_ON                      0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_S                                  5:3 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T0_S_PASS                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_S_EYE                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_S_OBJECT                    0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_S_SPHERE                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_S_NORMAL                    0x00000004 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_S_REFLECTION                0x00000005 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_S_EMBOSS                    0x00000006 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_T                                  8:6 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T0_T_PASS                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_T_EYE                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_T_OBJECT                    0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_T_SPHERE                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_T_NORMAL                    0x00000004 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_T_REFLECTION                0x00000005 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_T_EMBOSS                    0x00000006 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_U                                 11:9 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T0_U_PASS                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_U_EYE                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_U_OBJECT                    0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_U_NORMAL                    0x00000004 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_U_REFLECTION                0x00000005 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_U_EMBOSS                    0x00000006 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_Q                                13:12 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T0_Q_PASS                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_Q_EYE                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T0_Q_OBJECT                    0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_EN                               14:14 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T1_EN_OFF                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_EN_ON                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_MODE                             15:15 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T1_MODE_PASS                   0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_MODE_TRANSFORM              0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_DIV                              16:16 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T1_DIV_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_DIV_ON                      0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_S                                19:17 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T1_S_PASS                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_S_EYE                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_S_OBJECT                    0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_S_SPHERE                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_S_NORMAL                    0x00000004 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_S_REFLECTION                0x00000005 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_S_EMBOSS                    0x00000006 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_T                                22:20 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T1_T_PASS                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_T_EYE                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_T_OBJECT                    0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_T_SPHERE                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_T_NORMAL                    0x00000004 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_T_REFLECTION                0x00000005 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_T_EMBOSS                    0x00000006 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_U                                25:23 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T1_U_PASS                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_U_EYE                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_U_OBJECT                    0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_U_NORMAL                    0x00000004 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_U_REFLECTION                0x00000005 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_U_EMBOSS                    0x00000006 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_Q                                27:26 /* RWXVF */
#define NV_PGRAPH_XFMODE0_T1_Q_PASS                      0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_Q_EYE                       0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_T1_Q_OBJECT                    0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE0_EYETYPE                             28:28 /* RWXVF */
#define NV_PGRAPH_XFMODE0_EYETYPE_INFINITE               0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_EYETYPE_LOCAL                  0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_LIGHTING                            29:29 /* RWXVF */
#define NV_PGRAPH_XFMODE0_LIGHTING_OFF                   0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_LIGHTING_ON                    0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_NORMAL                              30:30 /* RWXVF */
#define NV_PGRAPH_XFMODE0_NORMAL_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_NORMAL_ON                      0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE0_FOG                                 31:31 /* RWXVF */
#define NV_PGRAPH_XFMODE0_FOG_OFF                        0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE0_FOG_ON                         0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1                                0x00400F44 /* RW-4R */
#define NV_PGRAPH_XFMODE1_LIGHT0                                1:0 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LIGHT0_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT0_INFINITE                0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT0_LOCAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT0_SPOT                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT1                                3:2 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LIGHT1_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT1_INFINITE                0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT1_LOCAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT1_SPOT                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT2                                5:4 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LIGHT2_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT2_INFINITE                0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT2_LOCAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT2_SPOT                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT3                                7:6 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LIGHT3_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT3_INFINITE                0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT3_LOCAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT3_SPOT                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT4                                9:8 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LIGHT4_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT4_INFINITE                0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT4_LOCAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT4_SPOT                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT5                              11:10 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LIGHT5_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT5_INFINITE                0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT5_LOCAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT5_SPOT                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT6                              13:12 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LIGHT6_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT6_INFINITE                0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT6_LOCAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT6_SPOT                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT7                              15:14 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LIGHT7_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT7_INFINITE                0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT7_LOCAL                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_LIGHT7_SPOT                    0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_FOGGEN                              17:16 /* RWXVF */
#define NV_PGRAPH_XFMODE1_FOGGEN_OFF                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_FOGGEN_RADIAL                  0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_FOGGEN_PLANE                   0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_FOGGEN_ABS_PLANAR              0x00000003 /* RW--V */
#define NV_PGRAPH_XFMODE1_LAT                                 18:18 /* RWXVF */
#define NV_PGRAPH_XFMODE1_LAT_OFF                        0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_LAT_ON                         0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR1I                             19:19 /* RWXVF */
#define NV_PGRAPH_XFMODE1_COLOR1I_OFF                    0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR1I_PASS                   0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR1O                             20:20 /* RWXVF */
#define NV_PGRAPH_XFMODE1_COLOR1O_OFF                    0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR1O_PASS                   0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR_MATERIAL                      24:21 /* RWXVF */
#define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_DISABLED        0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_EMISSION        0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_AMBIENT         0x00000002 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_DIFFUSE         0x00000004 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_AMBIENT_DIFFUSE 0x00000006 /* RW--V */
#define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_SPECULAR        0x00000008 /* RW--V */
#define NV_PGRAPH_XFMODE1_POINT_PARAM                         25:25 /* RWXVF */
#define NV_PGRAPH_XFMODE1_POINT_PARAM_OFF                0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_POINT_PARAM_ON                 0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_RESERVED                            26:26 /* RWXVF */
#define NV_PGRAPH_XFMODE1_RESERVED_0                     0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_SKIN_EN                             27:27 /* RWXVF */
#define NV_PGRAPH_XFMODE1_SKIN_EN_OFF                    0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_SKIN_EN_ON                     0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_PASS                                28:28 /* RWXVF */
#define NV_PGRAPH_XFMODE1_PASS_FULLOPERATION             0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_PASS_PASSTHROUGH               0x00000001 /* RW--V */
#define NV_PGRAPH_XFMODE1_HALFOFFSET                          29:29 /* RWXVF */
#define NV_PGRAPH_XFMODE1_HALFOFFSET_OFF                 0x00000000 /* RW--V */
#define NV_PGRAPH_XFMODE1_HALFOFFSET_ON                  0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0                           0x00400F48 /* RW-4R */
#define NV_PGRAPH_GLOBALSTATE0_FOGMODE                          2:0 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_FOGMODE_LINEAR            0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_FOGMODE_EXP               0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_FOGMODE_EXP2              0x00000003 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_FOGMODE_EXP_ABS           0x00000005 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_FOGMODE_EXP2_ABS          0x00000007 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_WINDOW_CLIPMODE                  4:4 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_WINDOW_CLIPMODE_INCLUSIVE 0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_WINDOW_CLIPMODE_EXCLUSIVE 0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_WITHIN_BEGINEND                  8:8 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_WITHIN_BEGINEND_FALSE     0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_WITHIN_BEGINEND_TRUE      0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_SINGLETEX           16:16 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_SINGLETEX_TRUE 0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_SINGLETEX           17:17 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_SINGLETEX_TRUE 0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_BYPASS              18:18 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_BYPASS_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_BYPASS_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_BYPASS              19:19 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_BYPASS_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_BYPASS_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_ADDCMP              20:20 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_ADDCMP_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_ADDCMP_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_ADDCMP              21:21 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_ADDCMP_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_ADDCMP_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_ADDCMP              22:22 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_ADDCMP_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_ADDCMP_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_ADDCMP              23:23 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_ADDCMP_FALSE   0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_ADDCMP_TRUE    0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP                        26:24 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z16ZFIXEDZBUFFER  0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z16ZFIXEDWBUFFER  0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z16ZFLOATZBUFFER  0x00000002 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z16ZFLOATWBUFFER  0x00000003 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z24ZFIXEDZBUFFER  0x00000004 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z24ZFIXEDWBUFFER  0x00000005 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z24ZFLOATZBUFFER  0x00000006 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z24ZFLOATWBUFFER  0x00000007 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_INITIALIZED                  28:28 /* RWXVF */
#define NV_PGRAPH_GLOBALSTATE0_Z_INITIALIZED_FALSE       0x00000000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE0_Z_INITIALIZED_TRUE        0x00000001 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE1                           0x00400F4C /* RW-4R */
#define NV_PGRAPH_GLOBALSTATE1_DMA_INSTANCE_2                  15:0 /* RWXUF */
#define NV_PGRAPH_GLOBALSTATE1_DMA_INSTANCE_2_INVALID        0x0000 /* RW--V */
#define NV_PGRAPH_GLOBALSTATE1_DMA_INSTANCE_3                 31:16 /* RWXUF */
#define NV_PGRAPH_GLOBALSTATE1_DMA_INSTANCE_3_INVALID        0x0000 /* RW--V */
#define NV_PGRAPH_PIPE_ADDRESS                           0x00400F50 /* RW-4R */
#define NV_PGRAPH_PIPE_ADDRESS_VALUE                           14:2 /* RWXVF */
#define NV_PGRAPH_PIPE_DATA                              0x00400F54 /* RW-4R */
#define NV_PGRAPH_PIPE_DATA_VALUE                              31:0 /* RWXVF */
#define NV_PGRAPH_DMA_START_0                            0x00401000 /* RW-4R */
#define NV_PGRAPH_DMA_START_0_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_DMA_START_1                            0x00401004 /* RW-4R */
#define NV_PGRAPH_DMA_START_1_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_DMA_LENGTH                             0x00401008 /* RW-4R */
#define NV_PGRAPH_DMA_LENGTH_VALUE                             21:0 /* RWXUF */
#define NV_PGRAPH_DMA_MISC                               0x0040100C /* RW-4R */
#define NV_PGRAPH_DMA_MISC_COUNT                               15:0 /* RWXUF */
#define NV_PGRAPH_DMA_MISC_FMT_SRC                            18:16 /* RWXVF */
#define NV_PGRAPH_DMA_MISC_FMT_DST                            22:20 /* RWXVF */
#define NV_PGRAPH_DMA_DATA_0                             0x00401020 /* RW-4R */
#define NV_PGRAPH_DMA_DATA_0_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_DMA_DATA_1                             0x00401024 /* RW-4R */
#define NV_PGRAPH_DMA_DATA_1_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_DMA_RM                                 0x00401030 /* RW-4R */
#define NV_PGRAPH_DMA_RM_ASSIST_A                               0:0 /* RWIVF */
#define NV_PGRAPH_DMA_RM_ASSIST_A_NOT_PENDING            0x00000000 /* R-I-V */
#define NV_PGRAPH_DMA_RM_ASSIST_A_PENDING                0x00000001 /* R---V */
#define NV_PGRAPH_DMA_RM_ASSIST_A_RESET                  0x00000001 /* -W--C */
#define NV_PGRAPH_DMA_RM_ASSIST_B                               1:1 /* RWIVF */
#define NV_PGRAPH_DMA_RM_ASSIST_B_NOT_PENDING            0x00000000 /* R-I-V */
#define NV_PGRAPH_DMA_RM_ASSIST_B_PENDING                0x00000001 /* R---V */
#define NV_PGRAPH_DMA_RM_ASSIST_B_RESET                  0x00000001 /* -W--C */
#define NV_PGRAPH_DMA_RM_WRITE_REQ                              4:4 /* CWIVF */
#define NV_PGRAPH_DMA_RM_WRITE_REQ_NOT_PENDING           0x00000000 /* CWI-V */
#define NV_PGRAPH_DMA_RM_WRITE_REQ_PENDING               0x00000001 /* -W--T */
#define NV_PGRAPH_DMA_A_XLATE_INST                       0x00401040 /* RW-4R */
#define NV_PGRAPH_DMA_A_XLATE_INST_VALUE                       15:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_CONTROL                          0x00401044 /* RW-4R */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE                    12:12 /* RWIVF */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE_NOT_PRESENT   0x00000000 /* RWI-V */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE_PRESENT       0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY                    13:13 /* RWXVF */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY_NOT_LINEAR    0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY_LINEAR        0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE                   17:16 /* RWXUF */
#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_NVM          0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_PCI          0x00000002 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_AGP          0x00000003 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_ADJUST                        31:20 /* RWXUF */
#define NV_PGRAPH_DMA_A_LIMIT                            0x00401048 /* RW-4R */
#define NV_PGRAPH_DMA_A_LIMIT_OFFSET                           31:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_TLB_PTE                          0x0040104C /* RW-4R */
#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS                          1:1 /* RWXVF */
#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS_READ_ONLY         0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS_READ_WRITE        0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_A_TLB_PTE_FRAME_ADDRESS                 31:12 /* RWXUF */
#define NV_PGRAPH_DMA_A_TLB_TAG                          0x00401050 /* RW-4R */
#define NV_PGRAPH_DMA_A_TLB_TAG_ADDRESS                       31:12 /* RWXUF */
#define NV_PGRAPH_DMA_A_ADJ_OFFSET                       0x00401054 /* RW-4R */
#define NV_PGRAPH_DMA_A_ADJ_OFFSET_VALUE                       31:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_OFFSET                           0x00401058 /* RW-4R */
#define NV_PGRAPH_DMA_A_OFFSET_VALUE                           31:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_SIZE                             0x0040105C /* RW-4R */
#define NV_PGRAPH_DMA_A_SIZE_VALUE                             24:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_Y_SIZE                           0x00401060 /* RW-4R */
#define NV_PGRAPH_DMA_A_Y_SIZE_VALUE                           10:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_XLATE_INST                       0x00401080 /* RW-4R */
#define NV_PGRAPH_DMA_B_XLATE_INST_VALUE                       15:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_CONTROL                          0x00401084 /* RW-4R */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE                    12:12 /* RWIVF */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE_NOT_PRESENT   0x00000000 /* RWI-V */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE_PRESENT       0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY                    13:13 /* RWXVF */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY_NOT_LINEAR    0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY_LINEAR        0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE                   17:16 /* RWXUF */
#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_NVM          0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_PCI          0x00000002 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_AGP          0x00000003 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_ADJUST                        31:20 /* RWXUF */
#define NV_PGRAPH_DMA_B_LIMIT                            0x00401088 /* RW-4R */
#define NV_PGRAPH_DMA_B_LIMIT_OFFSET                           31:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_TLB_PTE                          0x0040108C /* RW-4R */
#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS                          1:1 /* RWXVF */
#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS_READ_ONLY         0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS_READ_WRITE        0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_B_TLB_PTE_FRAME_ADDRESS                 31:12 /* RWXUF */
#define NV_PGRAPH_DMA_B_TLB_TAG                          0x00401090 /* RW-4R */
#define NV_PGRAPH_DMA_B_TLB_TAG_ADDRESS                       31:12 /* RWXUF */
#define NV_PGRAPH_DMA_B_ADJ_OFFSET                       0x00401094 /* RW-4R */
#define NV_PGRAPH_DMA_B_ADJ_OFFSET_VALUE                       31:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_OFFSET                           0x00401098 /* RW-4R */
#define NV_PGRAPH_DMA_B_OFFSET_VALUE                           31:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_SIZE                             0x0040109C /* RW-4R */
#define NV_PGRAPH_DMA_B_SIZE_VALUE                             24:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_Y_SIZE                           0x004010A0 /* RW-4R */
#define NV_PGRAPH_DMA_B_Y_SIZE_VALUE                           10:0 /* RWXUF */
#define NV_PGRAPH_CONTROL_OUT_INTERPOLATOR                      1:0 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_INTERPOLATOR_ZOH_MS        0x00000000 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_INTERPOLATOR_ZOH           0x00000001 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_INTERPOLATOR_FOH           0x00000002 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_WRAP_U                            5:4 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_WRAP_U_CYLINDRICAL         0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_WRAP_U_WRAP                0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_WRAP_U_MIRROR              0x00000002 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_WRAP_U_CLAMP               0x00000003 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_WRAP_V                            7:6 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_WRAP_V_CYLINDRICAL         0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_WRAP_V_WRAP                0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_WRAP_V_MIRROR              0x00000002 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_WRAP_V_CLAMP               0x00000003 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_COLOR_FORMAT                      8:8 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_COLOR_FORMAT_LE_X8R8G8B8   0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_COLOR_FORMAT_LE_A8R8G8B8   0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_SRCCOLOR                        11:10 /* -W-UF */
#define NV_PGRAPH_CONTROL_OUT_SRCCOLOR_NORMAL            0x00000000 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_SRCCOLOR_COLOR_INVERSE     0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_SRCCOLOR_ALPHA_INVERSE     0x00000002 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_SRCCOLOR_ALPHA_ONE         0x00000003 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_CULLING                         13:12 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_CULLING_ILLEGAL            0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_CULLING_NONE               0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_CULLING_COUNTERCLOCKWISE   0x00000002 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_CULLING_CLOCKWISE          0x00000003 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZBUFFER                         15:15 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_ZBUFFER_SCREEN             0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_ZBUFFER_LINEAR             0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE                    19:16 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_ILLEGAL       0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_FALSE         0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_LT            0x00000002 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_EQ            0x00000003 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_LE            0x00000004 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_GT            0x00000005 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_NE            0x00000006 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_GE            0x00000007 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_TRUE          0x00000008 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE                      22:20 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_NEVER           0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_ALPHA           0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_ALPHA_ZETA      0x00000002 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_ZETA            0x00000003 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_ALWAYS          0x00000004 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE                     26:24 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE_NEVER          0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE_ALPHA          0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE_ALPHA_ZETA     0x00000002 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE_ZETA           0x00000003 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_ROP                             28:28 /* -WIUF */
#define NV_PGRAPH_CONTROL_OUT_ROP_BLEND_AND              0x00000000 /* -WIUV */
#define NV_PGRAPH_CONTROL_OUT_ROP_ADD_WITH_SATURATION    0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_BLEND_BETA                      29:29 /* -W-UF */
#define NV_PGRAPH_CONTROL_OUT_BLEND_BETA_SRCALPHA        0x00000000 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_BLEND_BETA_DESTCOLOR       0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT0                    30:30 /* -W-UF */
#define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT0_DESTCOLOR     0x00000000 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT0_ZERO          0x00000001 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT1                    31:31 /* -W-UF */
#define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT1_SRCCOLOR      0x00000000 /* -W-UV */
#define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT1_ZERO          0x00000001 /* -W-UV */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_KEY                          7:0 /* RWXUF */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE                     11:8 /* RWXVF */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_ILLEGAL       0x00000000 /* RW--V */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_FALSE         0x00000001 /* RW--V */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_LT            0x00000002 /* RW--V */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_EQ            0x00000003 /* RW--V */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_LE            0x00000004 /* RW--V */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_GT            0x00000005 /* RW--V */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_NE            0x00000006 /* RW--V */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_GE            0x00000007 /* RW--V */
#define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_TRUE          0x00000008 /* RW--V */
/* dev_video.ref */
#define NV_PVIDEO                             0x00008FFF:0x00008000 /* RW--D */
#define NV_PVIDEO_DEBUG_0                                0x00008080 /* RW-4R */
#define NV_PVIDEO_DEBUG_0_HLF_RATE_ROW_RD                       0:0 /* RWIVF */
#define NV_PVIDEO_DEBUG_0_HLF_RATE_ROW_RD_DISABLED       0x00000000 /* RWI-V */
#define NV_PVIDEO_DEBUG_0_HLF_RATE_ROW_RD_ENABLED        0x00000001 /* RW--V */
#define NV_PVIDEO_DEBUG_0_LIMIT_CHECK                           4:4 /* RWIVF */
#define NV_PVIDEO_DEBUG_0_LIMIT_CHECK_DISABLED           0x00000000 /* RW--V */
#define NV_PVIDEO_DEBUG_0_LIMIT_CHECK_ENABLED            0x00000001 /* RWI-V */
#define NV_PVIDEO_DEBUG_0_HUE_FOLD                              8:8 /* RWIVF */
#define NV_PVIDEO_DEBUG_0_HUE_FOLD_DISABLED              0x00000000 /* RWI-V */
#define NV_PVIDEO_DEBUG_0_HUE_FOLD_ENABLED               0x00000001 /* RW--V */
#define NV_PVIDEO_DEBUG_1                                0x00008084 /* RW-4R */
#define NV_PVIDEO_DEBUG_1_REQ_DELAY                            10:0 /* RWIVF */
#define NV_PVIDEO_DEBUG_1_REQ_DELAY_DEFAULT              0x00000064 /* RWI-V */
#define NV_PVIDEO_DEBUG_2                                0x00008088 /* RW-4R */
#define NV_PVIDEO_DEBUG_2_BURST1                               10:5 /* RWIVF */
#define NV_PVIDEO_DEBUG_2_BURST1_DEFAULT                 0x00000008 /* RWI-V */
#define NV_PVIDEO_DEBUG_2_BURST2                              26:21 /* RWIVF */
#define NV_PVIDEO_DEBUG_2_BURST2_DEFAULT                 0x00000010 /* RWI-V */
#define NV_PVIDEO_DEBUG_3                                0x0000808c /* RW-4R */
#define NV_PVIDEO_DEBUG_3_WATER_MARK1                          10:4 /* RWIVF */
#define NV_PVIDEO_DEBUG_3_WATER_MARK1_DEFAULT            0x0000004b /* RWI-V */
#define NV_PVIDEO_DEBUG_3_WATER_MARK2                         26:20 /* RWIVF */
#define NV_PVIDEO_DEBUG_3_WATER_MARK2_DEFAULT            0x0000003b /* RWI-V */
#define NV_PVIDEO_DEBUG_4                                0x00008090 /* RW-4R */
#define NV_PVIDEO_DEBUG_4_V_COEFF_B                            23:5 /* RWIVF */
#define NV_PVIDEO_DEBUG_4_V_COEFF_B_DEFAULT              0x0000b505 /* RWI-V */
#define NV_PVIDEO_DEBUG_4_V_COEFF_B_ALWAYS               0x00000000 /* RW--V */
#define NV_PVIDEO_DEBUG_4_V_COEFF_B_NEVER                0x0007ffff /* RW--V */
#define NV_PVIDEO_DEBUG_5                                0x00008094 /* RW-4R */
#define NV_PVIDEO_DEBUG_5_H_L_COEFF_D                          21:4 /* RWIVF */
#define NV_PVIDEO_DEBUG_5_H_L_COEFF_D_DEFAULT            0x00018816 /* RWI-V */
#define NV_PVIDEO_DEBUG_5_H_L_COEFF_D_ALWAYS             0x00000000 /* RW--V */
#define NV_PVIDEO_DEBUG_5_H_L_COEFF_D_NEVER              0x0003ffff /* RW--V */
#define NV_PVIDEO_DEBUG_6                                0x00008098 /* RW-4R */
#define NV_PVIDEO_DEBUG_6_H_L_COEFF_C                          21:4 /* RWIVF */
#define NV_PVIDEO_DEBUG_6_H_L_COEFF_C_DEFAULT            0x00012c73 /* RWI-V */
#define NV_PVIDEO_DEBUG_6_H_L_COEFF_C_ALWAYS             0x00000000 /* RW--V */
#define NV_PVIDEO_DEBUG_6_H_L_COEFF_C_NEVER              0x0003ffff /* RW--V */
#define NV_PVIDEO_DEBUG_7                                0x0000809c /* RW-4R */
#define NV_PVIDEO_DEBUG_7_H_L_COEFF_B                          21:4 /* RWIVF */
#define NV_PVIDEO_DEBUG_7_H_L_COEFF_B_DEFAULT            0x00000000 /* RWI-V */
#define NV_PVIDEO_DEBUG_7_H_L_COEFF_B_ALWAYS             0x00000000 /* RW--V */
#define NV_PVIDEO_DEBUG_7_H_L_COEFF_B_NEVER              0x0003ffff /* RW--V */
#define NV_PVIDEO_DEBUG_8                                0x000080a0 /* RW-4R */
#define NV_PVIDEO_DEBUG_8_PIPE_FILL                            10:4 /* RWIVF */
#define NV_PVIDEO_DEBUG_8_PIPE_FILL_DEFAULT              0x0000000b /* RWI-V */
#define NV_PVIDEO_DEBUG_9                                0x000080a4 /* RW-4R */
#define NV_PVIDEO_DEBUG_9_FIFO_A_UNDERFLOW                      0:0 /* RWIVF */
#define NV_PVIDEO_DEBUG_9_FIFO_A_UNDERFLOW_FALSE         0x00000000 /* R-I-V */
#define NV_PVIDEO_DEBUG_9_FIFO_A_UNDERFLOW_TRUE          0x00000001 /* R---V */
#define NV_PVIDEO_DEBUG_9_FIFO_A_UNDERFLOW_RESET         0x00000001 /* -W--C */
#define NV_PVIDEO_DEBUG_9_FIFO_A_OVERFLOW                       4:4 /* RWIVF */
#define NV_PVIDEO_DEBUG_9_FIFO_A_OVERFLOW_FALSE          0x00000000 /* R-I-V */
#define NV_PVIDEO_DEBUG_9_FIFO_A_OVERFLOW_TRUE           0x00000001 /* R---V */
#define NV_PVIDEO_DEBUG_9_FIFO_A_OVERFLOW_RESET          0x00000001 /* -W--C */
#define NV_PVIDEO_DEBUG_9_FIFO_B_UNDERFLOW                      8:8 /* RWIVF */
#define NV_PVIDEO_DEBUG_9_FIFO_B_UNDERFLOW_FALSE         0x00000000 /* R-I-V */
#define NV_PVIDEO_DEBUG_9_FIFO_B_UNDERFLOW_TRUE          0x00000001 /* R---V */
#define NV_PVIDEO_DEBUG_9_FIFO_B_UNDERFLOW_RESET         0x00000001 /* -W--C */
#define NV_PVIDEO_DEBUG_9_FIFO_B_OVERFLOW                     12:12 /* RWIVF */
#define NV_PVIDEO_DEBUG_9_FIFO_B_OVERFLOW_FALSE          0x00000000 /* R-I-V */
#define NV_PVIDEO_DEBUG_9_FIFO_B_OVERFLOW_TRUE           0x00000001 /* R---V */
#define NV_PVIDEO_DEBUG_9_FIFO_B_OVERFLOW_RESET          0x00000001 /* -W--C */
#define NV_PVIDEO_DEBUG_10                               0x000080a8 /* R--4R */
#define NV_PVIDEO_DEBUG_10_SCREEN_LINE                         12:0 /* R-XVF */
#define NV_PVIDEO_DEBUG_10_SCREEN_LINE_FIRST             0x00000000 /* R---V */
#define NV_PVIDEO_DEBUG_10_SCAN_COUNT                         20:16 /* R-XVF */
#define NV_PVIDEO_DEBUG_10_SCAN_COUNT_FIRST              0x00000000 /* R---V */
#define NV_PVIDEO_DEBUG_10_SCAN_COUNT_OVERFLOW           0x00000010 /* R---V */
#define NV_PVIDEO_DEBUG_10_SCANNING                           25:24 /* R-XVF */
#define NV_PVIDEO_DEBUG_10_SCANNING_NEITHER              0x00000000 /* R---V */
#define NV_PVIDEO_DEBUG_10_SCANNING_BUFFER_0             0x00000002 /* R---V */
#define NV_PVIDEO_DEBUG_10_SCANNING_BUFFER_1             0x00000003 /* R---V */
#define NV_PVIDEO_INTR                                   0x00008100 /* RW-4R */
#define NV_PVIDEO_INTR_BUFFER_0                                 0:0 /* RWIVF */
#define NV_PVIDEO_INTR_BUFFER_0_NOT_PENDING              0x00000000 /* R-I-V */
#define NV_PVIDEO_INTR_BUFFER_0_PENDING                  0x00000001 /* R---V */
#define NV_PVIDEO_INTR_BUFFER_0_RESET                    0x00000001 /* -W--C */
#define NV_PVIDEO_INTR_BUFFER_1                                 4:4 /* RWIVF */
#define NV_PVIDEO_INTR_BUFFER_1_NOT_PENDING              0x00000000 /* R-I-V */
#define NV_PVIDEO_INTR_BUFFER_1_PENDING                  0x00000001 /* R---V */
#define NV_PVIDEO_INTR_BUFFER_1_RESET                    0x00000001 /* -W--C */
#define NV_PVIDEO_INTR_REASON                            0x00008104 /* R--4R */
#define NV_PVIDEO_INTR_REASON_BUFFER_0                          0:0 /* R-IVF */
#define NV_PVIDEO_INTR_REASON_BUFFER_0_NOTIFICATION      0x00000000 /* R-I-V */
#define NV_PVIDEO_INTR_REASON_BUFFER_0_PROTECTION_FAULT  0x00000001 /* R---V */
#define NV_PVIDEO_INTR_REASON_BUFFER_1                          4:4 /* R-IVF */
#define NV_PVIDEO_INTR_REASON_BUFFER_1_NOTIFICATION      0x00000000 /* R-I-V */
#define NV_PVIDEO_INTR_REASON_BUFFER_1_PROTECTION_FAULT  0x00000001 /* R---V */
#define NV_PVIDEO_INTR_EN                                0x00008140 /* RW-4R */
#define NV_PVIDEO_INTR_EN_BUFFER_0                              0:0 /* RWIVF */
#define NV_PVIDEO_INTR_EN_BUFFER_0_DISABLED              0x00000000 /* RWI-V */
#define NV_PVIDEO_INTR_EN_BUFFER_0_ENABLED               0x00000001 /* RW--V */
#define NV_PVIDEO_INTR_EN_BUFFER_1                              4:4 /* RWIVF */
#define NV_PVIDEO_INTR_EN_BUFFER_1_DISABLED              0x00000000 /* RWI-V */
#define NV_PVIDEO_INTR_EN_BUFFER_1_ENABLED               0x00000001 /* RW--V */
#define NV_PVIDEO_BUFFER                                 0x00008700 /* RW-4R */
#define NV_PVIDEO_BUFFER_0_USE                                  0:0 /* RWIVF */
#define NV_PVIDEO_BUFFER_0_USE_NOT_PENDING               0x00000000 /* R-I-V */
#define NV_PVIDEO_BUFFER_0_USE_PENDING                   0x00000001 /* R---V */
#define NV_PVIDEO_BUFFER_0_USE_SET                       0x00000001 /* -W--S */
#define NV_PVIDEO_BUFFER_1_USE                                  4:4 /* RWIVF */
#define NV_PVIDEO_BUFFER_1_USE_NOT_PENDING               0x00000000 /* R-I-V */
#define NV_PVIDEO_BUFFER_1_USE_PENDING                   0x00000001 /* R---V */
#define NV_PVIDEO_BUFFER_1_USE_SET                       0x00000001 /* -W--S */
#define NV_PVIDEO_STOP                                   0x00008704 /* RW-4R */
#define NV_PVIDEO_STOP_OVERLAY                                  0:0 /* RWIVF */
#define NV_PVIDEO_STOP_OVERLAY_INACTIVE                  0x00000000 /* RWI-V */
#define NV_PVIDEO_STOP_OVERLAY_ACTIVE                    0x00000001 /* RW--V */
#define NV_PVIDEO_STOP_METHOD                                   4:4 /* RWIVF */
#define NV_PVIDEO_STOP_METHOD_IMMEDIATELY                0x00000000 /* RW--V */
#define NV_PVIDEO_STOP_METHOD_NORMALLY                   0x00000001 /* RWI-V */
#define NV_PVIDEO_BASE(i)                        (0x00008900+(i)*4) /* RW-4A */
#define NV_PVIDEO_BASE__SIZE_1                                    2 /*       */
#define NV_PVIDEO_BASE_VALUE                                   26:6 /* RWXVF */
#define NV_PVIDEO_LIMIT(i)                       (0x00008908+(i)*4) /* RW-4A */
#define NV_PVIDEO_LIMIT__SIZE_1                                   2 /*       */
#define NV_PVIDEO_LIMIT_VALUE                                  26:6 /* RWXVF */
#define NV_PVIDEO_LIMIT_VALUE_MAX                        0x001fffff /* RW--V */
#define NV_PVIDEO_LUMINANCE(i)                   (0x00008910+(i)*4) /* RW-4A */
#define NV_PVIDEO_LUMINANCE__SIZE_1                               2 /*       */
#define NV_PVIDEO_LUMINANCE_CONTRAST                           12:3 /* RWXVF */
#define NV_PVIDEO_LUMINANCE_CONTRAST_47                  0x00000200 /* RWC-V */
#define NV_PVIDEO_LUMINANCE_CONTRAST_83                  0x00000200 /* RWC-V */
#define NV_PVIDEO_LUMINANCE_CONTRAST_UNITY               0x00000200 /* RW--V */
#define NV_PVIDEO_LUMINANCE_BRIGHTNESS                        25:16 /* RWXVF */
#define NV_PVIDEO_LUMINANCE_BRIGHTNESS_47                0x00000000 /* RWC-V */
#define NV_PVIDEO_LUMINANCE_BRIGHTNESS_83                0x00000000 /* RWC-V */
#define NV_PVIDEO_LUMINANCE_BRIGHTNESS_UNITY             0x00000000 /* RW--V */
#define NV_PVIDEO_CHROMINANCE(i)                 (0x00008918+(i)*4) /* RW-4A */
#define NV_PVIDEO_CHROMINANCE__SIZE_1                             2 /*       */
#define NV_PVIDEO_CHROMINANCE_SAT_COS                          13:2 /* RWXVF */
#define NV_PVIDEO_CHROMINANCE_SAT_COS_47                 0x00000400 /* RWC-V */
#define NV_PVIDEO_CHROMINANCE_SAT_COS_83                 0x00000400 /* RWC-V */
#define NV_PVIDEO_CHROMINANCE_SAT_COS_UNITY              0x00000400 /* RW--V */
#define NV_PVIDEO_CHROMINANCE_SAT_SIN                         29:18 /* RWXVF */
#define NV_PVIDEO_CHROMINANCE_SAT_SIN_47                 0x00000000 /* RWC-V */
#define NV_PVIDEO_CHROMINANCE_SAT_SIN_83                 0x00000000 /* RWC-V */
#define NV_PVIDEO_CHROMINANCE_SAT_SIN_UNITY              0x00000000 /* RW--V */
#define NV_PVIDEO_OFFSET(i)                      (0x00008920+(i)*4) /* RW-4A */
#define NV_PVIDEO_OFFSET__SIZE_1                                  2 /*       */
#define NV_PVIDEO_OFFSET_VALUE                                 31:6 /* RWXVF */
#define NV_PVIDEO_OFFSET_VALUE_47                        0x00000000 /* RWC-V */
#define NV_PVIDEO_OFFSET_VALUE_83                        0x00000000 /* RWC-V */
#define NV_PVIDEO_OFFSET_VALUE_ZERO                      0x00000000 /* RW--V */
#define NV_PVIDEO_SIZE_IN(i)                     (0x00008928+(i)*4) /* RW-4A */
#define NV_PVIDEO_SIZE_IN__SIZE_1                                 2 /*       */
#define NV_PVIDEO_SIZE_IN_WIDTH                                10:1 /* RWXVF */
#define NV_PVIDEO_SIZE_IN_WIDTH_47                       0x00000001 /* RWC-V */
#define NV_PVIDEO_SIZE_IN_WIDTH_83                       0x00000001 /* RWC-V */
#define NV_PVIDEO_SIZE_IN_HEIGHT                              26:16 /* RWXVF */
#define NV_PVIDEO_SIZE_IN_HEIGHT_47                      0x00000002 /* RWC-V */
#define NV_PVIDEO_SIZE_IN_HEIGHT_83                      0x00000002 /* RWC-V */
#define NV_PVIDEO_POINT_IN(i)                    (0x00008930+(i)*4) /* RW-4A */
#define NV_PVIDEO_POINT_IN__SIZE_1                                2 /*       */
#define NV_PVIDEO_POINT_IN_S                                   14:0 /* RWXVF */
#define NV_PVIDEO_POINT_IN_S_47                          0x00000000 /* RWC-V */
#define NV_PVIDEO_POINT_IN_S_83                          0x00000000 /* RWC-V */
#define NV_PVIDEO_POINT_IN_S_ORIGIN                      0x00000000 /* RW--V */
#define NV_PVIDEO_POINT_IN_T                                  31:17 /* RWXVF */
#define NV_PVIDEO_POINT_IN_T_47                          0x00000000 /* RWC-V */
#define NV_PVIDEO_POINT_IN_T_83                          0x00000000 /* RWC-V */
#define NV_PVIDEO_POINT_IN_T_ORIGIN                      0x00000000 /* RW--V */
#define NV_PVIDEO_DS_DX(i)                       (0x00008938+(i)*4) /* RW-4A */
#define NV_PVIDEO_DS_DX__SIZE_1                                   2 /*       */
#define NV_PVIDEO_DS_DX_RATIO                                  23:3 /* RWXVF */
#define NV_PVIDEO_DS_DX_RATIO_47                         0x00000000 /* RWC-V */
#define NV_PVIDEO_DS_DX_RATIO_83                         0x00000000 /* RWC-V */
#define NV_PVIDEO_DS_DX_RATIO_UNITY                      0x00020000 /* RW--V */
#define NV_PVIDEO_DT_DY(i)                       (0x00008940+(i)*4) /* RW-4A */
#define NV_PVIDEO_DT_DY__SIZE_1                                   2 /*       */
#define NV_PVIDEO_DT_DY_RATIO                                  23:4 /* RWXVF */
#define NV_PVIDEO_DT_DY_RATIO_47                         0x00000000 /* RWC-V */
#define NV_PVIDEO_DT_DY_RATIO_83                         0x00000000 /* RWC-V */
#define NV_PVIDEO_DT_DY_RATIO_UNITY                      0x00010000 /* RW--V */
#define NV_PVIDEO_POINT_OUT(i)                   (0x00008948+(i)*4) /* RW-4A */
#define NV_PVIDEO_POINT_OUT__SIZE_1                               2 /*       */
#define NV_PVIDEO_POINT_OUT_X                                  11:0 /* RWXVF */
#define NV_PVIDEO_POINT_OUT_X_47                         0x00000000 /* RWC-V */
#define NV_PVIDEO_POINT_OUT_X_83                         0x00000000 /* RWC-V */
#define NV_PVIDEO_POINT_OUT_X_ORIGIN                     0x00000000 /* RW--V */
#define NV_PVIDEO_POINT_OUT_Y                                 27:16 /* RWXVF */
#define NV_PVIDEO_POINT_OUT_Y_47                         0x00000000 /* RWC-V */
#define NV_PVIDEO_POINT_OUT_Y_83                         0x00000000 /* RWC-V */
#define NV_PVIDEO_POINT_OUT_Y_ORIGIN                     0x00000000 /* RW--V */
#define NV_PVIDEO_SIZE_OUT(i)                    (0x00008950+(i)*4) /* RW-4A */
#define NV_PVIDEO_SIZE_OUT__SIZE_1                                2 /*       */
#define NV_PVIDEO_SIZE_OUT_WIDTH                               11:0 /* RWXVF */
#define NV_PVIDEO_SIZE_OUT_WIDTH_47                      0x00000000 /* RWC-V */
#define NV_PVIDEO_SIZE_OUT_WIDTH_83                      0x00000000 /* RWC-V */
#define NV_PVIDEO_SIZE_OUT_HEIGHT                             27:16 /* RWXVF */
#define NV_PVIDEO_SIZE_OUT_HEIGHT_47                     0x00000000 /* RWC-V */
#define NV_PVIDEO_SIZE_OUT_HEIGHT_83                     0x00000000 /* RWC-V */
#define NV_PVIDEO_FORMAT(i)                      (0x00008958+(i)*4) /* RW-4A */
#define NV_PVIDEO_FORMAT__SIZE_1                                  2 /*       */
#define NV_PVIDEO_FORMAT_PITCH                                 12:6 /* RWXVF */
#define NV_PVIDEO_FORMAT_PITCH_47                        0x00000000 /* RWC-V */
#define NV_PVIDEO_FORMAT_PITCH_83                        0x00000000 /* RWC-V */
#define NV_PVIDEO_FORMAT_COLOR                                16:16 /* RWXVF */
#define NV_PVIDEO_FORMAT_COLOR_47                        0x00000000 /* RWC-V */
#define NV_PVIDEO_FORMAT_COLOR_83                        0x00000000 /* RWC-V */
#define NV_PVIDEO_FORMAT_COLOR_LE_YB8CR8YA8CB8           0x00000000 /* RW--V */
#define NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8           0x00000001 /* RW--V */
#define NV_PVIDEO_FORMAT_DISPLAY                              20:20 /* RWXVF */
#define NV_PVIDEO_FORMAT_DISPLAY_47                      0x00000000 /* RWC-V */
#define NV_PVIDEO_FORMAT_DISPLAY_83                      0x00000000 /* RWC-V */
#define NV_PVIDEO_FORMAT_DISPLAY_ALWAYS                  0x00000000 /* RW--V */
#define NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY_EQUAL         0x00000001 /* RW--V */
#define NV_PVIDEO_FORMAT_MATRIX                               24:24 /* RWXVF */
#define NV_PVIDEO_FORMAT_MATRIX_ITURBT601                0x00000000 /* RW--V */
#define NV_PVIDEO_FORMAT_MATRIX_ITURBT709                0x00000001 /* RW--V */
#define NV_PVIDEO_COLOR_KEY                              0x00008b00 /* RW-4R */
#define NV_PVIDEO_COLOR_KEY_VALUE                              31:0 /* RWXVF */
#define NV_PVIDEO_COLOR_KEY_VALUE_47                     0x00000000 /* RWC-V */
#define NV_PVIDEO_COLOR_KEY_VALUE_83                     0x00000000 /* RWC-V */
#define NV_PVIDEO_COLOR_KEY_VALUE_DONT_CARE              0x00000000 /* RW--V */
#define NV_PVIDEO_TEST                                   0x00008d00 /* RW-4R */
#define NV_PVIDEO_TEST_MODE                                     0:0 /* RWIVF */
#define NV_PVIDEO_TEST_MODE_DISABLE                      0x00000000 /* RWI-V */
#define NV_PVIDEO_TEST_MODE_ENABLE                       0x00000001 /* RW--V */
#define NV_PVIDEO_TEST_ADDRESS                                 14:8 /* RWXVF */
#define NV_PVIDEO_TST_WRITE(i)                   (0x00008d10+(i)*4) /* -W-4A */
#define NV_PVIDEO_TST_WRITE__SIZE_1                              12 /*       */
#define NV_PVIDEO_TST_WRITE_VALUE                              31:0 /* -WXVF */
#define NV_PVIDEO_TST_READ(i)                    (0x00008d40+(i)*4) /* R--4A */
#define NV_PVIDEO_TST_READ__SIZE_1                               12 /*       */
#define NV_PVIDEO_TST_READ_VALUE                               31:0 /* R-XVF */
/* dev_media.ref */
#define NV_PME                                0x00200FFF:0x00200000 /* RW--D */
#define NV_PME_INTR_0                                    0x00200100 /* RWI4R */
#define NV_PME_INTR_0_TASKA_NOTIFY                              0:0 /* RWIVF */
#define NV_PME_INTR_0_TASKA_NOTIFY_NOT_PENDING           0x00000000 /* R-I-V */
#define NV_PME_INTR_0_TASKA_NOTIFY_PENDING               0x00000001 /* R---V */
#define NV_PME_INTR_0_TASKA_NOTIFY_RESET                 0x00000001 /* -W--V */
#define NV_PME_INTR_0_TASKB_NOTIFY                              4:4 /* RWIVF */
#define NV_PME_INTR_0_TASKB_NOTIFY_NOT_PENDING           0x00000000 /* R-I-V */
#define NV_PME_INTR_0_TASKB_NOTIFY_PENDING               0x00000001 /* R---V */
#define NV_PME_INTR_0_TASKB_NOTIFY_RESET                 0x00000001 /* -W--V */
#define NV_PME_INTR_0_ANC_NOTIFY                                8:8 /* RWIVF */
#define NV_PME_INTR_0_ANC_NOTIFY_NOT_PENDING             0x00000000 /* R-I-V */
#define NV_PME_INTR_0_ANC_NOTIFY_PENDING                 0x00000001 /* R---V */
#define NV_PME_INTR_0_ANC_NOTIFY_RESET                   0x00000001 /* -W--V */
#define NV_PME_INTR_0_FOUT_NOTIFY                             12:12 /* RWIVF */
#define NV_PME_INTR_0_FOUT_NOTIFY_NOT_PENDING            0x00000000 /* R-I-V */
#define NV_PME_INTR_0_FOUT_NOTIFY_PENDING                0x00000001 /* R---V */
#define NV_PME_INTR_0_FOUT_NOTIFY_RESET                  0x00000001 /* -W--V */
#define NV_PME_INTR_0_FIN_NOTIFY                              16:16 /* RWIVF */
#define NV_PME_INTR_0_FIN_NOTIFY_NOT_PENDING             0x00000000 /* R-I-V */
#define NV_PME_INTR_0_FIN_NOTIFY_PENDING                 0x00000001 /* R---V */
#define NV_PME_INTR_0_FIN_NOTIFY_RESET                   0x00000001 /* -W--V */
#define NV_PME_INTR_0_FOUTTIMEOUT_NOTIFY                      20:20 /* RWIVF */
#define NV_PME_INTR_0_FOUTTIMEOUT_NOTIFY_NOT_PENDING     0x00000000 /* R-I-V */
#define NV_PME_INTR_0_FOUTTIMEOUT_NOTIFY_PENDING         0x00000001 /* R---V */
#define NV_PME_INTR_0_FOUTTIMEOUT_NOTIFY_RESET           0x00000001 /* -W--V */
#define NV_PME_INTR_0_FINTIMEOUT_NOTIFY                       24:24 /* RWIVF */
#define NV_PME_INTR_0_FINTIMEOUT_NOTIFY_NOT_PENDING      0x00000000 /* R-I-V */
#define NV_PME_INTR_0_FINTIMEOUT_NOTIFY_PENDING          0x00000001 /* R---V */
#define NV_PME_INTR_0_FINTIMEOUT_NOTIFY_RESET            0x00000001 /* -W--V */
#define NV_PME_INTR_0_REGTIMEOUT_NOTIFY                       28:28 /* RWIVF */
#define NV_PME_INTR_0_REGTIMEOUT_NOTIFY_NOT_PENDING      0x00000000 /* R-I-V */
#define NV_PME_INTR_0_REGTIMEOUT_NOTIFY_PENDING          0x00000001 /* R---V */
#define NV_PME_INTR_0_REGTIMEOUT_NOTIFY_RESET            0x00000001 /* -W--V */
#define NV_PME_INTR_EN_0                                 0x00200140 /* RWI4R */
#define NV_PME_INTR_EN_0_TASKA_NOTIFY                           0:0 /* RWIVF */
#define NV_PME_INTR_EN_0_TASKA_NOTIFY_DISABLED           0x00000000 /* RWI-V */
#define NV_PME_INTR_EN_0_TASKA_NOTIFY_ENABLED            0x00000001 /* RW--V */
#define NV_PME_INTR_EN_0_TASKB_NOTIFY                           4:4 /* RWIVF */
#define NV_PME_INTR_EN_0_TASKB_NOTIFY_DISABLED           0x00000000 /* RWI-V */
#define NV_PME_INTR_EN_0_TASKB_NOTIFY_ENABLED            0x00000001 /* RW--V */
#define NV_PME_INTR_EN_0_ANC_NOTIFY                             8:8 /* RWIVF */
#define NV_PME_INTR_EN_0_ANC_NOTIFY_DISABLED             0x00000000 /* RWI-V */
#define NV_PME_INTR_EN_0_ANC_NOTIFY_ENABLED              0x00000001 /* RW--V */
#define NV_PME_INTR_EN_0_FOUT_NOTIFY                          12:12 /* RWIVF */
#define NV_PME_INTR_EN_0_FOUT_NOTIFY_DISABLED            0x00000000 /* RWI-V */
#define NV_PME_INTR_EN_0_FOUT_NOTIFY_ENABLED             0x00000001 /* RW--V */
#define NV_PME_INTR_EN_0_FIN_NOTIFY                           16:16 /* RWIVF */
#define NV_PME_INTR_EN_0_FIN_NOTIFY_DISABLED             0x00000000 /* RWI-V */
#define NV_PME_INTR_EN_0_FIN_NOTIFY_ENABLED              0x00000001 /* RW--V */
#define NV_PME_INTR_EN_0_FOUTTIMEOUT_NOTIFY                   20:20 /* RWIVF */
#define NV_PME_INTR_EN_0_FOUTTIMEOUT_NOTIFY_DISABLED     0x00000000 /* RWI-V */
#define NV_PME_INTR_EN_0_FOUTTIMEOUT_NOTIFY_ENABLED      0x00000001 /* RW--V */
#define NV_PME_INTR_EN_0_FINTIMEOUT_NOTIFY                    24:24 /* RWIVF */
#define NV_PME_INTR_EN_0_FINTIMEOUT_NOTIFY_DISABLED      0x00000000 /* RWI-V */
#define NV_PME_INTR_EN_0_FINTIMEOUT_NOTIFY_ENABLED       0x00000001 /* RW--V */
#define NV_PME_INTR_EN_0_REGTIMEOUT_NOTIFY                    28:28 /* RWIVF */
#define NV_PME_INTR_EN_0_REGTIMEOUT_NOTIFY_DISABLED      0x00000000 /* RWI-V */
#define NV_PME_INTR_EN_0_REGTIMEOUT_NOTIFY_ENABLED       0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG                               0x00200200 /* RWI4R */
#define NV_PME_HOST_CONFIG_FIFOMAXTX                            5:0 /* RWIVF */
#define NV_PME_HOST_CONFIG_CLOCK_SELECT                         7:7 /* RWIVF */
#define NV_PME_HOST_CONFIG_CLOCK_SELECT_PCI_DIV_2        0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_CLOCK_SELECT_PCI              0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG_TIMEOUT                             11:8 /* RWIVF */
#define NV_PME_HOST_CONFIG_SLAVE_NOTDETECTED                  16:16 /* RWIVF */
#define NV_PME_HOST_CONFIG_SLAVE_NOTDETECTED_FALSE       0x00000000 /* R---V */
#define NV_PME_HOST_CONFIG_SLAVE_NOTDETECTED_TRUE        0x00000001 /* R---V */
#define NV_PME_HOST_CONFIG_SLAVE_DETECTED                     20:20 /* RWIVF */
#define NV_PME_HOST_CONFIG_SLAVE_DETECTED_FALSE          0x00000000 /* R---V */
#define NV_PME_HOST_CONFIG_SLAVE_DETECTED_TRUE           0x00000001 /* R---V */
#define NV_PME_HOST_CONFIG_FOUT_SYSMEM                        24:24 /* RWIVF */
#define NV_PME_HOST_CONFIG_FOUT_SYSMEM_DISABLED          0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_FOUT_SYSMEM_ENABLED           0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG_FIN_SYSMEM                         25:25 /* RWIVF */
#define NV_PME_HOST_CONFIG_FIN_SYSMEM_DISABLED           0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_FIN_SYSMEM_ENABLED            0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG_FOUT_PAUSE                         26:26 /* RWIVF */
#define NV_PME_HOST_CONFIG_FOUT_PAUSE_DISABLED           0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_FOUT_PAUSE_ENABLED            0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG_FIN_PAUSE                          27:27 /* RWIVF */
#define NV_PME_HOST_CONFIG_FIN_PAUSE_DISABLED            0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_FIN_PAUSE_ENABLED             0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG_FIN_VIP_HOST_4X                    28:28 /* RWIVF */
#define NV_PME_HOST_CONFIG_FIN_VIP_HOST_4X_DISABLED      0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_FIN_VIP_HOST_4X_ENABLED       0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG_FOUT_VIP_HOST_4X                   29:29 /* RWIVF */
#define NV_PME_HOST_CONFIG_FOUT_VIP_HOST_4X_DISABLED     0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_FOUT_VIP_HOST_4X_ENABLED      0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG_FIN                                30:30 /* RWIVF */
#define NV_PME_HOST_CONFIG_FIN_DISABLED                  0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_FIN_ENABLED                   0x00000001 /* RW--V */
#define NV_PME_HOST_CONFIG_FOUT                               31:31 /* RWIVF */
#define NV_PME_HOST_CONFIG_FOUT_DISABLED                 0x00000000 /* RW--V */
#define NV_PME_HOST_CONFIG_FOUT_ENABLED                  0x00000001 /* RW--V */
#define NV_PME_FOUT_ADDR                                 0x00200204 /* RWI4R */
#define NV_PME_FOUT_ADDR_FIFO                                   3:0 /* RWIVF */
#define NV_PME_FOUT_ADDR_DEVICE                                 9:8 /* RWIVF */
#define NV_PME_FIN_ADDR                                  0x00200208 /* RWI4R */
#define NV_PME_FIN_ADDR_FIFO                                    3:0 /* RWIVF */
#define NV_PME_FIN_ADDR_DEVICE                                  9:8 /* RWIVF */
#define NV_PME_656_CONFIG                                0x00200400 /* RWI4R */
#define NV_PME_656_CONFIG_TASKA_ENABLE                          0:0 /* RWXUF */
#define NV_PME_656_CONFIG_TASKB_ENABLE                          4:4 /* RWXUF */
#define NV_PME_656_CONFIG_TASKA_ONLY                            6:6 /* RWXUF */
#define NV_PME_656_CONFIG_TASKA_ONLY_DISABLED            0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_TASKA_ONLY_ENABLED             0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_ANC_MODE                              9:8 /* RWXUF */
#define NV_PME_656_CONFIG_ANC_MODE_DISABLED              0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_ANC_MODE_VBI1                  0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_ANC_MODE_VBI2                  0x00000002 /* RW--V */
#define NV_PME_656_CONFIG_ANC_MODE_ANC                   0x00000003 /* RW--V */
#define NV_PME_656_CONFIG_ANC_TASKB                           10:10 /* RWXUF */
#define NV_PME_656_CONFIG_ANC_TASKB_DISABLED             0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_ANC_TASKB_ENABLED              0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_ANC_TASKB_END                       11:11 /* RWXUF */
#define NV_PME_656_CONFIG_ANC_TASKB_END_DISABLED         0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_ANC_TASKB_END_ENABLED          0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_VBI_VERT                            12:12 /* RWXUF */
#define NV_PME_656_CONFIG_VBI_VERT_DISABLED              0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_VBI_VERT_ENABLED               0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_ANC_HNOTV                           16:16 /* RWXUF */
#define NV_PME_656_CONFIG_ANC_HNOTV_DISABLED             0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_ANC_HNOTV_ENABLED              0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_ANC_NOTHV                           17:17 /* RWXUF */
#define NV_PME_656_CONFIG_ANC_NOTHV_DISABLED             0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_ANC_NOTHV_ENABLED              0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_ANC_NOTHNOTV                        18:18 /* RWXUF */
#define NV_PME_656_CONFIG_ANC_NOTHNOTV_DISABLED          0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_ANC_NOTHNOTV_ENABLED           0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_ANC_HV                              19:19 /* RWXUF */
#define NV_PME_656_CONFIG_ANC_HV_DISABLED                0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_ANC_HV_ENABLED                 0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_ANC_IGNORE_PITCH                    20:20 /* RWXUF */
#define NV_PME_656_CONFIG_ANC_IGNORE_PITCH_DISABLED      0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_ANC_IGNORE_PITCH_ENABLED       0x00000001 /* RW--V */
#define NV_PME_656_CONFIG_VIDEO                               31:31 /* RWIVF */
#define NV_PME_656_CONFIG_VIDEO_8_BIT                    0x00000000 /* RW--V */
#define NV_PME_656_CONFIG_VIDEO_16_BIT                   0x00000001 /* RW--V */
#define NV_PME_NULL_DATA                                 0x00200404 /* RWI4R */
#define NV_PME_NULL_DATA_COMPARE                                0:0 /* RWIVF */
#define NV_PME_NULL_DATA_COMPARE_DISABLED                0x00000000 /* RWI-V */
#define NV_PME_NULL_DATA_COMPARE_ENABLED                 0x00000001 /* RW--V */
#define NV_PME_NULL_DATA_LINE_DETECT                            4:4 /* RWIVF */
#define NV_PME_NULL_DATA_LINE_DETECT_DISABLED            0x00000000 /* RWI-V */
#define NV_PME_NULL_DATA_LINE_DETECT_ENABLED             0x00000001 /* RW--V */
#define NV_PME_NULL_DATA_BYTE                                 31:24 /* RWXVF */
#define NV_PME_VIPREG_NBYTES                             0x00200300 /* RW-4R */
#define NV_PME_VIPREG_ADDR                               0x00200304 /* RW-4R */
#define NV_PME_VIPREG_ADDR_LA                                   7:0 /* RW-VF */
#define NV_PME_VIPREG_ADDR_UA                                  15:8 /* RW-VF */
#define NV_PME_VIPREG_DATA                               0x00200308 /* RW-4R */
#define NV_PME_VIPREG_DATA_BITS                                31:0 /* RW_VF */
#define NV_PME_VIPREG_CTRL                               0x0020030c /* RW-4R */
#define NV_PME_VIPREG_CTRL_READ                                 0:0 /* RWIVF */
#define NV_PME_VIPREG_CTRL_READ_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PME_VIPREG_CTRL_READ_PENDING                  0x00000001 /* R---V */
#define NV_PME_VIPREG_CTRL_READ_START                    0x00000001 /* -WI-V */
#define NV_PME_VIPREG_CTRL_WRITE                                8:8 /* RWIVF */
#define NV_PME_VIPREG_CTRL_WRITE_NOT_PENDING             0x00000000 /* RWI-V */
#define NV_PME_VIPREG_CTRL_WRITE_PENDING                 0x00000001 /* R---V */
#define NV_PME_VIPREG_CTRL_WRITE_START                   0x00000001 /* -WI-V */
#define NV_PME_FOUT_BUFF0_START                          0x00200340 /* RWI4R */
#define NV_PME_FOUT_BUFF0_START_ADDRESS                        31:4 /* RWXUF */
#define NV_PME_FOUT_BUFF1_START                          0x00200344 /* RWI4R */
#define NV_PME_FOUT_BUFF1_START_ADDRESS                        31:4 /* RWXUF */
#define NV_PME_FOUT_BUFF0_LENGTH                         0x00200348 /* RWI4R */
#define NV_PME_FOUT_BUFF0_LENGTH_BITS                          23:4 /* RWXUF */
#define NV_PME_FOUT_BUFF1_LENGTH                         0x0020034c /* RWI4R */
#define NV_PME_FOUT_BUFF1_LENGTH_BITS                          23:4 /* RWXUF */
#define NV_PME_FOUT_ME_STATE                             0x00200350 /* RW-4R */
#define NV_PME_FOUT_ME_STATE_BUFF0_INTR_NOTIFY                  0:0 /* RWIVF */
#define NV_PME_FOUT_ME_STATE_BUFF1_INTR_NOTIFY                  4:4 /* RWXVF */
#define NV_PME_FOUT_ME_STATE_BUFF0_IN_USE                       8:8 /* RWXVF */
#define NV_PME_FOUT_ME_STATE_BUFF1_IN_USE                     12:12 /* RWXVF */
#define NV_PME_FOUT_ME_STATE_CURRENT_BUFFER                   16:16 /* RWXVF */
#define NV_PME_FOUT_ME_STATE_CURRENT_BUFFER_0            0x00000000 /* RW--V */
#define NV_PME_FOUT_ME_STATE_CURRENT_BUFFER_1            0x00000001 /* RW--V */
#define NV_PME_FOUT_SU_STATE                             0x00200354 /* RW-4R */
#define NV_PME_FOUT_SU_STATE_BUFF0_IN_USE                     16:16 /* RWXVF */
#define NV_PME_FOUT_SU_STATE_BUFF1_IN_USE                     20:20 /* RWXVF */
#define NV_PME_FOUT_RM_STATE                             0x00200358 /* RW-4R */
#define NV_PME_FOUT_RM_STATE_BUFF0_INTR_NOTIFY                  0:0 /* RWXVF */
#define NV_PME_FOUT_RM_STATE_BUFF1_INTR_NOTIFY                  4:4 /* RWXVF */
#define NV_PME_FOUT_CURRENT                              0x0020035c /* R-I4R */
#define NV_PME_FOUT_CURRENT_POS                                31:0 /* R-XUF */
#define NV_PME_FIN_BUFF0_START                           0x00200380 /* RWI4R */
#define NV_PME_FIN_BUFF0_START_ADDRESS                         31:4 /* RWXUF */
#define NV_PME_FIN_BUFF1_START                           0x00200384 /* RWI4R */
#define NV_PME_FIN_BUFF1_START_ADDRESS                         31:4 /* RWXUF */
#define NV_PME_FIN_BUFF0_LENGTH                          0x00200388 /* RWI4R */
#define NV_PME_FIN_BUFF0_LENGTH_BITS                           23:4 /* RWXUF */
#define NV_PME_FIN_BUFF1_LENGTH                          0x0020038c /* RWI4R */
#define NV_PME_FIN_BUFF1_LENGTH_BITS                           23:4 /* RWXUF */
#define NV_PME_FIN_ME_STATE                              0x00200390 /* RW-4R */
#define NV_PME_FIN_ME_STATE_BUFF0_INTR_NOTIFY                   0:0 /* RWIVF */
#define NV_PME_FIN_ME_STATE_BUFF1_INTR_NOTIFY                   4:4 /* RWXVF */
#define NV_PME_FIN_ME_STATE_BUFF0_IN_USE                        8:8 /* RWXVF */
#define NV_PME_FIN_ME_STATE_BUFF1_IN_USE                      12:12 /* RWXVF */
#define NV_PME_FIN_ME_STATE_CURRENT_BUFFER                    16:16 /* RWXVF */
#define NV_PME_FIN_ME_STATE_CURRENT_BUFFER_0             0x00000000 /* RW--V */
#define NV_PME_FIN_ME_STATE_CURRENT_BUFFER_1             0x00000001 /* RW--V */
#define NV_PME_FIN_SU_STATE                              0x00200394 /* RW-4R */
#define NV_PME_FIN_SU_STATE_BUFF0_IN_USE                      16:16 /* RWXVF */
#define NV_PME_FIN_SU_STATE_BUFF1_IN_USE                      20:20 /* RWXVF */
#define NV_PME_FIN_RM_STATE                              0x00200398 /* RW-4R */
#define NV_PME_FIN_RM_STATE_BUFF0_INTR_NOTIFY                   0:0 /* RWXVF */
#define NV_PME_FIN_RM_STATE_BUFF1_INTR_NOTIFY                   4:4 /* RWXVF */
#define NV_PME_FIN_CURRENT                               0x0020039c /* R-I4R */
#define NV_PME_FIN_CURRENT_POS                                 31:0 /* R-XUF */
#define NV_PME_VBI_REGION                                0x00200408 /* RWI4R */
#define NV_PME_VBI_REGION_START_LINE                            4:0 /* RWX-F */
#define NV_PME_VBI_REGION_NUM_LINES                           20:16 /* RWX-F */
#define NV_PME_ANC_BUFF0_START                           0x00200410 /* RWI4R */
#define NV_PME_ANC_BUFF0_START_ADDRESS                         26:4 /* RWXUF */
#define NV_PME_ANC_BUFF1_START                           0x00200414 /* RWI4R */
#define NV_PME_ANC_BUFF1_START_ADDRESS                         26:4 /* RWXUF */
#define NV_PME_ANC_BUFF0_PITCH                           0x00200418 /* RWI4R */
#define NV_PME_ANC_BUFF0_PITCH_VALUE                           13:4 /* RWXUF */
#define NV_PME_ANC_BUFF1_PITCH                           0x0020041c /* RWI4R */
#define NV_PME_ANC_BUFF1_PITCH_VALUE                           13:4 /* RWXUF */
#define NV_PME_ANC_BUFF0_LENGTH                          0x00200420 /* RWI4R */
#define NV_PME_ANC_BUFF0_LENGTH_VALUE                          19:4 /* RWXUF */
#define NV_PME_ANC_BUFF1_LENGTH                          0x00200424 /* RWI4R */
#define NV_PME_ANC_BUFF1_LENGTH_VALUE                          19:4 /* RWXUF */
#define NV_PME_ANC_ME_STATE                              0x00200428 /* RW-4R */
#define NV_PME_ANC_ME_STATE_BUFF0_INTR_NOTIFY                   0:0 /* RWXVF */
#define NV_PME_ANC_ME_STATE_BUFF1_INTR_NOTIFY                   4:4 /* RWXVF */
#define NV_PME_ANC_ME_STATE_BUFF0_ERROR_CODE                   10:8 /* RWXVF */
#define NV_PME_ANC_ME_STATE_BUFF1_ERROR_CODE                  14:12 /* RWXVF */
#define NV_PME_ANC_ME_STATE_BUFF0_IN_USE                      16:16 /* RWXVF */
#define NV_PME_ANC_ME_STATE_BUFF1_IN_USE                      20:20 /* RWXVF */
#define NV_PME_ANC_ME_STATE_CURRENT_BUFFER                    24:24 /* RWXVF */
#define NV_PME_ANC_ME_STATE_CURRENT_BUFFER_0             0x00000000 /* RW--V */
#define NV_PME_ANC_ME_STATE_CURRENT_BUFFER_1             0x00000001 /* RW--V */
#define NV_PME_ANC_SU_STATE                              0x0020042c /* RW-4R */
#define NV_PME_ANC_SU_STATE_BUFF0_FIELD                         8:8 /* RWXVF */
#define NV_PME_ANC_SU_STATE_BUFF1_FIELD                       12:12 /* RWXVF */
#define NV_PME_ANC_SU_STATE_BUFF0_IN_USE                      16:16 /* RWXVF */
#define NV_PME_ANC_SU_STATE_BUFF1_IN_USE                      20:20 /* RWXVF */
#define NV_PME_ANC_RM_STATE                              0x00200430 /* RW-4R */
#define NV_PME_ANC_RM_STATE_BUFF0_INTR_NOTIFY                   0:0 /* RWXVF */
#define NV_PME_ANC_RM_STATE_BUFF1_INTR_NOTIFY                   4:4 /* RWXVF */
#define NV_PME_ANC_CURRENT                               0x00200434 /* R--4R */
#define NV_PME_ANC_CURRENT_POS                                 27:0 /* R-XVF */
#define NV_PME_TASKA_BUFF0_START                         0x00200440 /* RWI4R */
#define NV_PME_TASKA_BUFF0_START_ADDRESS                       26:4 /* RWXUF */
#define NV_PME_TASKA_BUFF1_START                         0x00200444 /* RWI4R */
#define NV_PME_TASKA_BUFF1_START_ADDRESS                       26:4 /* RWXUF */
#define NV_PME_TASKA_BUFF0_PITCH                         0x00200448 /* RWI4R */
#define NV_PME_TASKA_BUFF0_PITCH_VALUE                         13:4 /* RWXUF */
#define NV_PME_TASKA_BUFF1_PITCH                         0x0020044c /* RWI4R */
#define NV_PME_TASKA_BUFF1_PITCH_VALUE                         13:4 /* RWXUF */
#define NV_PME_TASKA_BUFF0_LENGTH                        0x00200450 /* RWI4R */
#define NV_PME_TASKA_BUFF0_LENGTH_VALUE                        23:4 /* RWXUF */
#define NV_PME_TASKA_BUFF1_LENGTH                        0x00200454 /* RWI4R */
#define NV_PME_TASKA_BUFF1_LENGTH_VALUE                        23:4 /* RWXUF */
#define NV_PME_TASKA_LINE_LENGTH                         0x002004f0 /* RWI4R */
#define NV_PME_TASKA_LINE_LENGTH_VALUE                         13:2 /* RWXUF */
#define NV_PME_TASKA_ME_STATE                            0x00200458 /* RW-4R */
#define NV_PME_TASKA_ME_STATE_BUFF0_INTR_NOTIFY                 0:0 /* RWXVF */
#define NV_PME_TASKA_ME_STATE_BUFF1_INTR_NOTIFY                 4:4 /* RWXVF */
#define NV_PME_TASKA_ME_STATE_RP_FLAGS_BUFF0                    8:5 /* RW--F */
#define NV_PME_TASKA_ME_STATE_BUFF0_ERROR_CODE                 11:9 /* RWXVF */
#define NV_PME_TASKA_ME_STATE_BUFF1_ERROR_CODE                14:12 /* RWXVF */
#define NV_PME_TASKA_ME_STATE_BUFF0_IN_USE                    16:16 /* RWXVF */
#define NV_PME_TASKA_ME_STATE_BUFF1_IN_USE                    20:20 /* RWXVF */
#define NV_PME_TASKA_ME_STATE_CURRENT_BUFFER                  24:24 /* RWXVF */
#define NV_PME_TASKA_ME_STATE_CURRENT_BUFFER_0           0x00000000 /* RW--V */
#define NV_PME_TASKA_ME_STATE_CURRENT_BUFFER_1           0x00000001 /* RW--V */
#define NV_PME_TASKA_ME_STATE_RP_FLAGS_BUFF1                  28:25 /* RW--F */
#define NV_PME_TASKA_SU_STATE                            0x0020045c /* RW-4R */
#define NV_PME_TASKA_SU_STATE_BUFF0_FIELD                       8:8 /* RWXVF */
#define NV_PME_TASKA_SU_STATE_BUFF1_FIELD                     12:12 /* RWXVF */
#define NV_PME_TASKA_SU_STATE_BUFF0_IN_USE                    16:16 /* RWXVF */
#define NV_PME_TASKA_SU_STATE_BUFF1_IN_USE                    20:20 /* RWXVF */
#define NV_PME_TASKA_RM_STATE                            0x00200460 /* RW-4R */
#define NV_PME_TASKA_RM_STATE_BUFF0_INTR_NOTIFY                 0:0 /* RWXVF */
#define NV_PME_TASKA_RM_STATE_BUFF1_INTR_NOTIFY                 4:4 /* RWXVF */
#define NV_PME_TASKA_Y_CROP                              0x00200464 /* RW-4R */
#define NV_PME_TASKA_Y_CROP_STARTLINE                           8:0 /* RWXVF */
#define NV_PME_TASKA_Y_SCALE                             0x00200468 /* RW-4R */
#define NV_PME_TASKA_Y_SCALE_INCR                              10:0 /* RWXVF */
#define NV_PME_TASKA_X_SCALE                             0x0020046c /* RW-4R */
#define NV_PME_TASKA_X_SCALE_INCR                              27:0 /* RWXVF */
#define NV_PME_TASKA_X_SCALE_FILTER                           31:31 /* RWXVF */
#define NV_PME_TASKA_X_SCALE_FILTER_DISABLE              0x00000000 /* RWI-V */
#define NV_PME_TASKA_X_SCALE_FILTER_ENABLE               0x00000001 /* RW--V */
#define NV_PME_TASKB_BUFF0_START                         0x00200470 /* RWI4R */
#define NV_PME_TASKB_BUFF0_START_ADDRESS                       26:4 /* RWXUF */
#define NV_PME_TASKB_BUFF1_START                         0x00200474 /* RWI4R */
#define NV_PME_TASKB_BUFF1_START_ADDRESS                       26:4 /* RWXUF */
#define NV_PME_TASKB_BUFF0_PITCH                         0x00200478 /* RWI4R */
#define NV_PME_TASKB_BUFF0_PITCH_VALUE                         13:4 /* RWXUF */
#define NV_PME_TASKB_BUFF1_PITCH                         0x0020047c /* RWI4R */
#define NV_PME_TASKB_BUFF1_PITCH_VALUE                         13:4 /* RWXUF */
#define NV_PME_TASKB_BUFF0_LENGTH                        0x00200480 /* RWI4R */
#define NV_PME_TASKB_BUFF0_LENGTH_VALUE                        23:4 /* RWXUF */
#define NV_PME_TASKB_BUFF1_LENGTH                        0x00200484 /* RWI4R */
#define NV_PME_TASKB_BUFF1_LENGTH_VALUE                        23:4 /* RWXUF */
#define NV_PME_TASKB_LINE_LENGTH                         0x002004f4 /* RWI4R */
#define NV_PME_TASKB_LINE_LENGTH_VALUE                         13:2 /* RWXUF */
#define NV_PME_TASKB_ME_STATE                            0x00200488 /* RW-4R */
#define NV_PME_TASKB_ME_STATE_BUFF0_INTR_NOTIFY                 0:0 /* RWXVF */
#define NV_PME_TASKB_ME_STATE_BUFF1_INTR_NOTIFY                 4:4 /* RWXVF */
#define NV_PME_TASKB_ME_STATE_RP_FLAGS_BUFF0                    8:5 /* RW--F */
#define NV_PME_TASKB_ME_STATE_BUFF0_ERROR_CODE                 11:9 /* RWXVF */
#define NV_PME_TASKB_ME_STATE_BUFF1_ERROR_CODE                14:12 /* RWXVF */
#define NV_PME_TASKB_ME_STATE_BUFF0_IN_USE                    16:16 /* RWXVF */
#define NV_PME_TASKB_ME_STATE_BUFF1_IN_USE                    20:20 /* RWXVF */
#define NV_PME_TASKB_ME_STATE_CURRENT_BUFFER                  24:24 /* RWXVF */
#define NV_PME_TASKB_ME_STATE_CURRENT_BUFFER_0           0x00000000 /* RW--V */
#define NV_PME_TASKB_ME_STATE_CURRENT_BUFFER_1           0x00000001 /* RW--V */
#define NV_PME_TASKB_ME_STATE_RP_FLAGS_BUFF1                  28:25 /* R---F */
#define NV_PME_TASKB_SU_STATE                            0x0020048c /* RW-4R */
#define NV_PME_TASKB_SU_STATE_BUFF0_FIELD                       8:8 /* RWXVF */
#define NV_PME_TASKB_SU_STATE_BUFF1_FIELD                     12:12 /* RWXVF */
#define NV_PME_TASKB_SU_STATE_BUFF0_IN_USE                    16:16 /* RWXVF */
#define NV_PME_TASKB_SU_STATE_BUFF1_IN_USE                    20:20 /* RWXVF */
#define NV_PME_TASKB_RM_STATE                            0x00200490 /* RW-4R */
#define NV_PME_TASKB_RM_STATE_BUFF0_INTR_NOTIFY                 0:0 /* RWXVF */
#define NV_PME_TASKB_RM_STATE_BUFF1_INTR_NOTIFY                 4:4 /* RWXVF */
#define NV_PME_TASKB_Y_CROP                              0x00200494 /* RW-4R */
#define NV_PME_TASKB_Y_CROP_STARTLINE                           8:0 /* RWXVF */
#define NV_PME_TASKB_Y_SCALE                             0x00200498 /* RW-4R */
#define NV_PME_TASKB_Y_SCALE_INCR                              10:0 /* RWXVF */
#define NV_PME_TASKB_X_SCALE                             0x0020049c /* RW-4R */
#define NV_PME_TASKB_X_SCALE_INCR                              27:0 /* RWXVF */
#define NV_PME_TASKB_X_SCALE_FILTER                           31:31 /* RWXVF */
#define NV_PME_TASKB_X_SCALE_FILTER_DISABLE              0x00000000 /* RWI-V */
#define NV_PME_TASKB_X_SCALE_FILTER_ENABLE               0x00000001 /* RW--V */
#define NV_PME_TASK_CURRENT                              0x002004a0 /* RW-4R */
#define NV_PME_TASK_CURRENT_POS                                27:0 /* RWXVF */
#define NV_PME_TASK_CURRENT_TASK                              31:31 /* RWXVF */
#define NV_PME_HORIZ_WGHTS_A(i)                  (0x002004b0+(i)*4) /* -W-4A */
#define NV_PME_HORIZ_WGHTS_A__SIZE_1                              8 /*       */
#define NV_PME_HORIZ_WGHTS_A_0                                  7:0 /* -WXVF */
#define NV_PME_HORIZ_WGHTS_A_1                                 15:8 /* -WXVF */
#define NV_PME_HORIZ_WGHTS_A_2                                24:16 /* -WXVF */
#define NV_PME_HORIZ_WGHTS_B(i)                  (0x002004d0+(i)*4) /* -W-4A */
#define NV_PME_HORIZ_WGHTS_B__SIZE_1                              8 /*       */
#define NV_PME_HORIZ_WGHTS_B_3                                  7:0 /* -WXVF */
#define NV_PME_HORIZ_WGHTS_B_4                                 15:8 /* -WXVF */
/* dev_ext_devices.ref */
#define NV_PDAC                               0x00680FFF:0x00680000 /* RW--D */
#define NV_PDAC_DATA(i)                          (0x00680000+(i)*4) /* RW-4A */
#define NV_PDAC_DATA__SIZE_1                                     16 /*       */
#define NV_PDAC_DATA_VALUE                                      7:0 /* RW-VF */
/* dev_ext_devices.ref */
/* dev_ext_devices.ref */
/* dev_fb.ref */
#define NV_PFB_DEBUG_0                                   0x00100080 /* RW-4R */
#define NV_PFB_DEBUG_0_CLM1                                     0:0 /* RWIVF */
#define NV_PFB_DEBUG_0_CLM1_DISABLED                     0x00000000 /* RWI-V */
#define NV_PFB_DEBUG_0_CLM1_ENABLED                      0x00000001 /* RW--V */
#define NV_PFB_CFG                                       0x00100200 /* RW-4R */
#define NV_PFB_CFG_TYPE                                         0:0 /* RWIVF */
#define NV_PFB_CFG_TYPE_SDR                              0x00000000 /* RWI-V */
#define NV_PFB_CFG_TYPE_DDR                              0x00000001 /* RW--V */
#define NV_PFB_CFG_BUS                                          4:4 /* RWIVF */
#define NV_PFB_CFG_BUS_64                                0x00000000 /* RWI-V */
#define NV_PFB_CFG_BUS_128                               0x00000001 /* RW--V */
#define NV_PFB_CFG_RAM                                          8:8 /* RWIVF */
#define NV_PFB_CFG_RAM_8                                 0x00000000 /* RWI-V */
#define NV_PFB_CFG_RAM_32                                0x00000001 /* RW--V */
#define NV_PFB_CFG_EXTBANK                                    12:12 /* RWIVF */
#define NV_PFB_CFG_EXTBANK_0                             0x00000000 /* RWI-V */
#define NV_PFB_CFG_EXTBANK_1                             0x00000001 /* RW--V */
#define NV_PFB_CFG_BANK                                       16:16 /* RWI-F */
#define NV_PFB_CFG_BANK_1                                0x00000000 /* RWI-V */
#define NV_PFB_CFG_BANK_2                                0x00000001 /* RW--V */
#define NV_PFB_CFG_ROW                                        23:20 /* RWI-F */
#define NV_PFB_CFG_ROW_9                                 0x00000009 /* RWI-V */
#define NV_PFB_CFG_ROW_10                                0x0000000A /* RW--V */
#define NV_PFB_CFG_ROW_11                                0x0000000B /* RW--V */
#define NV_PFB_CFG_ROW_12                                0x0000000C /* RW--V */
#define NV_PFB_CFG_COL                                        24:24 /* RWIVF */
#define NV_PFB_CFG_COL_8                                 0x00000000 /* RWI-V */
#define NV_PFB_CFG_COL_9                                 0x00000001 /* RW--V */
#define NV_PFB_CFG_COLU                                       27:25 /* C-IVF */
#define NV_PFB_CFG_COLU_4                                0x00000004 /* C-I-V */
#define NV_PFB_CFG_DQS                                        28:28 /* RWIVF */
#define NV_PFB_CFG_DQS_NORMAL                            0x00000000 /* RWI-V */
#define NV_PFB_CFG_DQS_EARLY                             0x00000001 /* RW--V */
#define NV_PFB_CSTATUS                                   0x0010020C /* R--4R */
#define NV_PFB_CSTATUS_RAMAMOUNT                              27:20 /* R--VF */
#define NV_PFB_CSTATUS_RAMAMOUNT_2M                      0x00000002 /* R---V */
#define NV_PFB_CSTATUS_RAMAMOUNT_4M                      0x00000004 /* R---V */
#define NV_PFB_CSTATUS_RAMAMOUNT_8M                      0x00000008 /* R---V */
#define NV_PFB_CSTATUS_RAMAMOUNT_16M                     0x00000010 /* R---V */
#define NV_PFB_CSTATUS_RAMAMOUNT_32M                     0x00000020 /* R---V */
#define NV_PFB_CSTATUS_RAMAMOUNT_64M                     0x00000040 /* R---V */
#define NV_PFB_CSTATUS_RAMAMOUNT_128M                    0x00000080 /* R---V */
#define NV_PFB_REFCTRL                                   0x00100210 /* RW-4R */
#define NV_PFB_REFCTRL_PUT                                      4:0 /* RWI-F */
#define NV_PFB_REFCTRL_PUT_0                             0x00000000 /* RWI-V */
#define NV_PFB_REFCTRL_GET                                     12:8 /* RWI-F */
#define NV_PFB_REFCTRL_GET_0                             0x00000000 /* RWI-V */
#define NV_PFB_REFCTRL_VALID                                  31:31 /* RWI-F */
#define NV_PFB_REFCTRL_VALID_0                           0x00000000 /* RWI-V */
#define NV_PFB_REFCTRL_VALID_1                           0x00000001 /* RW--V */
#define NV_PFB_NVM                                       0x00100214 /* RW-4R */
#define NV_PFB_NVM_MODE                                         0:0 /* RWIVF */
#define NV_PFB_NVM_MODE_DISABLE                          0x00000000 /* RWI-V */
#define NV_PFB_NVM_MODE_ENABLE                           0x00000001 /* RW--V */
#define NV_PFB_NVM_LIMIT                                        7:4 /* RW-VF */
#define NV_PFB_NVM_LIMIT_64K                             0x00000000 /* RW--V */
#define NV_PFB_NVM_LIMIT_128K                            0x00000001 /* RW--V */
#define NV_PFB_NVM_LIMIT_192K                            0x00000002 /* RW--V */
#define NV_PFB_NVM_LIMIT_256K                            0x00000003 /* RW--V */
#define NV_PFB_NVM_LIMIT_320K                            0x00000004 /* RW--V */
#define NV_PFB_NVM_LIMIT_384K                            0x00000005 /* RW--V */
#define NV_PFB_NVM_LIMIT_448K                            0x00000006 /* RW--V */
#define NV_PFB_NVM_LIMIT_512K                            0x00000007 /* RW--V */
#define NV_PFB_NVM_LIMIT_576K                            0x00000008 /* RW--V */
#define NV_PFB_NVM_LIMIT_640K                            0x00000009 /* RW--V */
#define NV_PFB_NVM_LIMIT_704K                            0x0000000A /* RW--V */
#define NV_PFB_NVM_LIMIT_768K                            0x0000000B /* RW--V */
#define NV_PFB_NVM_LIMIT_832K                            0x0000000C /* RW--V */
#define NV_PFB_NVM_LIMIT_896K                            0x0000000D /* RW--V */
#define NV_PFB_NVM_LIMIT_960K                            0x0000000E /* RW--V */
#define NV_PFB_NVM_LIMIT_1024K                           0x0000000F /* RW--V */
#define NV_PFB_PIN                                       0x00100218 /* RW-4R */
#define NV_PFB_PIN_CKE                                          0:0 /* RWI-F */
#define NV_PFB_PIN_CKE_POWERDOWN                         0x00000000 /* RWI-V */
#define NV_PFB_PIN_CKE_NORMAL                            0x00000001 /* RW--V */
#define NV_PFB_PIN_DQM                                          4:4 /* RWI-F */
#define NV_PFB_PIN_DQM_NORMAL                            0x00000000 /* RW--V */
#define NV_PFB_PIN_DQM_INACTIVE                          0x00000001 /* RWI-V */
#define NV_PFB_PAD                                       0x0010021C /* RW-4R */
#define NV_PFB_PAD_CKE                                          0:0 /* RWI-F */
#define NV_PFB_PAD_CKE_TRISTATE                          0x00000000 /* RWI-V */
#define NV_PFB_PAD_CKE_NORMAL                            0x00000001 /* RW--V */
#define NV_PFB_TIMING0                                   0x00100220 /* RW-4R */
#define NV_PFB_TIMING0_RC                                       4:0 /* RWIVF */
#define NV_PFB_TIMING0_RC_31                             0x0000001F /* RWI-V */
#define NV_PFB_TIMING0_RFC                                     12:8 /* RWIVF */
#define NV_PFB_TIMING0_RFC_31                            0x0000001F /* RWI-V */
#define NV_PFB_TIMING0_RAS                                    20:16 /* RWIVF */
#define NV_PFB_TIMING0_RAS_31                            0x0000001F /* RWI-V */
#define NV_PFB_TIMING0_RCD                                    27:24 /* RWIVF */
#define NV_PFB_TIMING0_RCD_15                            0x0000000F /* RWI-V */
#define NV_PFB_TIMING0_RP                                     31:28 /* RWIVF */
#define NV_PFB_TIMING0_RP_15                             0x0000000F /* RWI-V */
#define NV_PFB_TIMING1                                   0x00100224 /* RW-4R */
#define NV_PFB_TIMING1_R2W                                      6:4 /* RWIVF */
#define NV_PFB_TIMING1_R2W_7                             0x00000007 /* RWI-V */
#define NV_PFB_TIMING1_R2P                                     10:8 /* RWIVF */
#define NV_PFB_TIMING1_R2P_7                             0x00000007 /* RWI-V */
#define NV_PFB_TIMING1_REXT                                   13:12 /* RWIVF */
#define NV_PFB_TIMING1_REXT_1                            0x00000001 /* RW--V */
#define NV_PFB_TIMING1_REXT_2                            0x00000002 /* RWI-V */
#define NV_PFB_TIMING1_W2R                                    18:16 /* RWIVF */
#define NV_PFB_TIMING1_W2R_7                             0x00000007 /* RWI-V */
#define NV_PFB_TIMING1_W2P                                    22:20 /* RWIVF */
#define NV_PFB_TIMING1_W2P_7                             0x00000007 /* RWI-V */
#define NV_PFB_TIMING1_RRD                                    26:24 /* RWIVF */
#define NV_PFB_TIMING1_RRD_7                             0x00000007 /* RWI-V */
#define NV_PFB_TIMING2                                   0x00100228 /* RW-4R */
#define NV_PFB_TIMING2_REFRESH                                 15:5 /* RW-VF */
#define NV_PFB_TIMING2_REFRESH_0                         0x00000000 /* RWI-V */
#define NV_PFB_TIMING2_REFRESH_LO                               4:0 /* C-IVF */
#define NV_PFB_TIMING2_REFRESH_LO_1F                     0x0000001F /* C-I-V */
#define NV_PFB_TILE(i)                          (0x00100240+(i)*16) /* RW-4A */
#define NV_PFB_TILE__SIZE_1                                       8 /*       */
#define NV_PFB_TILE_ADR                                       26:14 /* RW-UF */
#define NV_PFB_TILE_REGION                                    31:31 /* RWIVF */
#define NV_PFB_TILE_REGION_INVALID                       0x00000000 /* RWI-V */
#define NV_PFB_TILE_REGION_VALID                         0x00000001 /* RW--V */
#define NV_PFB_TLIMIT(i)                        (0x00100244+(i)*16) /* RW-4A */
#define NV_PFB_TLIMIT__SIZE_1                                     8 /*       */
#define NV_PFB_TLIMIT_ADR                                     26:14 /* RW-UF */
#define NV_PFB_TLIMIT_ADR_LO                                   13:0 /* C-IVF */
#define NV_PFB_TLIMIT_ADR_LO_3FFF                       0x000003FFF /* C-I-V */
#define NV_PFB_TSIZE(i)                         (0x00100248+(i)*16) /* RW-4A */
#define NV_PFB_TSIZE__SIZE_1                                      8 /*       */
#define NV_PFB_TSIZE_PITCH                                     15:8 /* RW-UF */
#define NV_PFB_TSIZE_PITCH_0200                          0x00000002 /* RW--V */
#define NV_PFB_TSIZE_PITCH_0400                          0x00000004 /* RW--V */
#define NV_PFB_TSIZE_PITCH_0600                          0x00000006 /* RW--V */
#define NV_PFB_TSIZE_PITCH_0800                          0x00000008 /* RW--V */
#define NV_PFB_TSIZE_PITCH_0A00                          0x0000000A /* RW--V */
#define NV_PFB_TSIZE_PITCH_0C00                          0x0000000C /* RW--V */
#define NV_PFB_TSIZE_PITCH_0E00                          0x0000000E /* RW--V */
#define NV_PFB_TSIZE_PITCH_1000                          0x00000010 /* RW--V */
#define NV_PFB_TSIZE_PITCH_1400                          0x00000014 /* RW--V */
#define NV_PFB_TSIZE_PITCH_1800                          0x00000018 /* RW--V */
#define NV_PFB_TSIZE_PITCH_1C00                          0x0000001C /* RW--V */
#define NV_PFB_TSIZE_PITCH_2000                          0x00000020 /* RW--V */
#define NV_PFB_TSIZE_PITCH_2800                          0x00000028 /* RW--V */
#define NV_PFB_TSIZE_PITCH_3000                          0x00000030 /* RW--V */
#define NV_PFB_TSIZE_PITCH_3800                          0x00000038 /* RW--V */
#define NV_PFB_TSIZE_PITCH_4000                          0x00000040 /* RW--V */
#define NV_PFB_TSIZE_PITCH_5000                          0x00000050 /* RW--V */
#define NV_PFB_TSIZE_PITCH_6000                          0x00000060 /* RW--V */
#define NV_PFB_TSIZE_PITCH_7000                          0x00000070 /* RW--V */
#define NV_PFB_TSIZE_PITCH_8000                          0x00000080 /* RW--V */
#define NV_PFB_TSIZE_PITCH_A000                          0x000000A0 /* RW--V */
#define NV_PFB_TSIZE_PITCH_C000                          0x000000C0 /* RW--V */
#define NV_PFB_TSIZE_PITCH_E000                          0x000000E0 /* RW--V */
#define NV_PFB_TSTATUS(i)                       (0x0010024C+(i)*16) /* R--4A */
#define NV_PFB_TSTATUS__SIZE_1                                    8 /*       */
#define NV_PFB_TSTATUS_PRIME                                    1:0 /* R--VF */
#define NV_PFB_TSTATUS_PRIME_1                           0x00000000 /* R---V */
#define NV_PFB_TSTATUS_PRIME_3                           0x00000001 /* R---V */
#define NV_PFB_TSTATUS_PRIME_5                           0x00000002 /* R---V */
#define NV_PFB_TSTATUS_PRIME_7                           0x00000003 /* R---V */
#define NV_PFB_TSTATUS_FACTOR                                   6:4 /* R--VF */
#define NV_PFB_TSTATUS_FACTOR_1                          0x00000000 /* R---V */
#define NV_PFB_TSTATUS_FACTOR_2                          0x00000001 /* R---V */
#define NV_PFB_TSTATUS_FACTOR_4                          0x00000002 /* R---V */
#define NV_PFB_TSTATUS_FACTOR_8                          0x00000003 /* R---V */
#define NV_PFB_TSTATUS_FACTOR_16                         0x00000004 /* R---V */
#define NV_PFB_TSTATUS_FACTOR_32                         0x00000005 /* R---V */
#define NV_PFB_TSTATUS_FACTOR_64                         0x00000006 /* R---V */
#define NV_PFB_TSTATUS_FACTOR_128                        0x00000007 /* R---V */
#define NV_PFB_TSTATUS_REGION                                 31:31 /* R-I-F */
#define NV_PFB_TSTATUS_REGION_INVALID                    0x00000000 /* R-I-V */
#define NV_PFB_TSTATUS_REGION_VALID                      0x00000001 /* R---V */
#define NV_PFB_MRS                                       0x001002C0 /* RW-4R */
#define NV_PFB_MRS_CL                                           4:4 /* RWIVF */
#define NV_PFB_MRS_CL_2                                  0x00000000 /* RW--V */
#define NV_PFB_MRS_CL_3                                  0x00000001 /* RWI-V */
#define NV_PFB_MRS_CLU                                          6:5 /* C-IVF */
#define NV_PFB_MRS_CLU_1                                 0x00000001 /* C-I-V */
#define NV_PFB_MRS_DLL                                          8:8 /* RWI-F */
#define NV_PFB_MRS_DLL_NORMAL                            0x00000000 /* RWI-V */
#define NV_PFB_MRS_DLL_RESET                             0x00000001 /* RW--V */
#define NV_PFB_EMRS                                      0x001002C4 /* RW-4R */
#define NV_PFB_EMRS_DLL                                         0:0 /* RWI-F */
#define NV_PFB_EMRS_DLL_ENABLE                           0x00000000 /* RW--V */
#define NV_PFB_EMRS_DLL_DISABLE                          0x00000001 /* RWI-V */
#define NV_PFB_REF                                       0x001002D0 /* -W-4R */
#define NV_PFB_REF_CMD                                          0:0 /* -W--F */
#define NV_PFB_REF_CMD_REFRESH                           0x00000001 /* -W--V */
#define NV_PFB_PRE                                       0x001002D4 /* -W-4R */
#define NV_PFB_PRE_CMD                                          0:0 /* -W--F */
#define NV_PFB_PRE_CMD_PRECHARGE                         0x00000001 /* -W--V */
#define NV_PFB_SELF_REF                                  0x001002d8
#define NV_PFB_SELF_REF_CMD                                     0:0
#define NV_PFB_SELF_REF_CMD_ENABLED                      0x00000001
#define NV_PFB_STRAP                                     0x00101000 /* R--4R */
#define NV_PFB_STRAP_PCI_AD                                     0:0 /* R-XVF */
#define NV_PFB_STRAP_PCI_AD_REVERSED                     0x00000000 /* R---V */
#define NV_PFB_STRAP_PCI_AD_NORMAL                       0x00000001 /* R---V */
#define NV_PFB_STRAP_SUB_VENDOR                                 1:1 /* R-XVF */
#define NV_PFB_STRAP_SUB_VENDOR_NO_BIOS                  0x00000000 /* R---V */
#define NV_PFB_STRAP_SUB_VENDOR_BIOS                     0x00000001 /* R---V */
#define NV_PFB_STRAP_RAMCFG                                     5:2 /* R-XVF */
#define NV_PFB_STRAP_CRYSTAL                                    6:6 /* R-XVF */
#define NV_PFB_STRAP_CRYSTAL_13500K                      0x00000000 /* R---V */
#define NV_PFB_STRAP_CRYSTAL_14318180                    0x00000001 /* R---V */
#define NV_PFB_STRAP_TVMODE                                     8:7 /* R-XVF */
#define NV_PFB_STRAP_TVMODE_SECAM                        0x00000000 /* R---V */
#define NV_PFB_STRAP_TVMODE_NTSC                         0x00000001 /* R---V */
#define NV_PFB_STRAP_TVMODE_PAL                          0x00000002 /* R---V */
#define NV_PFB_STRAP_TVMODE_DISABLED                     0x00000003 /* R---V */
#define NV_PFB_STRAP_AGP_4X                                     9:9 /* R-XVF */
#define NV_PFB_STRAP_AGP_4X_ENABLED                      0x00000000 /* R---V */
#define NV_PFB_STRAP_AGP_4X_DISABLED                     0x00000001 /* R---V */
#define NV_PFB_STRAP_AGP_SBA                                  10:10 /* R-XVF */
#define NV_PFB_STRAP_AGP_SBA_ENABLED                     0x00000000 /* R---V */
#define NV_PFB_STRAP_AGP_SBA_DISABLED                    0x00000001 /* R---V */
#define NV_PFB_STRAP_AGP_FASTWR                               11:11 /* R-XVF */
#define NV_PFB_STRAP_AGP_FASTWR_ENABLED                  0x00000000 /* R---V */
#define NV_PFB_STRAP_AGP_FASTWR_DISABLED                 0x00000001 /* R---V */
#define NV_PFB_STRAP_PCI_DEVID                                13:12 /* R-XVF */
#define NV_PFB_STRAP_PCI_DEVID_20                        0x00000000 /* R---V */
#define NV_PFB_STRAP_PCI_DEVID_21                        0x00000001 /* R---V */
#define NV_PFB_STRAP_PCI_DEVID_22                        0x00000002 /* R---V */
#define NV_PFB_STRAP_PCI_DEVID_23                        0x00000003 /* R---V */
#define NV_PFB_STRAP_FB32MB                                   14:14 /* R-XVF */
#define NV_PFB_STRAP_FB32MB_DISABLED                     0x00000000 /* R---V */
#define NV_PFB_STRAP_FB32MB_ENABLED                      0x00000001 /* R---V */
#define NV_PFB_STRAP_FP_IFACE                                 15:15 /* R-XVF */
#define NV_PFB_STRAP_FP_IFACE_24BIT                      0x00000000 /* R---V */
#define NV_PFB_STRAP_FP_IFACE_12BIT                      0x00000001 /* R---V */
#define NV_PFB_STRAP_OVERWRITE                                31:31 /* R-IVF */
#define NV_PFB_STRAP_OVERWRITE_DISABLED                  0x00000000 /* R-I-V */
#define NV_PFB_STRAP_OVERWRITE_ENABLED                   0x00000001 /* R---V */
#define NV_PFB_NEW_STRAP                                 0x00101000 /* RW-4R */
#define NV_PFB_NEW_STRAP_VALUE                                 15:0 /* RW-VF */
#define NV_PFB_NEW_STRAP_OVERWRITE                            31:31 /* RWIVF */
#define NV_PFB_NEW_STRAP_OVERWRITE_DISABLED              0x00000000 /* RWI-V */
#define NV_PFB_NEW_STRAP_OVERWRITE_ENABLED               0x00000001 /* RW--V */
/* dev_vga.ref */
#define NV_PCRTC_CURSOR                                  0x0060080c /* RWI4R */
#define NV_PCRTC_CURSOR_ADDRESS                                26:0 /* RW--F */
#define NV_PCRTC_CURSOR_CONFIG                           0x00600810 /* RWI4R */
#define NV_PCRTC_CURSOR_CONFIG_ENABLE                           0:0 /* RW--F */
#define NV_PCRTC_CURSOR_CONFIG_ENABLE_ENABLE             0x00000001 /* RW--V */
#define NV_PCRTC_CURSOR_CONFIG_ENABLE_DISABLE            0x00000000 /* RWI-V */
#define NV_PCRTC_CURSOR_CONFIG_SCAN_DOUBLE                      4:4 /* RW--F */
#define NV_PCRTC_CURSOR_CONFIG_SCAN_DOUBLE_ENABLE        0x00000001 /* RW--V */
#define NV_PCRTC_CURSOR_CONFIG_SCAN_DOUBLE_DISABLE       0x00000000 /* RWI-V */
#define NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE                    8:8 /* RW--F */
#define NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE_PNVM        0x00000001 /* RW--V */
#define NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE_PINST       0x00000000 /* RWI-V */
#define NV_PCRTC_CURSOR_CONFIG_CUR_BPP                        12:12 /* RW--F */
#define NV_PCRTC_CURSOR_CONFIG_CUR_BPP_16                0x00000000 /* RWI-V */
#define NV_PCRTC_CURSOR_CONFIG_CUR_BPP_32                0x00000001 /* RW--V */
#define NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS                     16:16 /* RW--F */
#define NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS_32             0x00000000 /* RWI-V */
#define NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS_64             0x00000001 /* RW--V */
#define NV_PCRTC_CURSOR_CONFIG_CUR_LINES                      27:20 /* RW--F */
#define NV_PCRTC_CURSOR_CONFIG_CUR_LINES_32              0x00000020 /* RWI-V */
#define NV_PCRTC_CURSOR_CONFIG_CUR_LINES_64              0x00000040 /* RW--V */
#define NV_PCRTC_CURSOR_CONFIG_CUR_BLEND                      28:28 /* RW--F */
#define NV_PCRTC_CURSOR_CONFIG_CUR_BLEND_ROP             0x00000000 /* RWI-V */
#define NV_PCRTC_CURSOR_CONFIG_CUR_BLEND_ALPHA           0x00000001 /* RW--V */
#define NV_PCRTC_VIP_RASTER                              0x00600814 /* R-I4R */
#define NV_PCRTC_VIP_RASTER_POSITION                           10:0 /* R---F */
#define NV_PCRTC_GPIO                                    0x00600818 /* RWI4R */
#define NV_PCRTC_GPIO_0_OUTPUT                                  0:0 /* RWI-F */
#define NV_PCRTC_GPIO_0_OUTPUT_0                         0x00000000 /* RWI-V */
#define NV_PCRTC_GPIO_0_ENABLE                                  4:4 /* R---F */
#define NV_PCRTC_GPIO_0_ENABLE_DISABLE                   0x00000001 /* RWI-V */
#define NV_PCRTC_GPIO_0_ENABLE_ENABLE                    0x00000000 /* RW--V */
#define NV_PCRTC_GPIO_0_INPUT                                   8:8 /* R---F */
#define NV_PCRTC_GPIO_1_OUTPUT                                16:16 /* RWI-F */
#define NV_PCRTC_GPIO_1_OUTPUT_0                         0x00000000 /* RWI-V */
#define NV_PCRTC_GPIO_1_ENABLE                                20:20 /* R---F */
#define NV_PCRTC_GPIO_1_ENABLE_DISABLE                   0x00000001 /* RWI-V */
#define NV_PCRTC_GPIO_1_ENABLE_ENABLE                    0x00000000 /* RW--V */
#define NV_PCRTC_GPIO_1_INPUT                                 24:24 /* R---F */
#define NV_PCRTC_FIFO_CNTRL                              0x00600820 /* RWI4R */
#define NV_PCRTC_FIFO_CNTRL_ADDRESS                             5:0 /* RW--F */
#define NV_PCRTC_FIFO_CNTRL_RAM                                 9:8 /* RW--F */
#define NV_PCRTC_FIFO_CNTR_TESTMODE                           16:16 /* RW--F */
#define NV_PCRTC_FIFO_CNTR_TESTMODE_ENABLE                        1 /* RW--V */
#define NV_PCRTC_FIFO_CNTR_TESTMODE_DISABLE                       0 /* RW--V */
#define NV_PCRTC_FIFO_DATA                               0x00600824 /* RWI4R */
#define NV_PCRTC_FIFO_DATA_VAL                                 31:0 /* RW--F */
/* dev_pm.ref */
#define NV_PPM                                0x0000AFFF:0x0000A000 /* RW--D */
#define NV_PPM_NV_TRIG0_SEL                              0x0000A400 /* RW-4R */
#define NV_PPM_NV_TRIG0_SEL_SEL0                                7:0 /* RWXUF */
#define NV_PPM_NV_TRIG0_SEL_SEL1                               15:8 /* RWXUF */
#define NV_PPM_NV_TRIG0_SEL_SEL2                              23:16 /* RWXUF */
#define NV_PPM_NV_TRIG0_SEL_SEL3                              31:24 /* RWXUF */
#define NV_PPM_NV_TRIG0_OP                               0x0000A404 /* RW-4R */
#define NV_PPM_NV_TRIG0_OP_FUNC                                15:0 /* RWXUF */
#define NV_PPM_NV_TRIG0_OP_DSEL0                              16:16 /* RWXUF */
#define NV_PPM_NV_TRIG0_OP_DSEL1                              17:17 /* RWXUF */
#define NV_PPM_NV_TRIG1_SEL                              0x0000A408 /* RW-4R */
#define NV_PPM_NV_TRIG1_SEL_SEL0                                7:0 /* RWXUF */
#define NV_PPM_NV_TRIG1_SEL_SEL1                               15:8 /* RWXUF */
#define NV_PPM_NV_TRIG1_SEL_SEL2                              23:16 /* RWXUF */
#define NV_PPM_NV_TRIG1_SEL_SEL3                              31:24 /* RWXUF */
#define NV_PPM_NV_TRIG1_OP                               0x0000A40C /* RW-4R */
#define NV_PPM_NV_TRIG1_OP_FUNC                                15:0 /* RWXUF */
#define NV_PPM_NV_TRIG1_OP_DSEL0                              16:16 /* RWXUF */
#define NV_PPM_NV_TRIG1_OP_DSEL1                              17:17 /* RWXUF */
#define NV_PPM_NV_EVENT_SEL                              0x0000A410 /* RW-4R */
#define NV_PPM_NV_EVENT_SEL_SEL0                                7:0 /* RWXUF */
#define NV_PPM_NV_EVENT_SEL_SEL1                               15:8 /* RWXUF */
#define NV_PPM_NV_EVENT_SEL_SEL2                              23:16 /* RWXUF */
#define NV_PPM_NV_EVENT_SEL_SEL3                              31:24 /* RWXUF */
#define NV_PPM_NV_EVENT_OP                               0x0000A414 /* RW-4R */
#define NV_PPM_NV_EVENT_OP_FUNC                                15:0 /* RWXUF */
#define NV_PPM_NV_EVENT_OP_DSEL0                              16:16 /* RWXUF */
#define NV_PPM_NV_EVENT_OP_DSEL1                              17:17 /* RWXUF */
#define NV_PPM_NV_SAMPLE_SEL                             0x0000A418 /* RW-4R */
#define NV_PPM_NV_SAMPLE_SEL_SEL0                               7:0 /* RWXUF */
#define NV_PPM_NV_SAMPLE_SEL_SEL1                              15:8 /* RWXUF */
#define NV_PPM_NV_SAMPLE_SEL_SEL2                             23:16 /* RWXUF */
#define NV_PPM_NV_SAMPLE_SEL_SEL3                             31:24 /* RWXUF */
#define NV_PPM_NV_SAMPLE_OP                              0x0000A41C /* RW-4R */
#define NV_PPM_NV_SAMPLE_OP_FUNC                               15:0 /* RWXUF */
#define NV_PPM_NV_SAMPLE_OP_DSEL0                             16:16 /* RWXUF */
#define NV_PPM_NV_SAMPLE_OP_DSEL1                             17:17 /* RWXUF */
#define NV_PPM_NV_SETFLAG_SEL                            0x0000A420 /* RW-4R */
#define NV_PPM_NV_SETFLAG_SEL_SEL0                              7:0 /* RWXUF */
#define NV_PPM_NV_SETFLAG_SEL_SEL1                             15:8 /* RWXUF */
#define NV_PPM_NV_SETFLAG_SEL_SEL2                            23:16 /* RWXUF */
#define NV_PPM_NV_SETFLAG_SEL_SEL3                            31:24 /* RWXUF */
#define NV_PPM_NV_SETFLAG_OP                             0x0000A424 /* RW-4R */
#define NV_PPM_NV_SETFLAG_OP_FUNC                              15:0 /* RWXUF */
#define NV_PPM_NV_SETFLAG_OP_DSEL0                            16:16 /* RWXUF */
#define NV_PPM_NV_SETFLAG_OP_DSEL1                            17:17 /* RWXUF */
#define NV_PPM_NV_CLRFLAG_SEL                            0x0000A428 /* RW-4R */
#define NV_PPM_NV_CLRFLAG_SEL_SEL0                              7:0 /* RWXUF */
#define NV_PPM_NV_CLRFLAG_SEL_SEL1                             15:8 /* RWXUF */
#define NV_PPM_NV_CLRFLAG_SEL_SEL2                            23:16 /* RWXUF */
#define NV_PPM_NV_CLRFLAG_SEL_SEL3                            31:24 /* RWXUF */
#define NV_PPM_NV_CLRFLAG_OP                             0x0000A42C /* RW-4R */
#define NV_PPM_NV_CLRFLAG_OP_FUNC                              15:0 /* RWXUF */
#define NV_PPM_NV_CLRFLAG_OP_DSEL0                            16:16 /* RWXUF */
#define NV_PPM_NV_CLRFLAG_OP_DSEL1                            17:17 /* RWXUF */
#define NV_PPM_NV_ELAPSED_0                              0x0000A600 /* RR-4R */
#define NV_PPM_NV_ELAPSED_0_VAL                                31:0 /* RR-UF */
#define NV_PPM_NV_ELAPSED_1                              0x0000A604 /* RR-4R */
#define NV_PPM_NV_ELAPSED_1_VAL                                 7:0 /* RR-UF */
#define NV_PPM_NV_CYCLECNT_0                             0x0000A608 /* RR-4R */
#define NV_PPM_NV_CYCLECNT_0_VAL                               31:0 /* RR-UF */
#define NV_PPM_NV_CYCLECNT_1                             0x0000A60C /* RR-4R */
#define NV_PPM_NV_CYCLECNT_1_VAL                                7:0 /* RR-UF */
#define NV_PPM_NV_EVENTCNT_0                             0x0000A610 /* RR-4R */
#define NV_PPM_NV_EVENTCNT_0_VAL                               31:0 /* RR-UF */
#define NV_PPM_NV_EVENTCNT_1                             0x0000A614 /* RR-4R */
#define NV_PPM_NV_EVENTCNT_1_VAL                                7:0 /* RR-UF */
#define NV_PPM_NV_THRESHCNT_0                            0x0000A618 /* RR-4R */
#define NV_PPM_NV_THRESHCNT_0_VAL                              31:0 /* RR-UF */
#define NV_PPM_NV_THRESHCNT_1                            0x0000A61C /* RR-4R */
#define NV_PPM_NV_THRESHCNT_1_VAL                               7:0 /* RR-UF */
#define NV_PPM_NV_TRIGGERCNT                             0x0000A620 /* RW-4R */
#define NV_PPM_NV_TRIGGERCNT_VAL                               31:0 /* RWXUF */
#define NV_PPM_NV_SAMPLECNT                              0x0000A624 /* RW-4R */
#define NV_PPM_NV_SAMPLECNT_VAL                                31:0 /* RWXUF */
#define NV_PPM_NV_THRESHOLD_0                            0x0000A628 /* RW-4R */
#define NV_PPM_NV_THRESHOLD_0_VAL                              31:0 /* RWXUF */
#define NV_PPM_NV_THRESHOLD_1                            0x0000A62C /* RW-4R */
#define NV_PPM_NV_THRESHOLD_1_VAL                               7:0 /* RWXUF */
#define NV_PPM_NV_WATCH0                                 0x0000A430 /* RR-4R */
#define NV_PPM_NV_WATCH0_GR_XF2PM_XF_IDLE                      0: 0 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_XF2PM_XF2VTX_DATA_VALID            1: 1 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_XF2PM_XF2IDX_BUSY                  2: 2 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_VTX2PM_VTXPRIMIDLE                 3: 3 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_VTX2PM_VTX2STP_PRIMVALID           4: 4 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_VTX2PM_VTX2IDX_BUSY                5: 5 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_VTX2PM_VTX2COL_VALID               6: 6 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TP1_REPLACER_STALL          7: 7 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TP1_MP_QUEUE_STALL          8: 8 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TP1_COALESCER_STALL         9: 9 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TP0_REPLACER_STALL         10:10 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TP0_MP_QUEUE_STALL         11:11 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TP0_COALESCER_STALL        12:12 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TEX2MATH_TP1_BUSY          13:13 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TEX2MATH_TP0_BUSY          14:14 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TEX2LIT_REQ                15:15 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_TEX2LIT_REGLD              16:16 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_SNAP_PULSE                 17:17 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_RBFR_FULL_STALL            18:18 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_CACHE_IDLE                 19:19 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_TEX2PM_C2DMA_DV                   20:20 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_VTX_OFFSCREEN              21:21 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_STP_IDLE                   22:22 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_STP2VTX_BUSY               23:23 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_STP2RSTR_VALID             24:24 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_STP2RSTR_DO_SWATHS         25:25 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_STP2CLP_VALID              26:26 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_START_PRIM                 27:27 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_POLYMODE                   28:28 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_DUAL_TEXTURE               29:29 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_DO_POINT                   30:30 /* RR-UF */
#define NV_PPM_NV_WATCH0_GR_STP2PM_DO_LINE                    31:31 /* RR-UF */
#define NV_PPM_NV_WATCH1                                 0x0000A434 /* RR-4R */
#define NV_PPM_NV_WATCH1_GR_STP2PM_CYL_WRAP                    0: 0 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_SMALL                  1: 1 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_NEAR                   2: 2 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_FRONT                  3: 3 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_FAR                    4: 4 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_ENA                    5: 5 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_BBOX                   6: 6 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_BACK                   7: 7 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_SEARCH_MODE                8: 8 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR_EOPRIM                9: 9 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR2PIPE_XY_VALID        10:10 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR2PIPE_EOPOLY          11:11 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR2MATH_NEWLINE         12:12 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR2MATH_ABC_VALID       13:13 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_PIXCNT_0                  14:14 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_PIXCNT_1                  15:15 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_PIXCNT_2                  16:16 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_FINE_STALL                17:17 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_FINE_IDLE                 18:18 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_FINE_EDGE_EVAL            19:19 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_FINE_ALIASED              20:20 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_COARSE_VALID              21:21 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_COARSE_STALL              22:22 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_RSTR2PM_COARSE_IDLE               23:23 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_ROP2PM_ZWRITE                     24:24 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_ROP2PM_ZPARTIAL                   25:25 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_ROP2PM_WAITMEMWR                  26:26 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_ROP2PM_WAITMEMRD                  27:27 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_ROP2PM_WAIT_BUF                   28:28 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_ROP2PM_ROP_IDLE                   29:29 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_ROP2PM_ROP2FB_REQ                 30:30 /* RR-UF */
#define NV_PPM_NV_WATCH1_GR_ROP2PM_ROP2FB_RD                  31:31 /* RR-UF */
#define NV_PPM_NV_WATCH2                                 0x0000A438 /* RR-4R */
#define NV_PPM_NV_WATCH2_GR_ROP2PM_ROP2FB_ALOM                 0: 0 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_ROP2PM_CWRITE                      1: 1 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_PRE_OUTPUT_BUSY             2: 2 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2MATH_IM_NEWLINE         3: 3 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_RSTR2D_IDLE                 4: 4 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2FE_RSTR2D_BUSY          5: 5 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_MATH_CACHE_BUSY             6: 6 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2PRE_OUTPUT_REQ          7: 7 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2PRE_OUTPUT_NOP          8: 8 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2MATH_IM_RIGHT_DV        9: 9 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2MATH_IM_LEFT_DV        10:10 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_R2D2PM_FE_REQ                     11:11 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PRE2PM_PREROP_IDLE                12:12 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2ROP_ROP_REQ            13:13 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2ROP_POSTING_BUFFER     14:14 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2R2D_OUTPUT_BUSY        15:15 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2PIPE_BUSY              16:16 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2LIT_BUSY               17:17 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PRE2PM_COALESCE                   18:18 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PRE2PM_ALL3D_REQ                  19:19 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PIPE2PM_PIPE_XY_RDY               20:20 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_PIPE2PM_PIPE_IDLE                 21:21 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2TEX_TP1_REQ          22:22 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2TEX_TP0_REQ          23:23 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2TEX_MAGNIFY          24:24 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2TEX_ANISO_SAMPLE     25:25 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2RSTR_RDY             26:26 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2RSTR_ABC_RDY         27:27 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_LIT2PM_RECIRC_CYCLE               28:28 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_LIT2PM_LIT2TEX_BUSY               29:29 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_LIT2PM_LIT2PRE_REQ                30:30 /* RR-UF */
#define NV_PPM_NV_WATCH2_GR_LIT2PM_LIT2COL_BUSY               31:31 /* RR-UF */
#define NV_PPM_NV_WATCH3                                 0x0000A43C /* RR-4R */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_THREADSTALLED               0: 0 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_PTEBUSY                     1: 1 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_INTALIGN                    2: 2 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_IDXFRONTIDLE                3: 3 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2XF_VALID_0              4: 4 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2XF_VALID_1              5: 5 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2VTX_VALID               6: 6 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2PMI_VALID               7: 7 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2FBI_VALID               8: 8 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2DEC_BUSY                9: 9 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_COMPOVFL                   10:10 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_IDX2PM_CACHETHRASH                11:11 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FF2PM_FF_GR_RDY                   12:12 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FF2PM_FF_GR_B2B                   13:13 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_NVINTR_GR                   14:14 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_WAIT_GR_IDLE                15:15 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_NOP                         16:16 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_GR_SWITCH                   17:17 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_GR_IDLE                     18:18 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_FBI_REQ_BURST               19:19 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_FBI_REQ                     20:20 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_FBI_RD                      21:21 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_FBI_INST                    22:22 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FE2PM_CACHE_INVALIDATE            23:23 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_FBI2PM_FBI2IDX_BUSY               24:24 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_DMA2PM_DMA2C_DV                   25:25 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_DMA2PM_DMA2C_ASTALL               26:26 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_DEC2PM_DEC2IDX_VALID_0            27:27 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_DEC2PM_DEC2IDX_VALID_1            28:28 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_COL2PM_SPECULAR_RECIRC            29:29 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_COL2PM_COLOR_IDLE                 30:30 /* RR-UF */
#define NV_PPM_NV_WATCH3_GR_COL2PM_COL2XYPIPE_BUSY            31:31 /* RR-UF */
#define NV_PPM_NV_WATCH4                                 0x0000A630 /* RR-4R */
#define NV_PPM_NV_WATCH4_GR_COL2PM_COL2VTX_BUSY                0: 0 /* RR-UF */
#define NV_PPM_NV_WATCH4_GR_COL2PM_COL2LIT_REQ                 1: 1 /* RR-UF */
#define NV_PPM_NV_WATCH4_GR_COL2PM_COL2FCOMB_REQ               2: 2 /* RR-UF */
#define NV_PPM_NV_WATCH4_GR_COL2PM_COL2CLP_BUSY                3: 3 /* RR-UF */
#define NV_PPM_NV_WATCH4_GR_CLP2PM_CLP2STP_BUSY                4: 4 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_PMI2PM_PMI2IDX_VALID              5: 5 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_PMI2PM_PMI2IDX_BUSY               6: 6 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_HOST2PM_TIMER_262US               7: 7 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_HOST2PM_FF_GR_MDV                 8: 8 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_HOST2PM_FF_DHV                    9: 9 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_HOST2PM_FF_CHSW                  10:10 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_FBI2PM_X_DLY                     11:11 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_FBI2PM_S_DLY                     12:12 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_FBI2PM_R2W_DLY                   13:13 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_FBI2PM_H_DLY                     14:14 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_FB2PM_FB2ROP_BUSY                15:15 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_FBI2PM_D_DLY                     16:16 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_FBI2PM_BC                        17:17 /* RR-UF */
#define NV_PPM_NV_WATCH4_TOP_CRTC2PM_CRTC2DAC_VSYNC2DAC       18:18 /* RR-UF */
#define NV_PPM_CONTROL                                   0x0000A73C /* RW-4R */
#define NV_PPM_CONTROL_OUT_SEL                                  0:0 /* RWXUF */
#define NV_PPM_CONTROL_OUT_SEL_PM                        0x00000000 /* RWI-V */
#define NV_PPM_CONTROL_OUT_SEL_FBIDEBUG                  0x00000001 /* RWI-V */
#define NV_PPM_CONTROL_DRIVE_OUT                                1:1 /* RWXUF */
#define NV_PPM_CONTROL_DRIVE_OUT_NORMAL                  0x00000000 /* RWI-V */
#define NV_PPM_CONTROL_DRIVE_OUT_OBSERVE                 0x00000001 /* RWI-V */
#define NV_PPM_CONTROL_NV_ADDTOEVENT                            2:2 /* RWXUF */
#define NV_PPM_CONTROL_NV_ADDTOEVENT_INCR                0x00000000 /* RWI-V */
#define NV_PPM_CONTROL_NV_ADDTOEVENT_ADDTRIG1            0x00000001 /* RWI-V */
#define NV_PPM_CONTROL_NV_STATE                                 4:3 /* RRIUF */
#define NV_PPM_CONTROL_STATE_IDLE                        0x00000000 /* RWI-V */
#define NV_PPM_CONTROL_STATE_WAIT_TRIG0                  0x00000001 /* RWI-V */
#define NV_PPM_CONTROL_STATE_WAIT_TRIG1                  0x00000002 /* RWI-V */
#define NV_PPM_CONTROL_STATE_CAPTURE                     0x00000003 /* RWI-V */
/* dev_ram.ref */
#define NV_RAMHT__SIZE_0                      0x00000FFF:0x00000000 /* RW--M */
#define NV_RAMHT__SIZE_1                      0x00001FFF:0x00000000 /* RW--M */
#define NV_RAMHT__SIZE_2                      0x00003FFF:0x00000000 /* RW--M */
#define NV_RAMHT__SIZE_3                      0x00007FFF:0x00000000 /* RW--M */
#define NV_RAMHT_HANDLE                       ( 0*32+31):( 0*32+ 0) /* RWXVF */
#define NV_RAMHT_INSTANCE                     ( 1*32+15):( 1*32+ 0) /* RWXUF */
#define NV_RAMHT_ENGINE                       ( 1*32+17):( 1*32+16) /* RWXVF */
#define NV_RAMHT_ENGINE_SW                               0x00000000 /* RW--V */
#define NV_RAMHT_ENGINE_GRAPHICS                         0x00000001 /* RW--V */
#define NV_RAMHT_ENGINE_DVD                              0x00000002 /* RW--V */
#define NV_RAMHT_CHID                         ( 1*32+28):( 1*32+24) /* RWXUF */
#define NV_RAMHT_STATUS                       ( 1*32+31):( 1*32+31) /* RWXUF */
#define NV_RAMHT_STATUS_INVALID                          0x00000000 /* RW--V */
#define NV_RAMHT_STATUS_VALID                            0x00000001 /* RW--V */
/* dev_ram.ref */
#define NV_RAMRO__SIZE_0                      0x000001FF:0x00000000 /* RW--M */
#define NV_RAMRO__SIZE_1                      0x00001FFF:0x00000000 /* RW--M */
#define NV_RAMRO_METHOD                       ( 0*32+12):( 0*32+ 0) /* RWXUF */
#define NV_RAMRO_SUBCHANNEL                   ( 0*32+15):( 0*32+13) /* RWXUF */
#define NV_RAMRO_CHID                         ( 0*32+22):( 0*32+16) /* RWXUF */
#define NV_RAMRO_TYPE                         ( 0*32+23):( 0*32+23) /* RWXVF */
#define NV_RAMRO_TYPE_WRITE                              0x00000000 /* RW--V */
#define NV_RAMRO_TYPE_READ                               0x00000001 /* RW--V */
#define NV_RAMRO_BYTE_ENABLES                 ( 0*32+27):( 0*32+24) /* RWXVF */
#define NV_RAMRO_REASON                       ( 0*32+31):( 0*32+28) /* RWXVF */
#define NV_RAMRO_REASON_ILLEGAL_ACCESS                   0x00000000 /* RW--V */
#define NV_RAMRO_REASON_NO_CACHE_AVAILABLE               0x00000001 /* RW--V */
#define NV_RAMRO_REASON_CACHE_RAN_OUT                    0x00000002 /* RW--V */
#define NV_RAMRO_REASON_FREE_COUNT_OVERRUN               0x00000003 /* RW--V */
#define NV_RAMRO_REASON_CAUGHT_LYING                     0x00000004 /* RW--V */
#define NV_RAMRO_REASON_RESERVED_ACCESS                  0x00000005 /* RW--V */
#define NV_RAMRO_DATA                         ( 1*32+31):( 1*32+ 0) /* RWXVF */
/* dev_ram.ref */
#define NV_RAMFC__SIZE_0                      0x000003FF:0x00000000 /* RW--M */
#define NV_RAMFC_DMA_PUT                      ( 0*32+28):( 0*32+ 2) /* RWXUF */
#define NV_RAMFC_DMA_GET                      ( 1*32+28):( 1*32+ 2) /* RWXUF */
#define NV_RAMFC_REF_CNT                      ( 2*32+31):( 2*32+ 0) /* RWXUF */
#define NV_RAMFC_DMA_INST                     ( 3*32+15):( 3*32+ 0) /* RWXUF */
#define NV_RAMFC_DMA_COUNT                    ( 3*32+28):( 3*32+18) /* RWXUF */
#define NV_RAMFC_DMA_METHOD                   ( 4*32+12):( 4*32+ 2) /* RWXUF */
#define NV_RAMFC_DMA_SUBCHANNEL               ( 4*32+15):( 4*32+13) /* RWXUF */
#define NV_RAMFC_DMA_METHOD_COUNT             ( 4*32+28):( 4*32+18) /* RWXUF */
#define NV_RAMFC_DMA_METHOD_TYPE              ( 4*32+ 0):( 4*32+ 0) /* RWXUF */
#define NV_RAMFC_DMA_FETCH_TRIG               ( 5*32+ 7):( 5*32+ 3) /* RWXUF */
#define NV_RAMFC_DMA_FETCH_SIZE               ( 5*32+15):( 5*32+13) /* RWXUF */
#define NV_RAMFC_DMA_FETCH_MAX_REQS           ( 5*32+20):( 5*32+16) /* RWXUF */
#define NV_RAMFC_ENGINE_SUB_0                 ( 6*32+ 1):( 6*32+ 0) /* RWXUF */
#define NV_RAMFC_ENGINE_SUB_1                 ( 6*32+ 5):( 6*32+ 4) /* RWXUF */
#define NV_RAMFC_ENGINE_SUB_2                 ( 6*32+ 9):( 6*32+ 8) /* RWXUF */
#define NV_RAMFC_ENGINE_SUB_3                 ( 6*32+13):( 6*32+12) /* RWXUF */
#define NV_RAMFC_ENGINE_SUB_4                 ( 6*32+17):( 6*32+16) /* RWXUF */
#define NV_RAMFC_ENGINE_SUB_5                 ( 6*32+21):( 6*32+20) /* RWXUF */
#define NV_RAMFC_ENGINE_SUB_6                 ( 6*32+25):( 6*32+24) /* RWXUF */
#define NV_RAMFC_ENGINE_SUB_7                 ( 6*32+29):( 6*32+28) /* RWXUF */
#define NV_RAMFC_ENGINE_SW                               0x00000000 /* RW--V */
#define NV_RAMFC_ENGINE_GRAPHICS                         0x00000001 /* RW--V */
#define NV_RAMFC_ENGINE_DVD                              0x00000002 /* RW--V */
#define NV_RAMFC_PULL1_ENGINE                 ( 7*32+ 1):( 7*32+ 0) /* RWXUF */
#define NV_RAMFC_PULL1_ENGINE_SW                         0x00000000 /* RW--V */
#define NV_RAMFC_PULL1_ENGINE_GRAPHICS                   0x00000001 /* RW--V */
#define NV_RAMFC_PULL1_ENGINE_DVD                        0x00000002 /* RW--V *//* dev_ram.ref */
/* dev_ram.ref */
/* dev_ram.ref */
#define NV_RAMDVD_CTX_TABLE                   (63*32+31):( 0*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT(c,s) (((c)*4+((s)/2))*32+((s)%2)*16+15):(((c)*4+((s)/2))*32+((s)%2)*16) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_0_0        ( 0*32+15):( 0*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_0_1        ( 0*32+31):( 0*32+16) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_0_2        ( 1*32+15):( 1*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_0_3        ( 1*32+31):( 1*32+16) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_0_4        ( 2*32+15):( 2*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_0_5        ( 2*32+31):( 2*32+16) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_0_6        ( 3*32+15):( 3*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_0_7        ( 3*32+31):( 3*32+16) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_15_0       (60*32+15):(60*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_15_1       (60*32+31):(60*32+16) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_15_2       (61*32+15):(61*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_15_3       (61*32+31):(61*32+16) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_15_4       (62*32+15):(62*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_15_5       (62*32+31):(62*32+16) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_15_6       (63*32+15):(63*32+ 0) /* RWXUF */
#define NV_RAMDVD_CTX_TABLE_OBJECT_15_7       (63*32+31):(63*32+16) /* RWXUF */
/* dev_ram.ref */
/* dev_ram.ref */
#define NV_DMA_CLASS                          ( 0*32+11):( 0*32+ 0) /* RWXUF */
#define NV_DMA_PAGE_TABLE                     ( 0*32+12):( 0*32+12) /* RWXVF */
#define NV_DMA_PAGE_TABLE_NOT_PRESENT                    0x00000000 /* RW--V */
#define NV_DMA_PAGE_TABLE_PRESENT                        0x00000001 /* RW--V */
#define NV_DMA_PAGE_ENTRY                     ( 0*32+13):( 0*32+13) /* RWXVF */
#define NV_DMA_PAGE_ENTRY_NOT_LINEAR                     0x00000000 /* RW--V */
#define NV_DMA_PAGE_ENTRY_LINEAR                         0x00000001 /* RW--V */
#define NV_DMA_FLAGS_ACCESS                   ( 0*32+15):( 0*32+14) /* RWXVF */
#define NV_DMA_FLAGS_ACCESS_READ_WRITE                   0x00000000 /* RW--V */
#define NV_DMA_FLAGS_ACCESS_READ_ONLY                    0x00000001 /* RW--V */
#define NV_DMA_FLAGS_ACCESS_WRITE_ONLY                   0x00000002 /* RW--V */
#define NV_DMA_TARGET_NODE                    ( 0*32+17):( 0*32+16) /* RWXVF */
#define NV_DMA_TARGET_NODE_NVM                           0x00000000 /* RW--V */
#define NV_DMA_TARGET_NODE_NVM_TILED                     0x00000001 /* RW--V */
#define NV_DMA_TARGET_NODE_PCI                           0x00000002 /* RW--V */
#define NV_DMA_TARGET_NODE_AGP                           0x00000003 /* RW--V */
#define NV_DMA_ADJUST                         ( 0*32+31):( 0*32+20) /* RWXUF */
#define NV_DMA_LIMIT                          ( 1*32+31):( 1*32+ 0) /* RWXUF */
#define NV_DMA_ACCESS                         ( 2*32+ 1):( 2*32+ 1) /* RWXVF */
#define NV_DMA_ACCESS_READ_ONLY                          0x00000000 /* RW--V */
#define NV_DMA_ACCESS_READ_AND_WRITE                     0x00000001 /* RW--V */
#define NV_DMA_FRAME_ADDRESS                  ( 2*32+31):( 2*32+12) /* RWXUF */
/* dev_ram.ref */
#define NV_SUBCHAN_CTX_SWITCH                 ( 0*32+31):( 0*32+ 0) /* RWXUF */
#define NV_SUBCHAN_DMA_INSTANCE               ( 1*32+15):( 1*32+ 0) /* RWXUF */
#define NV_SUBCHAN_NOTIFY_INSTANCE            ( 1*32+31):( 1*32+16) /* RWXUF */
#define NV_SUBCHAN_MEMFMT_INSTANCE            ( 2*32+15):( 2*32+ 0) /* RWXUF */
#define NV_SUBCHAN_MEMFMT_LINEAR              ( 2*32+16):( 2*32+16) /* RWXUF */
#define NV_SUBCHAN_MEMFMT_LINEAR_OUT                     0x00000000 /* RW--V */
#define NV_SUBCHAN_MEMFMT_LINEAR_IN                      0x00000001 /* RW--V */
#ifdef DEFUNCT
/* dev_realmode.ref */
#define NV_IO_MPU_401_DATA                               0x00000330 /* R--1R */
#define NV_IO_MPU_401_DATA__ALIAS_1                      0x00000300 /* R--1R */
#define NV_IO_MPU_401_DATA__ALIAS_2                      0x00000230 /* R--1R */
#define NV_IO_MPU_401_DATA_VALUE                                7:0 /* R--VF */
#define NV_IO_MPU_401_DATA_ACK                           0x000000FE /* R---V */
#define NV_IO_MPU_401_STATUS                             0x00000331 /* R--1R */
#define NV_IO_MPU_401_STATUS__ALIAS_1                    0x00000301 /* R--1R */
#define NV_IO_MPU_401_STATUS__ALIAS_2                    0x00000231 /* R--1R */
#define NV_IO_MPU_401_STATUS_DATA                               5:0 /* R--VF */
#define NV_IO_MPU_401_STATUS_WRITE                              6:6 /* R--VF */
#define NV_IO_MPU_401_STATUS_WRITE_EMPTY                 0x00000000 /* R---V */
#define NV_IO_MPU_401_STATUS_WRITE_FULL                  0x00000001 /* R---V */
#define NV_IO_MPU_401_STATUS_READ                               7:7 /* R--VF */
#define NV_IO_MPU_401_STATUS_READ_FULL                   0x00000000 /* R---V */
#define NV_IO_MPU_401_STATUS_READ_EMPTY                  0x00000001 /* R---V */
#define NV_IO_MPU_401_COM                                0x00000331 /* -W-1R */
#define NV_IO_MPU_401_COM__ALIAS_1                       0x00000301 /* -W-1R */
#define NV_IO_MPU_401_COM__ALIAS_2                       0x00000231 /* -W-1R */
#define NV_IO_MPU_401_COM_UART_MODE                             7:0 /* -WIVF */
#define NV_IO_MPU_401_COM_UART_MODE_COMPLEX              0x000000ff /* -WI-V */
#define NV_IO_MPU_401_COM_UART_MODE_SIMPLE               0x0000003f /* -W--V */
/* dev_realmode.ref */
#define NV_PRM                                0x00005FFF:0x00004000 /* RW--D */
#define NV_PRM_INTR_0                                    0x00004100 /* RW-4R */
#define NV_PRM_INTR_0_TRACE_MPU401                              0:0 /* RWXVF */
#define NV_PRM_INTR_0_TRACE_MPU401_NOT_PENDING           0x00000000 /* R---V */
#define NV_PRM_INTR_0_TRACE_MPU401_PENDING               0x00000001 /* R---V */
#define NV_PRM_INTR_0_TRACE_MPU401_RESET                 0x00000001 /* -W--V */
#define NV_PRM_INTR_0_TRACE_FM                                  4:4 /* RWXVF */
#define NV_PRM_INTR_0_TRACE_FM_NOT_PENDING               0x00000000 /* R---V */
#define NV_PRM_INTR_0_TRACE_FM_PENDING                   0x00000001 /* R---V */
#define NV_PRM_INTR_0_TRACE_FM_RESET                     0x00000001 /* -W--V */
#define NV_PRM_INTR_0_TRACE_SB_DIGITAL                          8:8 /* RWXVF */
#define NV_PRM_INTR_0_TRACE_SB_DIGITAL_NOT_PENDING       0x00000000 /* R---V */
#define NV_PRM_INTR_0_TRACE_SB_DIGITAL_PENDING           0x00000001 /* R---V */
#define NV_PRM_INTR_0_TRACE_SB_DIGITAL_RESET             0x00000001 /* -W--V */
#define NV_PRM_INTR_0_TRACE_SB_MIXER                          12:12 /* RWXVF */
#define NV_PRM_INTR_0_TRACE_SB_MIXER_NOT_PENDING         0x00000000 /* R---V */
#define NV_PRM_INTR_0_TRACE_SB_MIXER_PENDING             0x00000001 /* R---V */
#define NV_PRM_INTR_0_TRACE_SB_MIXER_RESET               0x00000001 /* -W--V */
#define NV_PRM_INTR_0_TRACE_OVERFLOW                          16:16 /* RWXVF */
#define NV_PRM_INTR_0_TRACE_OVERFLOW_NOT_PENDING         0x00000000 /* R---V */
#define NV_PRM_INTR_0_TRACE_OVERFLOW_PENDING             0x00000001 /* R---V */
#define NV_PRM_INTR_0_TRACE_OVERFLOW_RESET               0x00000001 /* -W--V */
#define NV_PRM_INTR_EN_0                                 0x00004140 /* RW-4R */
#define NV_PRM_INTR_EN_0_TRACE_MPU401                           0:0 /* RWIVF */
#define NV_PRM_INTR_EN_0_TRACE_MPU401_DISABLED           0x00000000 /* RWI-V */
#define NV_PRM_INTR_EN_0_TRACE_MPU401_ENABLED            0x00000001 /* RW--V */
#define NV_PRM_INTR_EN_0_TRACE_FM                               4:4 /* RWIVF */
#define NV_PRM_INTR_EN_0_TRACE_FM_DISABLED               0x00000000 /* RWI-V */
#define NV_PRM_INTR_EN_0_TRACE_FM_ENABLED                0x00000001 /* RW--V */
#define NV_PRM_INTR_EN_0_TRACE_SB_DIGITAL                       8:8 /* RWIVF */
#define NV_PRM_INTR_EN_0_TRACE_SB_DIGITAL_DISABLED       0x00000000 /* RWI-V */
#define NV_PRM_INTR_EN_0_TRACE_SB_DIGITAL_ENABLED        0x00000001 /* RW--V */
#define NV_PRM_INTR_EN_0_TRACE_SB_MIXER                       12:12 /* RWIVF */
#define NV_PRM_INTR_EN_0_TRACE_SB_MIXER_DISABLED         0x00000000 /* RWI-V */
#define NV_PRM_INTR_EN_0_TRACE_SB_MIXER_ENABLED          0x00000001 /* RW--V */
#define NV_PRM_INTR_EN_0_TRACE_OVERFLOW                       16:16 /* RWIVF */
#define NV_PRM_INTR_EN_0_TRACE_OVERFLOW_DISABLED         0x00000000 /* RWI-V */
#define NV_PRM_INTR_EN_0_TRACE_OVERFLOW_ENABLED          0x00000001 /* RW--V */
#define NV_PRM_RAMRM                                     0x00004200 /* RW-4R */
#define NV_PRM_RAMRM_BASE_ADDRESS                             15:12 /* RWXVF */
#define NV_PRM_RAMRM_BASE_ADDRESS_2000                   0x00002000 /* RWI-V */
#define NV_PRM_TRACE                                     0x00004300 /* RW-4R */
#define NV_PRM_TRACE_IO_CAPTURE                                 1:0 /* RWIVF */
#define NV_PRM_TRACE_IO_CAPTURE_DISABLED                 0x00000000 /* RWI-V */
#define NV_PRM_TRACE_IO_CAPTURE_WRITES                   0x00000001 /* RW--V */
#define NV_PRM_TRACE_IO_CAPTURE_READS                    0x00000002 /* RW--V */
#define NV_PRM_TRACE_IO_CAPTURE_READS_WRITES             0x00000003 /* RW--V */
#define NV_PRM_TRACE_IO_WRITE                                   4:4 /* RWXVF */
#define NV_PRM_TRACE_IO_WRITE_NONE                       0x00000000 /* R---V */
#define NV_PRM_TRACE_IO_WRITE_OCCURED                    0x00000001 /* R---V */
#define NV_PRM_TRACE_IO_WRITE_RESET                      0x00000001 /* -W--V */
#define NV_PRM_TRACE_IO_READ                                    5:5 /* RWXVF */
#define NV_PRM_TRACE_IO_READ_NONE                        0x00000000 /* R---V */
#define NV_PRM_TRACE_IO_READ_OCCURED                     0x00000001 /* R---V */
#define NV_PRM_TRACE_IO_READ_RESET                       0x00000001 /* -W--V */
#define NV_PRM_TRACE_INDEX                               0x00004310 /* RW-4R */
#define NV_PRM_TRACE_INDEX_ADDRESS                              9:0 /* RWXUF */
#define NV_PRM_TRACE_INDEX_ADDRESS_0                     0x00000000 /* RW--V */
#define NV_PRM_IGNORE_0                                  0x00004320 /* RW-4R */
#define NV_PRM_IGNORE_0_MPU401                                  1:0 /* RWXVF */
#define NV_PRM_IGNORE_0_MPU401_DISABLED                  0x00000000 /* RW--V */
#define NV_PRM_IGNORE_0_MPU401_WRITES                    0x00000001 /* RW--V */
#define NV_PRM_IGNORE_0_MPU401_READS                     0x00000002 /* RW--V */
#define NV_PRM_IGNORE_0_MPU401_READS_WRITES              0x00000003 /* RW--V */
#define NV_PRM_IGNORE_0_FM                                      5:4 /* RWXVF */
#define NV_PRM_IGNORE_0_FM_DISABLED                      0x00000000 /* RW--V */
#define NV_PRM_IGNORE_0_FM_WRITES                        0x00000001 /* RW--V */
#define NV_PRM_IGNORE_0_FM_READS                         0x00000002 /* RW--V */
#define NV_PRM_IGNORE_0_FM_READS_WRITES                  0x00000003 /* RW--V */
#define NV_PRM_IGNORE_0_SB_DIGITAL                              9:8 /* RWXVF */
#define NV_PRM_IGNORE_0_SB_DIGITAL_DISABLED              0x00000000 /* RW--V */
#define NV_PRM_IGNORE_0_SB_DIGITAL_WRITES                0x00000001 /* RW--V */
#define NV_PRM_IGNORE_0_SB_DIGITAL_READS                 0x00000002 /* RW--V */
#define NV_PRM_IGNORE_0_SB_DIGITAL_READS_WRITES          0x00000003 /* RW--V */
#define NV_PRM_IGNORE_0_SB_MIXER                              13:12 /* RWXVF */
#define NV_PRM_IGNORE_0_SB_MIXER_DISABLED                0x00000000 /* RW--V */
#define NV_PRM_IGNORE_0_SB_MIXER_WRITES                  0x00000001 /* RW--V */
#define NV_PRM_IGNORE_0_SB_MIXER_READS                   0x00000002 /* RW--V */
#define NV_PRM_IGNORE_0_SB_MIXER_READS_WRITES            0x00000003 /* RW--V */
/* dev_realmode.ref */
#define NV_PRMIO                              0x00007FFF:0x00007000 /* RW--D */
/* dev_realmode.ref */
/* dev_realmode.ref */
#define NV_TRACE                              0x0000FFFF:0x00000000 /* RW--M */
#define NV_TRACE_DATA                         ( 0*32+ 7):( 0*32+ 0) /* RWXVF */
#define NV_TRACE_ACCESS                       ( 0*32+14):( 0*32+14) /* RWXVF */
#define NV_TRACE_ACCESS_WRITE                            0x00000000 /* RW--V */
#define NV_TRACE_ACCESS_READ                             0x00000001 /* RW--V */
#define NV_TRACE_TYPE                         ( 0*32+15):( 0*32+15) /* RWXVF */
#define NV_TRACE_TYPE_IO                                 0x00000000 /* RW--V */
#define NV_TRACE_TYPE_MEMORY                             0x00000001 /* RW--V */
#define NV_TRACE_ADDRESS                      ( 0*32+31):( 0*32+16) /* RWXUF */
#endif

#endif // _NV10_REF_H_
