/*  FILE: nv_papu.h
 *  CREATED: Tue Oct  3 12:55:57 2000
 *
 *  Copyright (c) 2000, by NVIDIA CORP
 *  All Rights Reserved.
 */

 /*** DO NOT EDIT, THIS FILE GENERATED FROM ..\..\..\manuals\dev_apu.ref ***/


#ifndef __NV_PAPU_H__
#define __NV_PAPU_H__


/***********************************************/
/* Macros and constants                        */
/***********************************************/

#ifndef REF_VAL
#define DRF_SHIFT(drf)    ((0?drf)                            % 32)
#define DRF_MASK(drf)     (0xFFFFFFFF>>(31-((1?drf)                            % 32)+((0?drf)                            % 32)))
#define REF_VAL(drf,v)    (((v)>>DRF_SHIFT(drf))&DRF_MASK(drf))
#define REF_NUM(drf,n)    (((n)&DRF_MASK(drf))<<DRF_SHIFT(drf))
#endif /* !REF_VAL */

/***********************************************/
/*    #defines from the manuals                */
/***********************************************/

#define NV_PAVS                                            0x0000007F:0x00000000 /* RW--D */
#define NV_PAVS_SIZE                                       0x00000080 /* RW--V */
#define NV_PAVS_SIZE_LG2                                   0x7 /* RW--V */
#define NV_PAVS_VOICE_CFG_00                               0x00000000 /* */ 
#define NV_PAVS_VOICE_CFG_VBIN                             0x00000000 /* -W-4R */
#define NV_PAVS_VOICE_CFG_VBIN_V0BIN                       4:0 /* -W-UF */
#define NV_PAVS_VOICE_CFG_VBIN_V1BIN                       9:5 /* -W-UF */
#define NV_PAVS_VOICE_CFG_VBIN_V2BIN                       14:10 /* -W-UF */
#define NV_PAVS_VOICE_CFG_VBIN_V3BIN                       20:16 /* -W-UF */
#define NV_PAVS_VOICE_CFG_VBIN_V4BIN                       25:21 /* -W-UF */
#define NV_PAVS_VOICE_CFG_VBIN_V5BIN                       30:26 /* -W-UF */
#define NV_PAVS_VOICE_CFG_FMT                              0x00000004 /* -W-4R */
#define NV_PAVS_VOICE_CFG_FMT_V6BIN                        4:0 /* -W-UF */
#define NV_PAVS_VOICE_CFG_FMT_V7BIN                        9:5 /* -W-UF */
#define NV_PAVS_VOICE_CFG_FMT_V6PHASE                      10:10 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_V6PHASE_POSITIVE             0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_V6PHASE_NEGATIVE             0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_V7PHASE                      11:11 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_V7PHASE_POSITIVE             0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_V7PHASE_NEGATIVE             0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_GAIN                         12:12 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_GAIN_X1                      0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_GAIN_X2                      0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_HEADROOM                     15:13 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_HEADROOM_SRC0_FLT0           0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_HEADROOM_SRC1_FLT0           0x04 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_HEADROOM_SRC1_FLT1           0x05 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_HEADROOM_SRC1_FLT2           0x06 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_HEADROOM_SRC1_FLT3           0x07 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_SAMPLES_PER_BLOCK            20:16 /* -W-UF */
#define NV_PAVS_VOICE_CFG_FMT_MULTIPASS_BIN__ALIAS__       20:16 /* -W-UF */
#define NV_PAVS_VOICE_CFG_FMT_MULTIPASS                    21:21 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_MULTIPASS_OFF                0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_MULTIPASS_ON                 0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_LINKED_VOICE                 22:22 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_LINKED_VOICE_OFF             0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_LINKED_VOICE_ON              0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_PERSIST                      23:23 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_PERSIST_OFF                  0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_PERSIST_ON                   0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_DATA_TYPE                    24:24 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_DATA_TYPE_BUFFER             0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_DATA_TYPE_STREAM             0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_LOOP                         25:25 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_LOOP_OFF                     0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_LOOP_ON                      0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_CLEAR_MIX                    26:26 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_CLEAR_MIX_FALSE              0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_CLEAR_MIX_TRUE               0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_STEREO                       27:27 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_STEREO_DISABLE               0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_STEREO_ENABLE                0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_SAMPLE_SIZE                  29:28 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_SAMPLE_SIZE_U8               0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_SAMPLE_SIZE_S16              0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_SAMPLE_SIZE_S24              0x02 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_SAMPLE_SIZE_S32              0x03 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_CONTAINER_SIZE               31:30 /* -W-VF */
#define NV_PAVS_VOICE_CFG_FMT_CONTAINER_SIZE_B8            0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_CONTAINER_SIZE_B16           0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_FMT_CONTAINER_SIZE_B32           0x03 /* -W--V */
#define NV_PAVS_VOICE_CFG_ENV0                             0x00000008 /* -W-4R */
#define NV_PAVS_VOICE_CFG_ENV0_EA_ATTACKRATE               11:0 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENV0_EA_DELAYTIME                23:12 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENV0_EF_PITCHSCALE               31:24 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENVA                             0x0000000C /* -W-4R */
#define NV_PAVS_VOICE_CFG_ENVA_EA_DECAYRATE                11:0 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENVA_EA_HOLDTIME                 23:12 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENVA_EA_SUSTAINLEVEL             31:24 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENV1                             0x00000010 /* -W-4R */
#define NV_PAVS_VOICE_CFG_ENV1_EF_ATTACKRATE               11:0 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENV1_EF_DELAYTIME                23:12 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENV1_EF_FCSCALE                  31:24 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENVF                             0x00000014 /* -W-4R */
#define NV_PAVS_VOICE_CFG_ENVF_EF_DECAYRATE                11:0 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENVF_EF_HOLDTIME                 23:12 /* -W-UF */
#define NV_PAVS_VOICE_CFG_ENVF_EF_SUSTAINLEVEL             31:24 /* -W-UF */
#define NV_PAVS_VOICE_CFG_MISC                             0x00000018 /* -W-4R */
#define NV_PAVS_VOICE_CFG_MISC_EF_RELEASERATE              11:0 /* -W-UF */
#define NV_PAVS_VOICE_CFG_MISC_LFOA_DELAYMODE              14:14 /* -W-VF */
#define NV_PAVS_VOICE_CFG_MISC_LFOA_DELAYMODE_NORMAL       0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_LFOA_DELAYMODE_DELAY        0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_LFOF_DELAYMODE              15:15 /* -W-VF */
#define NV_PAVS_VOICE_CFG_MISC_LFOF_DELAYMODE_NORMAL       0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_LFOF_DELAYMODE_DELAY        0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE                       17:16 /* -W-VF */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_BYPASS                0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_STEREO_DLS2           0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_STEREO_P_EQ           0x02 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_MONO_DLS2             0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_MONO_P_EQ             0x02 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_MONO_DLS2_P_EQ        0x03 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_THREED_DLS2_I3DL2     0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_THREED_P_EQ_I3DL2     0x02 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_FMODE_THREED_I3DL2          0x03 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_BPQ                         20:18 /* -W-UF */
#define NV_PAVS_VOICE_CFG_MISC_NOTIFY_INTERRUPT            23:23 /* -W-VF */
#define NV_PAVS_VOICE_CFG_MISC_NOTIFY_INTERRUPT_DISABLE    0x00 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_NOTIFY_INTERRUPT_ENABLE     0x01 /* -W--V */
#define NV_PAVS_VOICE_CFG_MISC_V_GSCNT                     31:24 /* -W-UF */
#define NV_PAVS_VOICE_CFG_HRTF_TARGET                      0x0000001C /* -W-4R */
#define NV_PAVS_VOICE_CFG_HRTF_TARGET_HANDLE               15:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PSL_START                        0x00000020 /* -W-4R */
#define NV_PAVS_VOICE_CUR_PSL_START_BA                     23:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PSL_START_SSLA_COUNT             7:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PSL_START_SSLA_BASE              23:8 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PSL_START_PS_7_0                 31:24 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PSH_SAMPLE                       0x00000024 /* -W-4R */
#define NV_PAVS_VOICE_CUR_PSH_SAMPLE_LBO                   23:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PSH_SAMPLE_CSI                   7:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PSH_SAMPLE_CSSL                  23:8 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PSH_SAMPLE_PS_15_8               31:24 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLA                             0x00000028 /* -W-4R */
#define NV_PAVS_VOICE_CUR_VOLA_VOLUME6_B3_0                3:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLA_VOLUME0                     15:4 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLA_VOLUME7_B3_0                19:16 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLA_VOLUME1                     31:20 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLB                             0x0000002C /* -W-4R */
#define NV_PAVS_VOICE_CUR_VOLB_VOLUME6_B7_4                3:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLB_VOLUME2                     15:4 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLB_VOLUME7_B7_4                19:16 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLB_VOLUME3                     31:20 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLC                             0x00000030 /* -W-4R */
#define NV_PAVS_VOICE_CUR_VOLC_VOLUME6_B11_8               3:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLC_VOLUME4                     15:4 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLC_VOLUME7_B11_8               19:16 /* -W-UF */
#define NV_PAVS_VOICE_CUR_VOLC_VOLUME5                     31:20 /* -W-UF */
#define NV_PAVS_VOICE_CUR_ECNT                             0x00000034 /* -W-4R */
#define NV_PAVS_VOICE_CUR_ECNT_EACOUNT                     15:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_ECNT_EFCOUNT                     31:16 /* -W-UF */
#define NV_PAVS_VOICE_CUR_PRD                              0x00000038 /* -W-4R */
#define NV_PAVS_VOICE_CUR_PRD_ADDRESS                      31:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FCA                              0x0000003C /* -W-4R */
#define NV_PAVS_VOICE_CUR_FCA_FC0                          15:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FCA_FC1                          31:16 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FCB                              0x00000040 /* -W-4R */
#define NV_PAVS_VOICE_CUR_FCB_FC2                          15:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FCB_FC3                          31:16 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FSA                              0x00000044 /* -W-4R */
#define NV_PAVS_VOICE_CUR_FSA_FS0                          23:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FSA_FS3_B7_0                     31:24 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FSB                              0x00000048 /* -W-4R */
#define NV_PAVS_VOICE_CUR_FSB_FS1                          23:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FSB_FS3_B15_8                    31:24 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FSC                              0x0000004C /* -W-4R */
#define NV_PAVS_VOICE_CUR_FSC_FS2                          23:0 /* -W-UF */
#define NV_PAVS_VOICE_CUR_FSC_FS3_B23_16                   31:24 /* -W-UF */
#define NV_PAVS_VOICE_PAR_LFO                              0x00000050 /* -W-4R */
#define NV_PAVS_VOICE_PAR_LFO_LFOALVL                      14:0 /* -W-UF */
#define NV_PAVS_VOICE_PAR_LFO_LFOADR                       15:15 /* -W-UF */
#define NV_PAVS_VOICE_PAR_LFO_LFOFLVL                      30:16 /* -W-UF */
#define NV_PAVS_VOICE_PAR_LFO_LFOFDR                       31:31 /* -W-UF */
#define NV_PAVS_VOICE_PAR_STATE                            0x00000054 /* -W-4R */
#define NV_PAVS_VOICE_PAR_STATE_FRACTION                   15:0 /* -W-UF */
#define NV_PAVS_VOICE_PAR_STATE_LFOA_DELAYMODE             16:16 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_LFOA_DELAYMODE_NORMAL      0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_LFOA_DELAYMODE_DELAY       0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_LFOF_DELAYMODE             17:17 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_LFOF_DELAYMODE_NORMAL      0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_LFOF_DELAYMODE_DELAY       0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_PAUSED                     18:18 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_PAUSED_NO                  0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_PAUSED_YES                 0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_SSL_INDICATOR              19:19 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_SSL_INDICATOR_A            0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_SSL_INDICATOR_B            0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_NEW_VOICE                  20:20 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_NEW_VOICE_NO               0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_NEW_VOICE_YES              0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_ACTIVE_VOICE               21:21 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_ACTIVE_VOICE_NO            0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_ACTIVE_VOICE_YES           0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_VOICE_START                22:22 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_VOICE_START_LOOPED         0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_VOICE_START_FIRSTPASS      0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_PRD_VALID                  23:23 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_PRD_VALID_NO               0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_PRD_VALID_YES              0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR                      27:24 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR_OFF                  0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR_DELAY                0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR_ATTACK               0x02 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR_HOLD                 0x03 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR_DECAY                0x04 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR_SUSTAIN              0x05 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR_RELEASE              0x06 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EFCUR_FORCE_RELEASE        0x07 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EACUR                      31:28 /* -W-VF */
#define NV_PAVS_VOICE_PAR_STATE_EACUR_OFF                  0x00 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EACUR_DELAY                0x01 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EACUR_ATTACK               0x02 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EACUR_HOLD                 0x03 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EACUR_DECAY                0x04 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EACUR_SUSTAIN              0x05 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EACUR_RELEASE              0x06 /* -W--V */
#define NV_PAVS_VOICE_PAR_STATE_EACUR_FORCE_RELEASE        0x07 /* -W--V */
#define NV_PAVS_VOICE_PAR_OFFSET                           0x00000058 /* -W-4R */
#define NV_PAVS_VOICE_PAR_OFFSET_CBO                       23:0 /* -W-UF */
#define NV_PAVS_VOICE_PAR_OFFSET_CSO                       23:0 /* -W-UF */
#define NV_PAVS_VOICE_PAR_OFFSET_EALVL                     31:24 /* -W-UF */
#define NV_PAVS_VOICE_PAR_NEXT                             0x0000005C /* -W-4R */
#define NV_PAVS_VOICE_PAR_NEXT_SSLB_COUNT                  7:0 /* -W-UF */
#define NV_PAVS_VOICE_PAR_NEXT_SSLB_BASE                   23:8 /* -W-UF */
#define NV_PAVS_VOICE_PAR_NEXT_EBO                         23:0 /* -W-UF */
#define NV_PAVS_VOICE_PAR_NEXT_EFLVL                       31:24 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLA                             0x00000060 /* -W-4R */
#define NV_PAVS_VOICE_TAR_VOLA_VOLUME6_B3_0                3:0 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLA_VOLUME0                     15:4 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLA_VOLUME7_B3_0                19:16 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLA_VOLUME1                     31:20 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLB                             0x00000064 /* -W-4R */
#define NV_PAVS_VOICE_TAR_VOLB_VOLUME6_B7_4                3:0 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLB_VOLUME2                     15:4 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLB_VOLUME7_B7_4                19:16 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLB_VOLUME3                     31:20 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLC                             0x00000068 /* -W-4R */
#define NV_PAVS_VOICE_TAR_VOLC_VOLUME6_B11_8               3:0 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLC_VOLUME4                     15:4 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLC_VOLUME7_B11_8               19:16 /* -W-UF */
#define NV_PAVS_VOICE_TAR_VOLC_VOLUME5                     31:20 /* -W-UF */
#define NV_PAVS_VOICE_TAR_LFO_ENV                          0x0000006C /* -W-4R */
#define NV_PAVS_VOICE_TAR_LFO_ENV_EA_RELEASERATE           11:0 /* -W-UF */
#define NV_PAVS_VOICE_TAR_LFO_ENV_LFOADLT                  21:12 /* -W-UF */
#define NV_PAVS_VOICE_TAR_LFO_ENV_LFOFDLT                  31:22 /* -W-UF */
#define NV_PAVS_VOICE_TAR_LFO_MOD                          0x00000070 /* -W-4R */
#define NV_PAVS_VOICE_TAR_LFO_MOD_LFOAAM                   7:0 /* -W-UF */
#define NV_PAVS_VOICE_TAR_LFO_MOD_LFOAFM                   15:8 /* -W-UF */
#define NV_PAVS_VOICE_TAR_LFO_MOD_LFOAFC                   23:16 /* -W-UF */
#define NV_PAVS_VOICE_TAR_LFO_MOD_LFOFFM                   31:24 /* -W-UF */
#define NV_PAVS_VOICE_TAR_FCA                              0x00000074 /* -W-4R */
#define NV_PAVS_VOICE_TAR_FCA_FC0                          15:0 /* -W-UF */
#define NV_PAVS_VOICE_TAR_FCA_FC1                          31:16 /* -W-UF */
#define NV_PAVS_VOICE_TAR_FCB                              0x00000078 /* -W-4R */
#define NV_PAVS_VOICE_TAR_FCB_FC2                          15:0 /* -W-UF */
#define NV_PAVS_VOICE_TAR_FCB_FC3                          31:16 /* -W-UF */
#define NV_PAVS_VOICE_TAR_PITCH_LINK                       0x0000007c /* -W-4R */
#define NV_PAVS_VOICE_TAR_PITCH_LINK_NEXT_VOICE_HANDLE     15:0 /* -W-UF */
#define NV_PAVS_VOICE_TAR_PITCH_LINK_PITCH                 31:16 /* -W-UF */
#define NV_PAHRTFC                                         0x0000035F:0x00000300 /* RW--D */
#define NV_PAHRTFC_SIZE                                    0x00000080 /* RW--V */
#define NV_PAHRTFC_SIZE_LG2                                0x7 /* RW--V */
#define NV_PAHRTFC_HRIR12A(i)                              (0x00000300+(i)*12) /* -W-4A */
#define NV_PAHRTFC_HRIR12A__SIZE_1                         7 /* */ 
#define NV_PAHRTFC_HRIR12A_LEFT0                           11:0 /* -W-UF */
#define NV_PAHRTFC_HRIR12A_RIGHT0                          23:12 /* -W-UF */
#define NV_PAHRTFC_HRIR12A_LEFT1_B7_0                      31:24 /* -W-UF */
#define NV_PAHRTFC_HRIR12B(i)                              (0x00000304+(i)*12) /* -W-4A */
#define NV_PAHRTFC_HRIR12B__SIZE_1                         7 /* */ 
#define NV_PAHRTFC_HRIR12B_LEFT2                           11:0 /* -W-UF */
#define NV_PAHRTFC_HRIR12B_RIGHT2                          23:12 /* -W-UF */
#define NV_PAHRTFC_HRIR12B_RIGHT1_B11_8                    27:24 /* -W-UF */
#define NV_PAHRTFC_HRIR12B_LEFT1_B11_8                     31:28 /* -W-UF */
#define NV_PAHRTFC_HRIR12C(i)                              (0x00000308+(i)*12) /* -W-4A */
#define NV_PAHRTFC_HRIR12C__SIZE_1                         7 /* */ 
#define NV_PAHRTFC_HRIR12C_LEFT3                           11:0 /* -W-UF */
#define NV_PAHRTFC_HRIR12C_RIGHT3                          23:12 /* -W-UF */
#define NV_PAHRTFC_HRIR12C_RIGHT1_B7_0                     31:24 /* -W-UF */
#define NV_PAHRTFC_HRIR12D                                 0x00000354 /* -W-4R */
#define NV_PAHRTFC_HRIR12D_LEFT28                          11:0 /* -W-UF */
#define NV_PAHRTFC_HRIR12D_RIGHT28                         23:12 /* -W-UF */
#define NV_PAHRTFC_HRIR12D_LEFT29_B7_0                     31:24 /* -W-UF */
#define NV_PAHRTFC_HRIR12E                                 0x00000358 /* -W-4R */
#define NV_PAHRTFC_HRIR12E_LEFT30                          11:0 /* -W-UF */
#define NV_PAHRTFC_HRIR12E_RIGHT30                         23:12 /* -W-UF */
#define NV_PAHRTFC_HRIR12E_RIGHT29_B11_8                   27:24 /* -W-UF */
#define NV_PAHRTFC_HRIR12E_LEFT29_B11_8                    31:28 /* -W-UF */
#define NV_PAHRTFC_HRIR12X                                 0x0000035C /* -W-4R */
#define NV_PAHRTFC_HRIR12X_ITD                             15:0 /* -W-UF */
#define NV_PAHRTFC_HRIR12X_RIGHT29_B7_0                    31:24 /* -W-UF */
#define NV_PAHRTFT                                         0x000003AF:0x00000380 /* RW--D */
#define NV_PAHRTFT_SIZE                                    0x00000040 /* RW--V */
#define NV_PAHRTFT_SIZE_LG2                                0x6 /* RW--V */
#define NV_PAHRTFT_HRIR8A(i)                               (0x00000380+(i)*4) /* -W-4A */
#define NV_PAHRTFT_HRIR8A__SIZE_1                          15 /* */ 
#define NV_PAHRTFT_HRIR8A_LEFT0                            7:0 /* -W-UF */
#define NV_PAHRTFT_HRIR8A_RIGHT0                           15:8 /* -W-UF */
#define NV_PAHRTFT_HRIR8A_LEFT1                            23:16 /* -W-UF */
#define NV_PAHRTFT_HRIR8A_RIGHT1                           31:24 /* -W-UF */
#define NV_PAHRTFT_HRIR8X                                  0x000003BC /* -W-4R */
#define NV_PAHRTFT_HRIR8X_LEFT30                           7:0 /* -W-UF */
#define NV_PAHRTFT_HRIR8X_RIGHT30                          15:8 /* -W-UF */
#define NV_PAHRTFT_HRIR8X_ITD                              31:16 /* -W-UF */
#define NV_PSSL                                            0x00001FFF:0x00001000 /* RW--D */
#define NV_PSSL_SIZE                                       0x00001000 /* RW--V */
#define NV_PSSL_SIZE_LG2                                   0xc /* RW--V */
#define NV_PSSL_PRD_ADDRESS(i)                             (0x00001000+(i)*8) /* -W-4A */
#define NV_PSSL_PRD_ADDRESS__SIZE_1                        512 /* */ 
#define NV_PSSL_PRD_ADDRESS_PARAMETER                      31:0 /* -W-UF */
#define NV_PSSL_PRD_CONTROL(i)                             (0x00001004+(i)*8) /* -W-4A */
#define NV_PSSL_PRD_CONTROL__SIZE_1                        512 /* */ 
#define NV_PSSL_PRD_CONTROL_LENGTH                         15:0 /* -W-UF */
#define NV_PSSL_PRD_CONTROL_CONTAINER_SIZE                 17:16 /* -W-VF */
#define NV_PSSL_PRD_CONTROL_CONTAINER_SIZE_B8              0x00 /* -W--V */
#define NV_PSSL_PRD_CONTROL_CONTAINER_SIZE_B16             0x01 /* -W--V */
#define NV_PSSL_PRD_CONTROL_CONTAINER_SIZE_B32             0x03 /* -W--V */
#define NV_PSSL_PRD_CONTROL_SAMPLES_PER_BLOCK              22:18 /* -W-UF */
#define NV_PSSL_PRD_CONTROL_STEREO                         23:23 /* -W-VF */
#define NV_PSSL_PRD_CONTROL_STEREO_NOTOK                   0x00 /* -W--V */
#define NV_PSSL_PRD_CONTROL_STEREO_OK                      0x01 /* -W--V */
#define NV_PSSL_PRD_CONTROL_OWN                            24:24 /* -W-VF */
#define NV_PSSL_PRD_CONTROL_OWN_HW                         0x00 /* -W--V */
#define NV_PSSL_PRD_CONTROL_OWN_NOT_HW                     0x01 /* -W--V */
#define NV_PSSL_PRD_CONTROL_IOC                            31:31 /* -W-VF */
#define NV_PSSL_PRD_CONTROL_IOC_DISABLE                    0x00 /* -W--V */
#define NV_PSSL_PRD_CONTROL_IOC_ENABLE                     0x01 /* -W--V */
#define NV_PSGE_SIZE                                       0x00000008 /* RW--V */
#define NV_PSGE_SIZE_LG2                                   0x3 /* RW--V */
#define NV_PAPU_BITS                                       18:0 /* RW--F */
#define NV_PAPU_W                                          19 /* RW--V */
#define NV_PAPU_SAVED_BITS                                 18:2 /* RW--F */
#define NV_PAPU_SAVED_W                                    17 /* RW--V */
#define NV_PAPU_SUBSPACE_BITS                              18:16 /* RW--F */
#define NV_PAPU_SUBSPACE_PRIV                              0x00000000 /* RW--V */
#define NV_PAPU_SUBSPACE_NV1BA0                            0x00000002 /* RW--V */
#define NV_PAPU_SUBSPACE_GP                                0x00000003 /* RW--V */
#define NV_PAPU_SUBSPACE_NV1BXX                            0x00000004 /* RW--V */
#define NV_PAPU_SUBSPACE_EP                                0x00000005 /* RW--V */
#define NV_PAPU_PRIV_BITS                                  15:0 /* RW--F */
#define NV_PAPU_PRIV_SAVED_BITS                            15:2 /* RW--F */
#define NV_PAPU_PRIV_SAVED_W                               14 /* RW--V */
#define NV_PAPU_PRIV_SUBUNIT_BITS                          15:12 /* RW--F */
#define NV_PAPU_PRIV_SUBUNIT_CFG                           0x00000000 /* RW--V */
#define NV_PAPU_PRIV_SUBUNIT_FE                            0x00000001 /* RW--V */
#define NV_PAPU_PRIV_SUBUNIT_SE                            0x00000002 /* RW--V */
#define NV_PAPU_PRIV_SUBUNIT_SE_GP                         0x00000003 /* RW--V */
#define NV_PAPU_PRIV_SUBUNIT_SE_EP                         0x00000004 /* RW--V */
#define NV_PAPU_NV1BA0_BITS                                15:0 /* RW--F */
#define NV_PAPU                                            0x0007FFFF:0x00000000 /* RW--D */
#define NV_PAPU_PRIV                                       0x0000FFFF:0x00000000 /* RW--M */
#define NV_PAPU_NV1BA0                                     0x0002FFFF:0x00020000 /* RW--C */
#define NV_PAPU_GP                                         0x0003FFFF:0x00030000 /* RW--M */
#define NV_PAPU_NV1BXX                                     0x0004FFFF:0x00040000 /* RW--C */
#define NV_PAPU_EP                                         0x0005FFFF:0x00050000 /* RW--M */
#define NV_PAPU_ISTS                                       0x00001000 /* RW-4R */
#define NV_PAPU_ISTS_GINTSTS                               0:0 /* R--VF */
#define NV_PAPU_ISTS_GINTSTS_NO_INTR                       0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_GINTSTS_INTR                          0x00000001 /* R---V */
#define NV_PAPU_ISTS_DWINTSTS                              1:1 /* RW-VF */
#define NV_PAPU_ISTS_DWINTSTS_NO_INTR                      0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_DWINTSTS_INTR                         0x00000001 /* R---V */
#define NV_PAPU_ISTS_DWINTSTS_CLR                          0x00000001 /* -W--C */
#define NV_PAPU_ISTS_RTWSTS                                2:2 /* R--VF */
#define NV_PAPU_ISTS_RTWSTS_NO_INTR                        0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_RTWSTS_INTR                           0x00000001 /* R---V */
#define NV_PAPU_ISTS_DPINTSTS                              3:3 /* RW-VF */
#define NV_PAPU_ISTS_DPINTSTS_NO_INTR                      0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_DPINTSTS_INTR                         0x00000001 /* R---V */
#define NV_PAPU_ISTS_DPINTSTS_CLR                          0x00000001 /* -W--C */
#define NV_PAPU_ISTS_FETINTSTS                             4:4 /* RW-VF */
#define NV_PAPU_ISTS_FETINTSTS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_FETINTSTS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_ISTS_FETINTSTS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_ISTS_FENINTSTS                             5:5 /* RW-VF */
#define NV_PAPU_ISTS_FENINTSTS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_FENINTSTS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_ISTS_FENINTSTS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_ISTS_FEVINTSTS                             6:6 /* RW-VF */
#define NV_PAPU_ISTS_FEVINTSTS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_FEVINTSTS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_ISTS_FEVINTSTS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_ISTS_FEOINTSTS                             7:7 /* RW-VF */
#define NV_PAPU_ISTS_FEOINTSTS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_FEOINTSTS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_ISTS_FEOINTSTS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_ISTS_GPMINTSTS                             8:8 /* RW-VF */
#define NV_PAPU_ISTS_GPMINTSTS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_GPMINTSTS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_ISTS_GPMINTSTS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_ISTS_GPNINTSTS                             9:9 /* RW-VF */
#define NV_PAPU_ISTS_GPNINTSTS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_GPNINTSTS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_ISTS_GPNINTSTS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_ISTS_EPMINTSTS                             10:10 /* RW-VF */
#define NV_PAPU_ISTS_EPMINTSTS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_EPMINTSTS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_ISTS_EPMINTSTS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_ISTS_EPNINTSTS                             11:11 /* RW-VF */
#define NV_PAPU_ISTS_EPNINTSTS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_ISTS_EPNINTSTS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_ISTS_EPNINTSTS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_ISTS_BITS                                  11:0 /* RW-VF */
#define NV_PAPU_ISTS_MOD_BITS                              11:1 /* RW-VF */
#define NV_PAPU_ISTS_MOD_UPPER_BITS                        11:3 /* RW-VF */
#define NV_PAPU_ISTS_MOD_LOWER_BITS                        1:1 /* RW-VF */
#define NV_PAPU_IEN                                        0x00001004 /* RW-4R */
#define NV_PAPU_IEN_GINTEN                                 0:0 /* R--VF */
#define NV_PAPU_IEN_GINTEN_DISABLED                        0x00000000 /* RWI-V */
#define NV_PAPU_IEN_GINTEN_ENABLED                         0x00000001 /* RW--V */
#define NV_PAPU_IEN_DWINTEN                                1:1 /* RW-VF */
#define NV_PAPU_IEN_DWINTEN_DISABLED                       0x00000000 /* RWI-V */
#define NV_PAPU_IEN_DWINTEN_ENABLED                        0x00000001 /* RW--V */
#define NV_PAPU_IEN_DPINTEN                                3:3 /* RW-VF */
#define NV_PAPU_IEN_DPINTEN_DISABLED                       0x00000000 /* RWI-V */
#define NV_PAPU_IEN_DPINTEN_ENABLED                        0x00000001 /* RW--V */
#define NV_PAPU_IEN_FETINTEN                               4:4 /* RW-VF */
#define NV_PAPU_IEN_FETINTEN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_IEN_FETINTEN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_IEN_FENINTEN                               5:5 /* RW-VF */
#define NV_PAPU_IEN_FENINTEN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_IEN_FENINTEN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_IEN_FEVINTEN                               6:6 /* RW-VF */
#define NV_PAPU_IEN_FEVINTEN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_IEN_FEVINTEN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_IEN_FEOINTEN                               7:7 /* RW-VF */
#define NV_PAPU_IEN_FEOINTEN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_IEN_FEOINTEN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_IEN_GPMINTEN                               8:8 /* RW-VF */
#define NV_PAPU_IEN_GPMINTEN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_IEN_GPMINTEN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_IEN_GPNINTEN                               9:9 /* RW-VF */
#define NV_PAPU_IEN_GPNINTEN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_IEN_GPNINTEN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_IEN_EPMINTEN                               10:10 /* RW-VF */
#define NV_PAPU_IEN_EPMINTEN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_IEN_EPMINTEN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_IEN_EPNINTEN                               11:11 /* RW-VF */
#define NV_PAPU_IEN_EPNINTEN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_IEN_EPNINTEN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_IEN_BITS                                   11:0 /* RW-VF */
#define NV_PAPU_IEN_SETTABLE_MASK                          0x00000ffb /* RW--V */
#define NV_PAPU_ISET                                       0x00001008 /* -W-4R */
#define NV_PAPU_ISET_DWINTSET                              1:1 /* -W-VF */
#define NV_PAPU_ISET_DWINTSET_NO_INTR                      0x00000000 /* -W--V */
#define NV_PAPU_ISET_DWINTSET_INTR                         0x00000001 /* -W--V */
#define NV_PAPU_ISET_DPINTSET                              3:3 /* -W-VF */
#define NV_PAPU_ISET_DPINTSET_NO_INTR                      0x00000000 /* -W--V */
#define NV_PAPU_ISET_DPINTSET_INTR                         0x00000001 /* -W--V */
#define NV_PAPU_ISET_FETINTSET                             4:4 /* -W-VF */
#define NV_PAPU_ISET_FETINTSET_NO_INTR                     0x00000000 /* -W--V */
#define NV_PAPU_ISET_FETINTSET_INTR                        0x00000001 /* -W--V */
#define NV_PAPU_ISET_FENINTSET                             5:5 /* -W-VF */
#define NV_PAPU_ISET_FENINTSET_NO_INTR                     0x00000000 /* -W--V */
#define NV_PAPU_ISET_FENINTSET_INTR                        0x00000001 /* -W--V */
#define NV_PAPU_ISET_FEVINTSET                             6:6 /* -W-VF */
#define NV_PAPU_ISET_FEVINTSET_NO_INTR                     0x00000000 /* -W--V */
#define NV_PAPU_ISET_FEVINTSET_INTR                        0x00000001 /* -W--V */
#define NV_PAPU_ISET_FEOINTSET                             7:7 /* -W-VF */
#define NV_PAPU_ISET_FEOINTSET_NO_INTR                     0x00000000 /* -W--V */
#define NV_PAPU_ISET_FEOINTSET_INTR                        0x00000001 /* -W--V */
#define NV_PAPU_ISET_GPMINTSET                             8:8 /* -W-VF */
#define NV_PAPU_ISET_GPMINTSET_NO_INTR                     0x00000000 /* -W--V */
#define NV_PAPU_ISET_GPMINTSET_INTR                        0x00000001 /* -W--V */
#define NV_PAPU_ISET_GPNINTSET                             9:9 /* -W-VF */
#define NV_PAPU_ISET_GPNINTSET_NO_INTR                     0x00000000 /* -W--V */
#define NV_PAPU_ISET_GPNINTSET_INTR                        0x00000001 /* -W--V */
#define NV_PAPU_ISET_EPMINTSET                             10:10 /* -W-VF */
#define NV_PAPU_ISET_EPMINTSET_NO_INTR                     0x00000000 /* -W--V */
#define NV_PAPU_ISET_EPMINTSET_INTR                        0x00000001 /* -W--V */
#define NV_PAPU_ISET_EPNINTSET                             11:11 /* -W-VF */
#define NV_PAPU_ISET_EPNINTSET_NO_INTR                     0x00000000 /* -W--V */
#define NV_PAPU_ISET_EPNINTSET_INTR                        0x00000001 /* -W--V */
#define NV_PAPU_ISET_BITS                                  11:1 /* RW-VF */
#define NV_PAPU_PRIV_FEMAJ_BITS                            11:8 /* RW--F */
#define NV_PAPU_PRIV_FEMAJ_INTR                            0x00000000 /* RW--V */
#define NV_PAPU_PRIV_FEMAJ_METH                            0x00000001 /* RW--V */
#define NV_PAPU_PRIV_FEMAJ_PERF                            0x00000002 /* RW--V */
#define NV_PAPU_PRIV_FEMAJ_INTERNAL                        0x00000003 /* RW--V */
#define NV_PAPU_PRIV_FEMAJ_UMETHFIFO                       0x00000004 /* RW--V */
#define NV_PAPU_PRIV_FEMIN_BITS                            7:0 /* RW--F */
#define NV_PAPU_FECTL                                      0x00001100 /* RW-4R */
#define NV_PAPU_FECTL_FENTYP                               0:0 /* RW-VF */
#define NV_PAPU_FECTL_FENTYP_NON_ISO                       0x00000000 /* RWI-V */
#define NV_PAPU_FECTL_FENTYP_ISO                           0x00000001 /* RW--V */
#define NV_PAPU_FECTL_FEMRTYP                              1:1 /* RW-VF */
#define NV_PAPU_FECTL_FEMRTYP_NON_ISO                      0x00000000 /* RWI-V */
#define NV_PAPU_FECTL_FEMRTYP_ISO                          0x00000001 /* RW--V */
#define NV_PAPU_FECTL_FEMWTYP                              2:2 /* RW-VF */
#define NV_PAPU_FECTL_FEMWTYP_NON_ISO                      0x00000000 /* RWI-V */
#define NV_PAPU_FECTL_FEMWTYP_ISO                          0x00000001 /* RW--V */
#define NV_PAPU_FECTL_FENINT                               3:3 /* RW-VF */
#define NV_PAPU_FECTL_FENINT_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_FECTL_FENINT_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_FECTL_FEPRIVLOCK                           4:4 /* RW-VF */
#define NV_PAPU_FECTL_FEPRIVLOCK_UNLOCKED                  0x00000000 /* RWI-V */
#define NV_PAPU_FECTL_FEPRIVLOCK_LOCKED                    0x00000001 /* RW--V */
#define NV_PAPU_FECTL_FEMETHMODE                           7:5 /* RW-VF */
#define NV_PAPU_FECTL_FEMETHMODE_FREE_RUNNING              0x00000000 /* RWI-V */
#define NV_PAPU_FECTL_FEMETHMODE_HALTED                    0x00000004 /* RW--V */
#define NV_PAPU_FECTL_FEMETHMODE_TRAPPED                   0x00000007 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON                         11:8 /* RW-VF */
#define NV_PAPU_FECTL_FETRAPREASON_NONE                    0x00000000 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_NOT_IMPLEMENTED         0x00000001 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_METHOD_UNKNOWN          0x00000002 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_BAD_ARGUMENT            0x00000003 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_CURRENT_NOT_SET         0x00000004 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_ANTECEDENT_NOT_SET      0x00000005 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_VOICE_ACTIVE            0x00000006 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_NOT_DATA_TYPE_BUFFER    0x00000007 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_BAD_LIST_POINTER        0x00000008 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_CURRENT_VOICE_NOT_3D    0x00000009 /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_CTXPA_INVALID           0x0000000a /* RW--V */
#define NV_PAPU_FECTL_FETRAPREASON_REQUESTED               0x0000000f /* RW--V */
#define NV_PAPU_FECTL_FEPIOCLASS                           12:12 /* RW-VF */
#define NV_PAPU_FECTL_FEPIOCLASS_NON_ISO                   0x00000000 /* RWI-V */
#define NV_PAPU_FECTL_FEPIOCLASS_ISO                       0x00000001 /* RW--V */
#define NV_PAPU_FECTL_FEMETH_PRIVLOCK                      13:13 /* RW-VF */
#define NV_PAPU_FECTL_FEMETH_PRIVLOCK_NOT_DISABLED         0x00000000 /* RWI-V */
#define NV_PAPU_FECTL_FEMETH_PRIVLOCK_DISABLED             0x00000001 /* RW--V */
#define NV_PAPU_FECTL_FEMETHORIGIN                         14:14 /* R--VF */
#define NV_PAPU_FECTL_FEMETHORIGIN_USER                    0x00000000 /* R---V */
#define NV_PAPU_FECTL_FEMETHORIGIN_INTERNAL                0x00000001 /* R---V */
#define NV_PAPU_FECTL_FESESSLCTXPA_VALID                   15:15 /* R---V */
#define NV_PAPU_FECTL_FESESSLCTXPA_VALID_NO                0x00000000 /* R-I-V */
#define NV_PAPU_FECTL_FESESSLCTXPA_VALID_YES               0x00000001 /* R---V */
#define NV_PAPU_FECTL_FESESGECTXPA_VALID                   16:16 /* R---V */
#define NV_PAPU_FECTL_FESESGECTXPA_VALID_NO                0x00000000 /* R-I-V */
#define NV_PAPU_FECTL_FESESGECTXPA_VALID_YES               0x00000001 /* R---V */
#define NV_PAPU_FECTL_FEGPSGECTXPA_VALID                   17:17 /* R---V */
#define NV_PAPU_FECTL_FEGPSGECTXPA_VALID_NO                0x00000000 /* R-I-V */
#define NV_PAPU_FECTL_FEGPSGECTXPA_VALID_YES               0x00000001 /* R---V */
#define NV_PAPU_FECTL_BITS                                 17:0 /* RW-VF */
#define NV_PAPU_FECTL_WR_BITS                              13:0 /* RW-VF */
#define NV_PAPU_FEMAXV                                     0x00001104 /* RW-4R */
#define NV_PAPU_FEMAXV_VALUE                               15:0 /* RWXUF */
#define NV_PAPU_FEMAXV_INIT                                0x00000000 /* RWI-V */
#define NV_PAPU_FEMAXV_BITS                                15:0 /* RW-VF */
#define NV_PAPU_FEMAXTV                                    0x00001108 /* RW-4R */
#define NV_PAPU_FEMAXTV_VALUE                              15:0 /* RWXUF */
#define NV_PAPU_FEMAXTV_INIT                               0x00000000 /* RWI-V */
#define NV_PAPU_FEMAXTV_BITS                               15:0 /* RW-VF */
#define NV_PAPU_FEAMAXV                                    0x0000110c /* R--4R */
#define NV_PAPU_FEAMAXV_VALUE                              15:0 /* R-XUF */
#define NV_PAPU_FEAMAXV_UNLIMITED                          0x0000ffff /* R---V */
#define NV_PAPU_FEAMAXV_BITS                               15:0 /* R--VF */
#define NV_PAPU_FECV                                       0x00001110 /* RW-4R */
#define NV_PAPU_FECV_VALUE                                 15:0 /* RWXUF */
#define NV_PAPU_FECV_VALUE_NULL                            0x0000ffff /* RWI-V */
#define NV_PAPU_FECV_BITS                                  15:0 /* RW-VF */
#define NV_PAPU_FECVDT                                     0x00001114 /* RW-4R */
#define NV_PAPU_FECVDT_DATA_TYPE                           1:0 /* RWXUF */
#define NV_PAPU_FECVDT_DATA_TYPE_BUFFER                    0x00000000 /* RW--V */
#define NV_PAPU_FECVDT_DATA_TYPE_STREAM                    0x00000001 /* RW--V */
#define NV_PAPU_FECVDT_DATA_TYPE_UNCACHED                  0x00000002 /* RWI-V */
#define NV_PAPU_FECVDT_CONTAINER_SIZE                      3:2 /* RWXUF */
#define NV_PAPU_FECVDT_CONTAINER_SIZE_B8                   0x00000000 /* RWI-V */
#define NV_PAPU_FECVDT_CONTAINER_SIZE_B16                  0x00000001 /* RW--V */
#define NV_PAPU_FECVDT_CONTAINER_SIZE_B32                  0x00000003 /* RW--V */
#define NV_PAPU_FECVDT_BITS                                3:0 /* RW-VF */
#define NV_PAPU_FEAV                                       0x00001118 /* RW-4R */
#define NV_PAPU_FEAV_VALUE                                 15:0 /* RWXUF */
#define NV_PAPU_FEAV_VALUE_NULL                            0x0000ffff /* RWI-V */
#define NV_PAPU_FEAV_LST                                   17:16 /* RWXUF */
#define NV_PAPU_FEAV_LST_INHERIT                           0x00000000 /* RWI-V */
#define NV_PAPU_FEAV_LST_2D_TOP                            0x00000001 /* RW--V */
#define NV_PAPU_FEAV_LST_3D_TOP                            0x00000002 /* RW--V */
#define NV_PAPU_FEAV_LST_MP_TOP                            0x00000003 /* RW--V */
#define NV_PAPU_FEAV_BITS                                  17:0 /* RW-VF */
#define NV_PAPU_FEMAXHT                                    0x0000111c /* RW-4R */
#define NV_PAPU_FEMAXHT_VALUE                              15:0 /* RWXUF */
#define NV_PAPU_FEMAXHT_INIT                               0x00000000 /* RWI-V */
#define NV_PAPU_FEMAXHT_BITS                               15:0 /* RW-VF */
#define NV_PAPU_FECHT                                      0x00001120 /* RW-4R */
#define NV_PAPU_FECHT_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_FECHT_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_FECHT_BITS                                 15:0 /* RW-VF */
#define NV_PAPU_FEMAXSESSL                                 0x00001124 /* RW-4R */
#define NV_PAPU_FEMAXSESSL_VALUE                           15:0 /* RWXUF */
#define NV_PAPU_FEMAXSESSL_INIT                            0x00000000 /* RWI-V */
#define NV_PAPU_FEMAXSESSL_BITS                            15:0 /* RW-VF */
#define NV_PAPU_FECSESSL                                   0x00001128 /* RW-4R */
#define NV_PAPU_FECSESSL_VALUE                             15:0 /* RWXUF */
#define NV_PAPU_FECSESSL_VALUE_NULL                        0x0000ffff /* RWI-V */
#define NV_PAPU_FECSESSL_BITS                              15:0 /* RW-VF */
#define NV_PAPU_FESESSLCTXPA                               0x0000112c /* RW-4R */
#define NV_PAPU_FESESSLCTXPA_VALUE                         31:12 /* RWXUF */
#define NV_PAPU_FESESSLCTXPA_BITS                          31:0 /* RW-VF */
#define NV_PAPU_FESESSLMAXOFF                              0x00001130 /* RW-4R */
#define NV_PAPU_FESESSLMAXOFF_VALUE                        31:12 /* RWXUF */
#define NV_PAPU_FESESSLMAXOFF_BITS                         31:0 /* RW-VF */
#define NV_PAPU_FESESSLPENDOFF                             0x00001134 /* RW-4R */
#define NV_PAPU_FESESSLPENDOFF_VALID                       0:0 /* RWXUF */
#define NV_PAPU_FESESSLPENDOFF_VALID_NO                    0x00000000 /* RWI-V */
#define NV_PAPU_FESESSLPENDOFF_VALID_YES                   0x00000001 /* RW--V */
#define NV_PAPU_FESESSLPENDOFF_OFFSET                      31:12 /* RWXUF */
#define NV_PAPU_FESESSLPENDOFF_BITS                        31:0 /* RW-VF */
#define NV_PAPU_FEMAXSESGE                                 0x00001138 /* RW-4R */
#define NV_PAPU_FEMAXSESGE_VALUE                           15:0 /* RWXUF */
#define NV_PAPU_FEMAXSESGE_INIT                            0x00000000 /* RWI-V */
#define NV_PAPU_FEMAXSESGE_BITS                            15:0 /* RW-VF */
#define NV_PAPU_FECSESGE                                   0x0000113c /* RW-4R */
#define NV_PAPU_FECSESGE_VALUE                             15:0 /* RWXUF */
#define NV_PAPU_FECSESGE_VALUE_NULL                        0x0000ffff /* RWI-V */
#define NV_PAPU_FECSESGE_BITS                              15:0 /* RW-VF */
#define NV_PAPU_FESESGECTXPA                               0x00001140 /* RW-4R */
#define NV_PAPU_FESESGECTXPA_VALUE                         31:12 /* RWXUF */
#define NV_PAPU_FESESGECTXPA_BITS                          31:0 /* RW-VF */
#define NV_PAPU_FESESGEMAXOFF                              0x00001144 /* RW-4R */
#define NV_PAPU_FESESGEMAXOFF_VALUE                        31:12 /* RWXUF */
#define NV_PAPU_FESESGEMAXOFF_BITS                         31:0 /* RW-VF */
#define NV_PAPU_FEMAXGPSGE                                 0x00001148 /* RW-4R */
#define NV_PAPU_FEMAXGPSGE_VALUE                           15:0 /* RWXUF */
#define NV_PAPU_FEMAXGPSGE_INIT                            0x00000000 /* RWI-V */
#define NV_PAPU_FEMAXGPSGE_BITS                            15:0 /* RW-VF */
#define NV_PAPU_FECGPSGE                                   0x0000114c /* RW-4R */
#define NV_PAPU_FECGPSGE_VALUE                             15:0 /* RWXUF */
#define NV_PAPU_FECGPSGE_VALUE_NULL                        0x0000ffff /* RWI-V */
#define NV_PAPU_FECGPSGE_BITS                              15:0 /* RW-VF */
#define NV_PAPU_FEGPSGECTXPA                               0x00001150 /* RW-4R */
#define NV_PAPU_FEGPSGECTXPA_VALUE                         31:12 /* RWXUF */
#define NV_PAPU_FEGPSGECTXPA_BITS                          31:0 /* RW-VF */
#define NV_PAPU_FEGPSGEMAXOFF                              0x00001154 /* RW-4R */
#define NV_PAPU_FEGPSGEMAXOFF_VALUE                        31:12 /* RWXUF */
#define NV_PAPU_FEGPSGEMAXOFF_BITS                         31:0 /* RW-VF */
#define NV_PAPU_FEMAXMB                                    0x00001158 /* RW-4R */
#define NV_PAPU_FEMAXMB_VALUE                              5:0 /* RWXUF */
#define NV_PAPU_FEMAXMB_BITS                               5:0 /* RW-VF */
#define NV_PAPU_FENADDR                                    0x0000115c /* RW-4R */
#define NV_PAPU_FENADDR_VALUE                              31:0 /* RWXUF */
#define NV_PAPU_FENADDR_BITS                               31:0 /* RW-VF */
#define NV_PAPU_AVGBW                                      0x00001200 /* R--4R */
#define NV_PAPU_AVGBW_VALUE                                20:0 /* R-XUF */
#define NV_PAPU_AVGBW_BITS                                 20:0 /* R--VF */
#define NV_PAPU_WCBW                                       0x00001204 /* RW-4R */
#define NV_PAPU_WCBW_VALUE                                 20:0 /* RWXUF */
#define NV_PAPU_WCBW_BITS                                  20:0 /* RW-VF */
#define NV_PAPU_CURBW                                      0x00001208 /* R--4R */
#define NV_PAPU_CURBW_VALUE                                20:0 /* R-XUF */
#define NV_PAPU_CURBW_BITS                                 20:0 /* R--VF */
#define NV_PAPU_CNTBW                                      0x0000120c /* R--4R */
#define NV_PAPU_CNTBW_VALUE                                19:0 /* R-XUF */
#define NV_PAPU_CNTBW_BITS                                 19:0 /* R--VF */
#define NV_PAPU_AVGLAT                                     0x00001210 /* R--4R */
#define NV_PAPU_AVGLAT_VALUE                               13:0 /* R-XUF */
#define NV_PAPU_AVGLAT_BITS                                13:0 /* R--VF */
#define NV_PAPU_WCLAT                                      0x00001214 /* RW-4R */
#define NV_PAPU_WCLAT_VALUE                                13:0 /* RWXUF */
#define NV_PAPU_WCLAT_BITS                                 13:0 /* RW-VF */
#define NV_PAPU_CURLAT                                     0x00001218 /* R--4R */
#define NV_PAPU_CURLAT_VALUE                               23:0 /* R-XUF */
#define NV_PAPU_CURLAT_BITS                                23:0 /* R--VF */
#define NV_PAPU_CURLAT_AVGLAT_BITS                         23:10 /* R--VF */
#define NV_PAPU_CNTLAT                                     0x0000121c /* R--4R */
#define NV_PAPU_CNTLAT_VALUE                               9:0 /* R-XUF */
#define NV_PAPU_CNTLAT_VALUE_MAX                           0x000003FF /* R---V */
#define NV_PAPU_CNTLAT_BITS                                9:0 /* R--VF */
#define NV_PAPU_FEDECMETH                                  0x00001300 /* R--4R */
#define NV_PAPU_FEDECMETH_METH                             15:0 /* R-XUF */
#define NV_PAPU_FEDECMETH_PHASE                            23:16 /* R-XUF */
#define NV_PAPU_FEDECMETH_PHASE_LAST                       24:24 /* R-XUF */
#define NV_PAPU_FEDECMETH_PHASE_LAST_FALSE                 0x00000000 /* R-I-V */
#define NV_PAPU_FEDECMETH_PHASE_LAST_TRUE                  0x00000001 /* R---V */
#define NV_PAPU_FEDECMETH_VALID                            25:25 /* R-XUF */
#define NV_PAPU_FEDECMETH_VALID_FALSE                      0x00000000 /* R-I-V */
#define NV_PAPU_FEDECMETH_VALID_TRUE                       0x00000001 /* R---V */
#define NV_PAPU_FEDECMETH_BITS                             25:0 /* R--VF */
#define NV_PAPU_FEDECPARAM                                 0x00001304 /* R--4R */
#define NV_PAPU_FEDECPARAM_VALUE                           31:0 /* R-XUF */
#define NV_PAPU_FEDECPARAM_BITS                            31:0 /* RW-VF */
#define NV_PAPU_FEDECIMMED                                 0x00001308 /* R--4R */
#define NV_PAPU_FEDECIMMED_VALUE                           31:0 /* R-XUF */
#define NV_PAPU_FEDECIMMED_BITS                            31:0 /* R--VF */
#define NV_PAPU_FESCRATCH                                  0x0000130c /* RW-4R */
#define NV_PAPU_FESCRATCH_VALUE                            31:0 /* RWXUF */
#define NV_PAPU_FESCRATCH_BITS                             31:0 /* RW-VF */
#define NV_PAPU_FESCRATCH2                                 0x00001310 /* RW-4R */
#define NV_PAPU_FESCRATCH2_VALUE                           31:0 /* RWXUF */
#define NV_PAPU_FESCRATCH2_BITS                            31:0 /* RW-VF */
#define NV_PAPU_FESCRATCH3                                 0x00001314 /* RW-4R */
#define NV_PAPU_FESCRATCH3_VALUE                           31:0 /* RWXUF */
#define NV_PAPU_FESCRATCH3_BITS                            31:0 /* RW-VF */
#define NV_PAPU_FESCRATCH4                                 0x00001318 /* RW-4R */
#define NV_PAPU_FESCRATCH4_VALUE                           31:0 /* RWXUF */
#define NV_PAPU_FESCRATCH4_BITS                            31:0 /* RW-VF */
#define NV_PAPU_FEMEMADDR                                  0x00001324 /* RW-4R */
#define NV_PAPU_FEMEMADDR_VALUE                            31:0 /* RWXUF */
#define NV_PAPU_FEMEMADDR_BITS                             31:0 /* RW-VF */
#define NV_PAPU_FEMEMSZ                                    0x00001328 /* RW-4R */
#define NV_PAPU_FEMEMSZ_VALUE                              5:0 /* RWXUF */
#define NV_PAPU_FEMEMSZ_BITS                               5:0 /* RW-VF */
#define NV_PAPU_FEMEMISO                                   0x0000132c /* RW-4R */
#define NV_PAPU_FEMEMISO_WR                                0:0 /* RWXUF */
#define NV_PAPU_FEMEMISO_WR_NON_ISO                        0x00000000 /* RWI-V */
#define NV_PAPU_FEMEMISO_WR_ISO                            0x00000001 /* RW--V */
#define NV_PAPU_FEMEMISO_RD                                1:1 /* RWXUF */
#define NV_PAPU_FEMEMISO_RD_NON_ISO                        0x00000000 /* RWI-V */
#define NV_PAPU_FEMEMISO_RD_ISO                            0x00000001 /* RW--V */
#define NV_PAPU_FEMEMISO_BITS                              1:0 /* RW-VF */
#define NV_PAPU_FEMEMWE                                    0x00001330 /* RW-4R */
#define NV_PAPU_FEMEMWE_VALUE                              3:0 /* RWXUF */
#define NV_PAPU_FEMEMWE_VALUE_ALL                          0x0000000f /* RWI-V */
#define NV_PAPU_FEMEMWE_BITS                               3:0 /* RW-VF */
#define NV_PAPU_FEMEMDATA                                  0x00001334 /* RW-4R */
#define NV_PAPU_FEMEMDATA_VALUE                            31:0 /* RWXUF */
#define NV_PAPU_FEMEMDATA_BITS                             31:0 /* RW-VF */
#define NV_PAPU_FESEIDLELINKS                              0x00001338 /* R--4R */
#define NV_PAPU_FESEIDLELINKS_PREV                         15:0 /* R-XUF */
#define NV_PAPU_FESEIDLELINKS_PREV_NULL                    0x0000ffff /* R---V */
#define NV_PAPU_FESEIDLELINKS_NEXT                         31:16 /* R-XUF */
#define NV_PAPU_FESEIDLELINKS_NEXT_NULL                    0x0000ffff /* R---V */
#define NV_PAPU_FESEIDLELINKS_BITS                         31:0 /* R--VF */
#define NV_PAPU_FESENOTIFY                                 0x0000133c /* R--4R */
#define NV_PAPU_FESENOTIFY_VOICE                           15:0 /* R-XUF */
#define NV_PAPU_FESENOTIFY_SSLA_COMPLETE                   16:16 /* R-XUF */
#define NV_PAPU_FESENOTIFY_SSLA_COMPLETE_NO                0x00000000 /* R---V */
#define NV_PAPU_FESENOTIFY_SSLA_COMPLETE_YES               0x00000001 /* R---V */
#define NV_PAPU_FESENOTIFY_SSLB_COMPLETE                   17:17 /* R-XUF */
#define NV_PAPU_FESENOTIFY_SSLB_COMPLETE_NO                0x00000000 /* R---V */
#define NV_PAPU_FESENOTIFY_SSLB_COMPLETE_YES               0x00000001 /* R---V */
#define NV_PAPU_FESENOTIFY_ENVELOPE_ACTIVE                 18:18 /* R-XUF */
#define NV_PAPU_FESENOTIFY_ENVELOPE_ACTIVE_NO              0x00000000 /* R---V */
#define NV_PAPU_FESENOTIFY_ENVELOPE_ACTIVE_YES             0x00000001 /* R---V */
#define NV_PAPU_FESENOTIFY_SAMPLES_ACTIVE                  19:19 /* R-XUF */
#define NV_PAPU_FESENOTIFY_SAMPLES_ACTIVE_NO               0x00000000 /* R---V */
#define NV_PAPU_FESENOTIFY_SAMPLES_ACTIVE_YES              0x00000001 /* R---V */
#define NV_PAPU_FESENOTIFY_INTERRUPT_ENABLE                20:20 /* R-XUF */
#define NV_PAPU_FESENOTIFY_INTERRUPT_ENABLE_NO             0x00000000 /* R---V */
#define NV_PAPU_FESENOTIFY_INTERRUPT_ENABLE_YES            0x00000001 /* R---V */
#define NV_PAPU_FESENOTIFY_BITS                            20:0 /* R--VF */
#define NV_PAPU_FEUFIFOCTL                                 0x00001340 /* RW-4R */
#define NV_PAPU_FEUFIFOCTL_COUNT                           5:0 /* RWXUF */
#define NV_PAPU_FEUFIFOCTL_HEAD                            12:8 /* RWXUF */
#define NV_PAPU_FEUFIFOCTL_HEAD_LSB                        8:8 /* RWXUF */
#define NV_PAPU_FEUFIFOCTL_TAIL                            20:16 /* RWXUF */
#define NV_PAPU_FEUFIFOCTL_BITS                            20:0 /* RW-VF */
#define NV_PAPU_FEUFIFOMETH(i)                             (0x00001400+(i)*8) /* -W-4A */
#define NV_PAPU_FEUFIFOMETH__SIZE_1                        32 /* */ 
#define NV_PAPU_FEUFIFOMETH_VALUE                          31:0 /* RWI-V */
#define NV_PAPU_FEUFIFOMETH_BITS                           31:0 /* RW-VF */
#define NV_PAPU_FEUFIFOMETH_ADDR_BITS                      7:0 /* */ 
#define NV_PAPU_FEUFIFOMETH_ADDR_SAVED_BITS                7:2 /* */ 
#define NV_PAPU_FEUFIFOPARAM(i)                            (0x00001404+(i)*8) /* -W-4A */
#define NV_PAPU_FEUFIFOPARAM__SIZE_1                       32 /* */ 
#define NV_PAPU_FEUFIFOPARAM_VALUE                         31:0 /* RWI-V */
#define NV_PAPU_FEUFIFOPARAM_BITS                          31:0 /* RW-VF */
#define NV_PAPU_FETFORCE0                                  0x00001500 /* RW-4R */
#define NV_PAPU_FETFORCE0_NOP                              0:0 /* RWXUF */
#define NV_PAPU_FETFORCE0_SYNCHRONIZE                      1:1 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_TIME                         2:2 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_MODE                         3:3 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_CURRENT_VOICE                4:4 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_ANTECEDENT_VOICE             5:5 /* RWXUF */
#define NV_PAPU_FETFORCE0_VOICE_ON                         6:6 /* RWXUF */
#define NV_PAPU_FETFORCE0_VOICE_OFF                        7:7 /* RWXUF */
#define NV_PAPU_FETFORCE0_VOICE_RELEASE                    8:8 /* RWXUF */
#define NV_PAPU_FETFORCE0_VOICE_PAUSE                      9:9 /* RWXUF */
#define NV_PAPU_FETFORCE0_GET_VOICE_POSITION               10:10 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_SUBMIX_HEADROOM              11:11 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_HRTF_SUBMIXES                12:12 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_HRTF_HEADROOM                13:13 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOLUME_TRACKING              14:14 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_PITCH_TRACKING               15:15 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_HRTF_TRACKING                16:16 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_ITD_TRACKING                 17:17 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_FILTER_TRACKING              18:18 /* RWXUF */
#define NV_PAPU_FETFORCE0_VOICE_LOCK                       19:19 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_CFG_VBIN               20:20 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_CFG_FMT                21:21 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_CFG_OTHER              22:22 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_TAR_HRTF               23:23 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_PAR_LFODLY             24:24 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_SSL                    25:25 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_CFG_BUF                26:26 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_TAR_VOL                27:27 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_LFO                    28:28 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_TAR_FC                 29:29 /* RWXUF */
#define NV_PAPU_FETFORCE0_SET_VOICE_TAR_PITCH              30:30 /* RWXUF */
#define NV_PAPU_FETFORCE0_BITS                             30:0 /* RW-VF */
#define NV_PAPU_FETFORCE1                                  0x00001504 /* RW-4R */
#define NV_PAPU_FETFORCE1_SET_CURRENT_HRTF_ENTRY           0:0 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_HRIR                         1:1 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_HRIR_X                       2:2 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_CURRENT_SSL_CONTEXT_DMA      3:3 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_CURRENT_SSL                  4:4 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_SSL_SEGMENT_OFFSET           5:5 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_SSL_SEGMENT_LENGTH           6:6 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_CURRENT_INBUF_SGE_CONTEXT_DMA 7:7 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_CURRENT_INBUF_SGE            8:8 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_CURRENT_INBUF_SGE_OFFSET     9:9 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_CURRENT_BUFFER_SGE_CONTEXT_DMA 10:10 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_CURRENT_OUTBUF_SGE           11:11 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_OUTBUF_BA                    12:12 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_OUTBUF_LEN                   13:13 /* RWXUF */
#define NV_PAPU_FETFORCE1_SET_CURRENT_OUTBUF_SGE_OFFSET    14:14 /* RWXUF */
#define NV_PAPU_FETFORCE1_SE2FE_IDLE_VOICE                 15:15 /* RWXUF */
#define NV_PAPU_FETFORCE1_SE2FE_NOTIFY                     16:16 /* RWXUF */
#define NV_PAPU_FETFORCE1_SE2FE_RTINTR                     17:17 /* RWXUF */
#define NV_PAPU_FETFORCE1_UNKNOWN                          18:18 /* RWXUF */
#define NV_PAPU_FETFORCE1_BITS                             18:0 /* RW-VF */
#define NV_PAPU_FETIGNORE0                                 0x00001508 /* RW-4R */
#define NV_PAPU_FETIGNORE0_NOP                             0:0 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SYNCHRONIZE                     1:1 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_TIME                        2:2 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_MODE                        3:3 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_CURRENT_VOICE               4:4 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_ANTECEDENT_VOICE            5:5 /* RWXUF */
#define NV_PAPU_FETIGNORE0_VOICE_ON                        6:6 /* RWXUF */
#define NV_PAPU_FETIGNORE0_VOICE_OFF                       7:7 /* RWXUF */
#define NV_PAPU_FETIGNORE0_VOICE_RELEASE                   8:8 /* RWXUF */
#define NV_PAPU_FETIGNORE0_VOICE_PAUSE                     9:9 /* RWXUF */
#define NV_PAPU_FETIGNORE0_GET_VOICE_POSITION              10:10 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_SUBMIX_HEADROOM             11:11 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_HRTF_SUBMIXES               12:12 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_HRTF_HEADROOM               13:13 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOLUME_TRACKING             14:14 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_PITCH_TRACKING              15:15 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_HRTF_TRACKING               16:16 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_ITD_TRACKING                17:17 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_FILTER_TRACKING             18:18 /* RWXUF */
#define NV_PAPU_FETIGNORE0_VOICE_LOCK                      19:19 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_CFG_VBIN              20:20 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_CFG_FMT               21:21 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_CFG_OTHER             22:22 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_TAR_HRTF              23:23 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_PAR_LFODLY            24:24 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_SSL                   25:25 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_CFG_BUF               26:26 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_TAR_VOL               27:27 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_LFO                   28:28 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_TAR_FC                29:29 /* RWXUF */
#define NV_PAPU_FETIGNORE0_SET_VOICE_TAR_PITCH             30:30 /* RWXUF */
#define NV_PAPU_FETIGNORE0_BITS                            30:0 /* RW-VF */
#define NV_PAPU_FETIGNORE1                                 0x0000150c /* RW-4R */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_HRTF_ENTRY          0:0 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_HRIR                        1:1 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_HRIR_X                      2:2 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_SSL_CONTEXT_DMA     3:3 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_SSL                 4:4 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_SSL_SEGMENT_OFFSET          5:5 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_SSL_SEGMENT_LENGTH          6:6 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_INBUF_SGE_CONTEXT_DMA 7:7 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_INBUF_SGE           8:8 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_INBUF_SGE_OFFSET    9:9 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_BUFFER_SGE_CONTEXT_DMA 10:10 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_OUTBUF_SGE          11:11 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_OUTBUF_BA                   12:12 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_OUTBUF_LEN                  13:13 /* RWXUF */
#define NV_PAPU_FETIGNORE1_SET_CURRENT_OUTBUF_SGE_OFFSET   14:14 /* RWXUF */
#define NV_PAPU_FETIGNORE1_UNKNOWN                         18:18 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_NOT_IMPLEMENTED      22:22 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_METHOD_UNKNOWN       23:23 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_BAD_ARGUMENT         24:24 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_CURRENT_NOT_SET      25:25 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_ANTECEDENT_NOT_SET   26:26 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_VOICE_ACTIVE         27:27 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_NOT_DATA_TYPE_BUFFER 28:28 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_BAD_LIST_POINTER     29:29 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_CURRENT_VOICE_NOT_3D 30:30 /* RWXUF */
#define NV_PAPU_FETIGNORE1_TRAPREASON_CTXPA_INVALID        31:31 /* RWXUF */
#define NV_PAPU_FETIGNORE1_BITS                            31:0 /* RW-VF */
#define NV_PAPU_SECTL                                      0x00002000 /* RW-4R */
#define NV_PAPU_SECTL_SEPRTYP                              0:0 /* RW-VF */
#define NV_PAPU_SECTL_SEPRTYP_NON_ISO                      0x00000000 /* RWI-V */
#define NV_PAPU_SECTL_SEPRTYP_ISO                          0x00000001 /* RW--V */
#define NV_PAPU_SECTL_SEPWTYP                              1:1 /* RW-VF */
#define NV_PAPU_SECTL_SEPWTYP_NON_ISO                      0x00000000 /* RWI-V */
#define NV_PAPU_SECTL_SEPWTYP_ISO                          0x00000001 /* RW--V */
#define NV_PAPU_SECTL_SESRTYP                              2:2 /* RW-VF */
#define NV_PAPU_SECTL_SESRTYP_NON_ISO                      0x00000000 /* RWI-V */
#define NV_PAPU_SECTL_SESRTYP_ISO                          0x00000001 /* RW--V */
#define NV_PAPU_SECTL_XCNTMODE                             4:3 /* RW-VF */
#define NV_PAPU_SECTL_XCNTMODE_OFF                         0x00000000 /* RWI-V */
#define NV_PAPU_SECTL_XCNTMODE_AC_SYNC                     0x00000001 /* RW--V */
#define NV_PAPU_SECTL_XCNTMODE_SW                          0x00000002 /* RW--V */
#define NV_PAPU_SECTL_XCNTMODE_FREE_RUNNING                0x00000003 /* RW--V */
#define NV_PAPU_SECTL_DWINT                                5:5 /* RW-VF */
#define NV_PAPU_SECTL_DWINT_DISABLED                       0x00000000 /* RWI-V */
#define NV_PAPU_SECTL_DWINT_ENABLED                        0x00000001 /* RW--V */
#define NV_PAPU_SECTL_RTWARN                               6:6 /* RW-VF */
#define NV_PAPU_SECTL_RTWARN_DISABLED                      0x00000000 /* RWI-V */
#define NV_PAPU_SECTL_RTWARN_ENABLED                       0x00000001 /* RW--V */
#define NV_PAPU_SECTL_DPINT                                7:7 /* RW-VF */
#define NV_PAPU_SECTL_DPINT_DISABLED                       0x00000000 /* RWI-V */
#define NV_PAPU_SECTL_DPINT_ENABLED                        0x00000001 /* RW--V */
#define NV_PAPU_STID                                       0x00002004 /* R--4R */
#define NV_PAPU_STID_SESTART                               0:0 /* R--VF */
#define NV_PAPU_STID_SESTART_NOT_STARTING                  0x00000000 /* R-I-V */
#define NV_PAPU_STID_SESTART_STARTING                      0x00000001 /* R---V */
#define NV_PAPU_STID_SEIDLE                                1:1 /* R--VF */
#define NV_PAPU_STID_SEIDLE_IDLE                           0x00000001 /* R-I-V */
#define NV_PAPU_STID_SEIDLE_NOT_IDLE                       0x00000000 /* R---V */
#define NV_PAPU_STID_VPSTART                               2:2 /* R--VF */
#define NV_PAPU_STID_VPSTART_NOT_STARTING                  0x00000000 /* R-I-V */
#define NV_PAPU_STID_VPSTART_STARTING                      0x00000001 /* R---V */
#define NV_PAPU_STID_VPIDLE                                3:3 /* R--VF */
#define NV_PAPU_STID_VPIDLE_IDLE                           0x00000001 /* R-I-V */
#define NV_PAPU_STID_VPIDLE_NOT_IDLE                       0x00000000 /* R---V */
#define NV_PAPU_STID_GPSTART                               4:4 /* R--VF */
#define NV_PAPU_STID_GPSTART_NOT_STARTING                  0x00000000 /* R-I-V */
#define NV_PAPU_STID_GPSTART_STARTING                      0x00000001 /* R---V */
#define NV_PAPU_STID_GPIDLE                                5:5 /* R--VF */
#define NV_PAPU_STID_GPIDLE_IDLE                           0x00000001 /* R-I-V */
#define NV_PAPU_STID_GPIDLE_NOT_IDLE                       0x00000000 /* R---V */
#define NV_PAPU_STID_EPSTART                               6:6 /* R--VF */
#define NV_PAPU_STID_EPSTART_NOT_STARTING                  0x00000000 /* R-I-V */
#define NV_PAPU_STID_EPSTART_STARTING                      0x00000001 /* R---V */
#define NV_PAPU_STID_EPIDLE                                7:7 /* R--VF */
#define NV_PAPU_STID_EPIDLE_IDLE                           0x00000001 /* R-I-V */
#define NV_PAPU_STID_EPIDLE_NOT_IDLE                       0x00000000 /* R---V */
#define NV_PAPU_IGSCNT                                     0x00002008 /* RW-4R */
#define NV_PAPU_IGSCNT_VALUE                               31:0 /* RWXUF */
#define NV_PAPU_IGSCNT_INIT                                0x00000000 /* RWI-V */
#define NV_PAPU_XGSCNT                                     0x0000200C /* RW-4R */
#define NV_PAPU_XGSCNT_VALUE                               31:0 /* RWXUF */
#define NV_PAPU_XGSCNT_INIT                                0xFFFFFFFF /* RWI-V */
#define NV_PAPU_DGSCNT                                     0x00002010 /* RW-4R */
#define NV_PAPU_DGSCNT_VALUE                               31:0 /* RWXUF */
#define NV_PAPU_DGSCNT_INIT                                0x00000000 /* RWI-V */
#define NV_PAPU_WGSCNT                                     0x00002014 /* RW-4R */
#define NV_PAPU_WGSCNT_VALUE                               31:0 /* RWXUF */
#define NV_PAPU_WGSCNT_INIT                                0x00000000 /* RWI-V */
#define NV_PAPU_RGSCNT                                     0x00002018 /* RW-4R */
#define NV_PAPU_RGSCNT_VALUE                               31:0 /* RWXUF */
#define NV_PAPU_RGSCNT_INIT                                0x00000000 /* RWI-V */
#define NV_PAPU_PGSCNT                                     0x0000201C /* RW-4R */
#define NV_PAPU_PGSCNT_VALUE                               31:0 /* RWXUF */
#define NV_PAPU_PGSCNT_INIT                                0x00000000 /* RWI-V */
#define NV_PAPU_EGSCNT                                     0x00002020 /* RW-4R */
#define NV_PAPU_EGSCNT_VALUE                               31:0 /* RWXUF */
#define NV_PAPU_EGSCNT_INIT                                0x00000000 /* RWI-V */
#define NV_PAPU_DEGSCNT                                    0x00002024 /* RW-4R */
#define NV_PAPU_DEGSCNT_VALUE                              31:0 /* RWXUF */
#define NV_PAPU_DEGSCNT_INIT                               0x00000000 /* RWI-V */
#define NV_PAPU_ECNTSTP                                    0x00002028 /* RW-4R */
#define NV_PAPU_ECNTSTP_VALUE                              15:0 /* RWXUF */
#define NV_PAPU_VPVADDR                                    0x0000202C /* RW-4R */
#define NV_PAPU_VPVADDR_VALUE                              31:14 /* RWXUF */
#define NV_PAPU_VPSGEADDR                                  0x00002030 /* RW-4R */
#define NV_PAPU_VPSGEADDR_VALUE                            31:14 /* RWXUF */
#define NV_PAPU_VPSSLADDR                                  0x00002034 /* RW-4R */
#define NV_PAPU_VPSSLADDR_VALUE                            31:14 /* RWXUF */
#define NV_PAPU_VPHTADDR                                   0x00002038 /* RW-4R */
#define NV_PAPU_VPHTADDR_VALUE                             31:14 /* RWXUF */
#define NV_PAPU_VPHCADDR                                   0x0000203C /* RW-4R */
#define NV_PAPU_VPHCADDR_VALUE                             31:14 /* RWXUF */
#define NV_PAPU_GPSADDR                                    0x00002040 /* RW-4R */
#define NV_PAPU_GPSADDR_VALUE                              31:14 /* RWXUF */
#define NV_PAPU_GPFADDR                                    0x00002044 /* RW-4R */
#define NV_PAPU_GPFADDR_VALUE                              31:14 /* RWXUF */
#define NV_PAPU_EPSADDR                                    0x00002048 /* RW-4R */
#define NV_PAPU_EPSADDR_VALUE                              31:14 /* RWXUF */
#define NV_PAPU_EPFADDR                                    0x0000204C /* RW-4R */
#define NV_PAPU_EPFADDR_VALUE                              31:14 /* RWXUF */
#define NV_PAPU_VLOCK                                      0x00002050 /* RW-4R */
#define NV_PAPU_VLOCK_VOICE                                15:0 /* RW-VF */
#define NV_PAPU_VLOCK_REQ                                  16:16 /* RW-VF */
#define NV_PAPU_VLOCK_REQ_LOCK                             0x00000001 /* RW--V */
#define NV_PAPU_VLOCK_REQ_UNLOCK                           0x00000000 /* RWI-V */
#define NV_PAPU_VLOCK_STATUS                               17:17 /* RW-VF */
#define NV_PAPU_VLOCK_STATUS_NOT_IN_PROGRESS               0x00000000 /* RW--V */
#define NV_PAPU_VLOCK_STATUS_IN_PROGRESS                   0x00000001 /* RWI-V */
#define NV_PAPU_TVL2D                                      0x00002054 /* RW-4R */
#define NV_PAPU_TVL2D_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_TVL2D_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_CVL2D                                      0x00002058 /* RW-4R */
#define NV_PAPU_CVL2D_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_CVL2D_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_NVL2D                                      0x0000205C /* RW-4R */
#define NV_PAPU_NVL2D_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_NVL2D_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_TVL3D                                      0x00002060 /* RW-4R */
#define NV_PAPU_TVL3D_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_TVL3D_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_CVL3D                                      0x00002064 /* RW-4R */
#define NV_PAPU_CVL3D_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_CVL3D_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_NVL3D                                      0x00002068 /* RW-4R */
#define NV_PAPU_NVL3D_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_NVL3D_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_TVLMP                                      0x0000206C /* RW-4R */
#define NV_PAPU_TVLMP_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_TVLMP_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_CVLMP                                      0x00002070 /* RW-4R */
#define NV_PAPU_CVLMP_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_CVLMP_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_NVLMP                                      0x00002074 /* RW-4R */
#define NV_PAPU_NVLMP_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_NVLMP_VALUE_NULL                           0x0000ffff /* RWI-V */
#define NV_PAPU_ALPHAV                                     0x00002078 /* RW-4R */
#define NV_PAPU_ALPHAV_VALUE                               11:0 /* RWXUF */
#define NV_PAPU_ALPHAP                                     0x0000207C /* RW-4R */
#define NV_PAPU_ALPHAP_VALUE                               11:0 /* RWXUF */
#define NV_PAPU_ALPHAF                                     0x00002080 /* RW-4R */
#define NV_PAPU_ALPHAF_VALUE                               11:0 /* RWXUF */
#define NV_PAPU_ALPHAI                                     0x00002084 /* RW-4R */
#define NV_PAPU_ALPHAI_VALUE                               11:0 /* RWXUF */
#define NV_PAPU_ALPHAH                                     0x00002088 /* RW-4R */
#define NV_PAPU_ALPHAH_VALUE                               11:0 /* RWXUF */
#define NV_PAPU_MIXHRA                                     0x0000208C /* RW-4R */
#define NV_PAPU_MIXHRA_MHR0                                2:0 /* RWXUF */
#define NV_PAPU_MIXHRA_MHR0_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRA_MHR1                                10:8 /* RWXUF */
#define NV_PAPU_MIXHRA_MHR1_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRA_MHR2                                18:16 /* RWXUF */
#define NV_PAPU_MIXHRA_MHR2_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRA_MHR3                                26:24 /* RWXUF */
#define NV_PAPU_MIXHRA_MHR3_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRB                                     0x00002090 /* RW-4R */
#define NV_PAPU_MIXHRB_MHR4                                2:0 /* RWXUF */
#define NV_PAPU_MIXHRB_MHR4_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRB_MHR5                                10:8 /* RWXUF */
#define NV_PAPU_MIXHRB_MHR5_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRB_MHR6                                18:16 /* RWXUF */
#define NV_PAPU_MIXHRB_MHR6_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRB_MHR7                                26:24 /* RWXUF */
#define NV_PAPU_MIXHRB_MHR7_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRC                                     0x00002094 /* RW-4R */
#define NV_PAPU_MIXHRC_MHR8                                2:0 /* RWXUF */
#define NV_PAPU_MIXHRC_MHR8_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRC_MHR9                                10:8 /* RWXUF */
#define NV_PAPU_MIXHRC_MHR9_INIT                           0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRC_MHR10                               18:16 /* RWXUF */
#define NV_PAPU_MIXHRC_MHR10_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRC_MHR11                               26:24 /* RWXUF */
#define NV_PAPU_MIXHRC_MHR11_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRD                                     0x00002098 /* RW-4R */
#define NV_PAPU_MIXHRD_MHR12                               2:0 /* RWXUF */
#define NV_PAPU_MIXHRD_MHR12_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRD_MHR13                               10:8 /* RWXUF */
#define NV_PAPU_MIXHRD_MHR13_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRD_MHR14                               18:16 /* RWXUF */
#define NV_PAPU_MIXHRD_MHR14_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRD_MHR15                               26:24 /* RWXUF */
#define NV_PAPU_MIXHRD_MHR15_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRE                                     0x0000209C /* RW-4R */
#define NV_PAPU_MIXHRE_MHR16                               2:0 /* RWXUF */
#define NV_PAPU_MIXHRE_MHR16_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRE_MHR17                               10:8 /* RWXUF */
#define NV_PAPU_MIXHRE_MHR17_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRE_MHR18                               18:16 /* RWXUF */
#define NV_PAPU_MIXHRE_MHR18_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRE_MHR19                               26:24 /* RWXUF */
#define NV_PAPU_MIXHRF                                     0x000020A0 /* RW-4R */
#define NV_PAPU_MIXHRF_MHR19_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRF_MHR20                               2:0 /* RWXUF */
#define NV_PAPU_MIXHRF_MHR20_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRF_MHR21                               10:8 /* RWXUF */
#define NV_PAPU_MIXHRF_MHR21_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRF_MHR22                               18:16 /* RWXUF */
#define NV_PAPU_MIXHRF_MHR22_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRF_MHR23                               26:24 /* RWXUF */
#define NV_PAPU_MIXHRF_MHR23_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRG                                     0x000020A4 /* RW-4R */
#define NV_PAPU_MIXHRG_MHR24                               2:0 /* RWXUF */
#define NV_PAPU_MIXHRG_MHR24_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRG_MHR25                               10:8 /* RWXUF */
#define NV_PAPU_MIXHRG_MHR25_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRG_MHR26                               18:16 /* RWXUF */
#define NV_PAPU_MIXHRG_MHR26_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRG_MHR27                               26:24 /* RWXUF */
#define NV_PAPU_MIXHRG_MHR27_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRH                                     0x000020A8 /* RW-4R */
#define NV_PAPU_MIXHRH_MHR28                               2:0 /* RWXUF */
#define NV_PAPU_MIXHRH_MHR28_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRH_MHR29                               10:8 /* RWXUF */
#define NV_PAPU_MIXHRH_MHR29_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRH_MHR30                               18:16 /* RWXUF */
#define NV_PAPU_MIXHRH_MHR30_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIXHRH_MHR31                               26:24 /* RWXUF */
#define NV_PAPU_MIXHRH_MHR31_INIT                          0x00000000 /* RWI-V */
#define NV_PAPU_MIX3D                                      0x000020AC /* RW-4R */
#define NV_PAPU_MIX3D_SMX3DFL                              4:0 /* RWXUF */
#define NV_PAPU_MIX3D_SMX3DFL_INIT                         0x00000000 /* RWI-V */
#define NV_PAPU_MIX3D_SMX3DFR                              12:8 /* RWXUF */
#define NV_PAPU_MIX3D_SMX3DFR_INIT                         0x00000000 /* RWI-V */
#define NV_PAPU_MIX3D_SMX3DRL                              20:16 /* RWXUF */
#define NV_PAPU_MIX3D_SMX3DRL_INIT                         0x00000000 /* RWI-V */
#define NV_PAPU_MIX3D_SMX3DRR                              28:24 /* RWXUF */
#define NV_PAPU_MIX3D_SMX3DRR_INIT                         0x00000000 /* RWI-V */
#define NV_PAPU_TDHR                                       0x000020B0 /* RW-4R */
#define NV_PAPU_TDHR_TDHR                                  2:0 /* RWXUF */
#define NV_PAPU_TDHR_TDHR_INIT                             0x00000000 /* RWI-V */
#define NV_PAPU_AVGSESTI                                   0x000020B4 /* RW-4R */
#define NV_PAPU_AVGSESTI_VALUE                             31:0 /* RWXUF */
#define NV_PAPU_WCSESTI                                    0x000020B8 /* RW-4R */
#define NV_PAPU_WCSESTI_VALUE                              31:0 /* RWXUF */
#define NV_PAPU_CURSESTI                                   0x000020BC /* RW-4R */
#define NV_PAPU_CURSESTI_VALUE                             31:0 /* RWXUF */
#define NV_PAPU_CNTSESTI                                   0x000020C0 /* RW-4R */
#define NV_PAPU_CNTSESTI_VALUE                             7:0 /* RWXUF */
#define NV_PAPU_AVGGPSTI                                   0x000020C4 /* RW-4R */
#define NV_PAPU_AVGGPSTI_VALUE                             31:0 /* RWXUF */
#define NV_PAPU_WCGPSTI                                    0x000020C8 /* RW-4R */
#define NV_PAPU_WCGPSTI_VALUE                              31:0 /* RWXUF */
#define NV_PAPU_CURGPSTI                                   0x000020CC /* RW-4R */
#define NV_PAPU_CURGPSTI_VALUE                             31:0 /* RWXUF */
#define NV_PAPU_CNTGPSTI                                   0x000020D0 /* RW-4R */
#define NV_PAPU_CNTGPSTI_VALUE                             7:0 /* RWXUF */
#define NV_PAPU_GPSMAXSGE                                  0x000020D4 /* RW-4R */
#define NV_PAPU_GPSMAXSGE_VALUE                            15:0 /* RWXUF */
#define NV_PAPU_GPSMAXSGE_INIT                             0x00000000 /* RWI-V */
#define NV_PAPU_GPSMAXSGE_BITS                             15:0 /* RW-VF */
#define NV_PAPU_GPFMAXSGE                                  0x000020D8 /* RW-4R */
#define NV_PAPU_GPFMAXSGE_VALUE                            15:0 /* RWXUF */
#define NV_PAPU_GPFMAXSGE_INIT                             0x00000000 /* RWI-V */
#define NV_PAPU_GPFMAXSGE_BITS                             15:0 /* RW-VF */
#define NV_PAPU_EPSMAXSGE                                  0x000020DC /* RW-4R */
#define NV_PAPU_EPSMAXSGE_VALUE                            15:0 /* RWXUF */
#define NV_PAPU_EPSMAXSGE_INIT                             0x00000000 /* RWI-V */
#define NV_PAPU_EPSMAXSGE_BITS                             15:0 /* RW-VF */
#define NV_PAPU_EPFMAXSGE                                  0x000020E0 /* RW-4R */
#define NV_PAPU_EPFMAXSGE_VALUE                            15:0 /* RWXUF */
#define NV_PAPU_EPFMAXSGE_INIT                             0x00000000 /* RWI-V */
#define NV_PAPU_EPFMAXSGE_BITS                             15:0 /* RW-VF */
#define NV_PAPU_GPNADDR                                    0x00003004 /* RW-4R */
#define NV_PAPU_GPNADDR_VALUE                              31:12 /* RWXUF */
#define NV_PAPU_GPCADDR                                    0x00003014 /* RW-4R */
#define NV_PAPU_GPCADDR_VALUE                              31:12 /* RWXUF */
#define NV_PAPU_GPOFBASE0                                  0x00003024 /* RW-4R */
#define NV_PAPU_GPOFBASE0_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_GPOFBASE1                                  0x00003034 /* RW-4R */
#define NV_PAPU_GPOFBASE1_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_GPOFBASE2                                  0x00003044 /* RW-4R */
#define NV_PAPU_GPOFBASE2_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_GPOFBASE3                                  0x00003054 /* RW-4R */
#define NV_PAPU_GPOFBASE3_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_GPOFEND0                                   0x00003028 /* RW-4R */
#define NV_PAPU_GPOFEND0_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_GPOFEND1                                   0x00003038 /* RW-4R */
#define NV_PAPU_GPOFEND1_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_GPOFEND2                                   0x00003048 /* RW-4R */
#define NV_PAPU_GPOFEND2_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_GPOFEND3                                   0x00003058 /* RW-4R */
#define NV_PAPU_GPOFEND3_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_GPOFCUR0                                   0x0000302C /* RW-4R */
#define NV_PAPU_GPOFCUR0_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_GPOFCUR1                                   0x0000303C /* RW-4R */
#define NV_PAPU_GPOFCUR1_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_GPOFCUR2                                   0x0000304C /* RW-4R */
#define NV_PAPU_GPOFCUR2_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_GPOFCUR3                                   0x0000305C /* RW-4R */
#define NV_PAPU_GPOFCUR3_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_GPIFBASE0                                  0x00003064 /* RW-4R */
#define NV_PAPU_GPIFBASE0_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_GPIFBASE1                                  0x00003074 /* RW-4R */
#define NV_PAPU_GPIFBASE1_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_GPIFEND0                                   0x00003068 /* RW-4R */
#define NV_PAPU_GPIFEND0_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_GPIFEND1                                   0x00003078 /* RW-4R */
#define NV_PAPU_GPIFEND1_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_GPIFCUR0                                   0x0000306C /* RW-4R */
#define NV_PAPU_GPIFCUR0_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_GPIFCUR1                                   0x0000307C /* RW-4R */
#define NV_PAPU_GPIFCUR1_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_EPNADDR                                    0x00004004 /* RW-4R */
#define NV_PAPU_EPNADDR_VALUE                              31:12 /* RWXUF */
#define NV_PAPU_EPCADDR                                    0x00004014 /* RW-4R */
#define NV_PAPU_EPCADDR_VALUE                              31:12 /* RWXUF */
#define NV_PAPU_EPOFBASE0                                  0x00004024 /* RW-4R */
#define NV_PAPU_EPOFBASE0_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_EPOFBASE1                                  0x00004034 /* RW-4R */
#define NV_PAPU_EPOFBASE1_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_EPOFBASE2                                  0x00004044 /* RW-4R */
#define NV_PAPU_EPOFBASE2_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_EPOFBASE3                                  0x00004054 /* RW-4R */
#define NV_PAPU_EPOFBASE3_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_EPOFEND0                                   0x00004028 /* RW-4R */
#define NV_PAPU_EPOFEND0_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_EPOFEND1                                   0x00004038 /* RW-4R */
#define NV_PAPU_EPOFEND1_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_EPOFEND2                                   0x00004048 /* RW-4R */
#define NV_PAPU_EPOFEND2_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_EPOFEND3                                   0x00004058 /* RW-4R */
#define NV_PAPU_EPOFEND3_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_EPOFCUR0                                   0x0000402C /* RW-4R */
#define NV_PAPU_EPOFCUR0_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_EPOFCUR1                                   0x0000403C /* RW-4R */
#define NV_PAPU_EPOFCUR1_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_EPOFCUR2                                   0x0000404C /* RW-4R */
#define NV_PAPU_EPOFCUR2_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_EPOFCUR3                                   0x0000405C /* RW-4R */
#define NV_PAPU_EPOFCUR3_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_EPIFBASE0                                  0x00004064 /* RW-4R */
#define NV_PAPU_EPIFBASE0_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_EPIFBASE1                                  0x00004074 /* RW-4R */
#define NV_PAPU_EPIFBASE1_VALUE                            23:8 /* RWXUF */
#define NV_PAPU_EPIFEND0                                   0x00004068 /* RW-4R */
#define NV_PAPU_EPIFEND0_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_EPIFEND1                                   0x00004078 /* RW-4R */
#define NV_PAPU_EPIFEND1_VALUE                             23:8 /* RWXUF */
#define NV_PAPU_EPIFCUR0                                   0x0000406C /* RW-4R */
#define NV_PAPU_EPIFCUR0_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_EPIFCUR1                                   0x0000407C /* RW-4R */
#define NV_PAPU_EPIFCUR1_VALUE                             23:2 /* RWXUF */
#define NV_PAPU_GPXMEM(i)                                  (0x30000+4*(i)) /* RW--M */
#define NV_PAPU_GPXMEM__SIZE_1                             0x1000 /* */ 
#define NV_PAPU_GPMIXBUF(i)                                (0x35000+4*(i)) /* R---M */
#define NV_PAPU_GPMIXBUF__SIZE_1                           0x0400 /* */ 
#define NV_PAPU_GPYMEM(i)                                  (0x36000+4*(i)) /* RW--M */
#define NV_PAPU_GPYMEM__SIZE_1                             0x0800 /* */ 
#define NV_PAPU_GPPMEM(i)                                  (0x3A000+4*(i)) /* RW--M */
#define NV_PAPU_GPPMEM__SIZE_1                             0x1000 /* */ 
#define NV_PAPU_GPRST                                      0x0003FFFC /* RW-4R */
#define NV_PAPU_GPRST_GPRST                                0:0 /* RW-VF */
#define NV_PAPU_GPRST_GPRST_DISABLED                       0x00000001 /* RWI-V */
#define NV_PAPU_GPRST_GPRST_ENABLED                        0x00000000 /* RW--V */
#define NV_PAPU_GPRST_GPDSPRST                             1:1 /* RW-VF */
#define NV_PAPU_GPRST_GPDSPRST_DISABLED                    0x00000001 /* RWI-V */
#define NV_PAPU_GPRST_GPDSPRST_ENABLED                     0x00000000 /* RW--V */
#define NV_PAPU_GPRST_GPNMI                                2:2 /* RW-VF */
#define NV_PAPU_GPRST_GPNMI_DISABLED                       0x00000000 /* RWI-V */
#define NV_PAPU_GPRST_GPNMI_ENABLED                        0x00000001 /* RW--V */
#define NV_PAPU_GPRST_GPABORT                              3:3 /* RW-VF */
#define NV_PAPU_GPRST_GPABORT_DISABLED                     0x00000000 /* RWI-V */
#define NV_PAPU_GPRST_GPABORT_ENABLED                      0x00000001 /* RW--V */
#define NV_PAPU_GPCTLG                                     0x0003FF28 /* RW-4R */
#define NV_PAPU_GPCTLG_GPSTYP                              0:0 /* RW-VF */
#define NV_PAPU_GPCTLG_GPSTYP_NON_ISO                      0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLG_GPSTYP_ISO                          0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT                                   0x0003FF20 /* RW-4R */
#define NV_PAPU_GPCTLOUT_GD0FMT                            1:0 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GD0FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GD0FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD0FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD0FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_GPCTLOUT_GP0TYP                            2:2 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GP0TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GP0TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD0SIZ                            4:3 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GD0SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GD0SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD0SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD1FMT                            6:5 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GD1FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GD1FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD1FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD1FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_GPCTLOUT_GP1TYP                            7:7 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GP1TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GP1TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD1SIZ                            9:8 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GD1SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GD1SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD1SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD2FMT                            11:10 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GD2FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GD2FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD2FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD2FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_GPCTLOUT_GP2TYP                            12:12 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GP2TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GP2TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD2SIZ                            14:13 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GD2SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GD2SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD2SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD3FMT                            16:15 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GD3FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GD3FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD3FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD3FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_GPCTLOUT_GP3TYP                            17:17 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GP3TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GP3TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD3SIZ                            19:18 /* RW-VF */
#define NV_PAPU_GPCTLOUT_GD3SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLOUT_GD3SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_GPCTLOUT_GD3SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_GPCTLIN                                    0x0003FF24 /* RW-4R */
#define NV_PAPU_GPCTLIN_GDI0FMT                            1:0 /* RW-VF */
#define NV_PAPU_GPCTLIN_GDI0FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLIN_GDI0FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI0FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI0FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_GPCTLIN_GPI0TYP                            2:2 /* RW-VF */
#define NV_PAPU_GPCTLIN_GPI0TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLIN_GPI0TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI0SIZ                            4:3 /* RW-VF */
#define NV_PAPU_GPCTLIN_GDI0SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLIN_GDI0SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI0SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI1FMT                            6:5 /* RW-VF */
#define NV_PAPU_GPCTLIN_GDI1FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLIN_GDI1FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI1FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI1FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_GPCTLIN_GPI1TYP                            7:7 /* RW-VF */
#define NV_PAPU_GPCTLIN_GPI1TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLIN_GPI1TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI1SIZ                            9:8 /* RW-VF */
#define NV_PAPU_GPCTLIN_GDI1SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_GPCTLIN_GDI1SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_GPCTLIN_GDI1SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_GPMBO                                      0x0003FF08 /* RW-4R */
#define NV_PAPU_GPMBO_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_GPMBI                                      0x0003FF0C /* RW-4R */
#define NV_PAPU_GPMBI_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_GPGET                                      0x0003FF00 /* RW-4R */
#define NV_PAPU_GPGET_VALUE                                11:2 /* RWXUF */
#define NV_PAPU_GPPUT                                      0x0003FF04 /* RW-4R */
#define NV_PAPU_GPPUT_VALUE                                11:2 /* RWXUF */
#define NV_PAPU_GPIDRDY                                    0x0003FF10 /* RW-4R */
#define NV_PAPU_GPIDRDY_GPSETIDLE                          0:0 /* RW-VF */
#define NV_PAPU_GPIDRDY_GPSETIDLE_NOT_SET                  0x00000000 /* RWI-V */
#define NV_PAPU_GPIDRDY_GPSETIDLE_SET                      0x00000001 /* -W--V */
#define NV_PAPU_GPIDRDY_GPSTOPPED                          1:1 /* RW-VF */
#define NV_PAPU_GPIDRDY_GPSTOPPED_NOT_SET                  0x00000000 /* RWI-V */
#define NV_PAPU_GPIDRDY_GPSTOPPED_SET                      0x00000001 /* -W--V */
#define NV_PAPU_GPIDRDY_GPSTOP_ENABLE                      2:2 /* RW-VF */
#define NV_PAPU_GPIDRDY_GPSTOP_NOT_ENABLED                 0x00000000 /* RWI-V */
#define NV_PAPU_GPIDRDY_GPSTOP_ENABLED                     0x00000001 /* -W--V */
#define NV_PAPU_GPIDRDY_GPSETNINT                          3:3 /* RW-VF */
#define NV_PAPU_GPIDRDY_GPSETNINT_NOT_SET                  0x00000000 /* RWI-V */
#define NV_PAPU_GPIDRDY_GPSETNINT_SET                      0x00000001 /* RW--V */
#define NV_PAPU_GPT0CFG                                    0x0003FEC0 /* RW-4R */
#define NV_PAPU_GPT0CFG_GPT0RUN                            0:0 /* RW-VF */
#define NV_PAPU_GPT0CFG_GPT0RUN_IDLE                       0x00000000 /* RWI-V */
#define NV_PAPU_GPT0CFG_GPT0RUN_RUN                        0x00000001 /* RW--V */
#define NV_PAPU_GPT0CFG_GPT0DSTP                           1:1 /* RW-VF */
#define NV_PAPU_GPT0CFG_GPT0DSTP_RUN                       0x00000000 /* RWI-V */
#define NV_PAPU_GPT0CFG_GPT0DSTP_HOLD                      0x00000001 /* RW--V */
#define NV_PAPU_GPT1CFG                                    0x0003FED0 /* RW-4R */
#define NV_PAPU_GPT1CFG_GPT1RUN                            0:0 /* RW-VF */
#define NV_PAPU_GPT1CFG_GPT1RUN_IDLE                       0x00000000 /* RWI-V */
#define NV_PAPU_GPT1CFG_GPT1RUN_RUN                        0x00000001 /* RW--V */
#define NV_PAPU_GPT1CFG_GPT1DSTP                           1:1 /* RW-VF */
#define NV_PAPU_GPT1CFG_GPT1DSTP_RUN                       0x00000000 /* RWI-V */
#define NV_PAPU_GPT1CFG_GPT1DSTP_HOLD                      0x00000001 /* RW--V */
#define NV_PAPU_GPT0CTL                                    0x0003FEC4 /* RW-4R */
#define NV_PAPU_GPT0CTL_GPT0ACT                            1:0 /* RW-VF */
#define NV_PAPU_GPT0CTL_GPT0ACT_NOP                        0x00000000 /* RWI-V */
#define NV_PAPU_GPT0CTL_GPT0ACT_STZERO                     0x00000001 /* RW--V */
#define NV_PAPU_GPT0CTL_GPT0ACT_STCUR                      0x00000002 /* RW--V */
#define NV_PAPU_GPT0CTL_GPT0ACT_STOP                       0x00000003 /* RW--V */
#define NV_PAPU_GPT0CTL_GPT0ST                             2:2 /* RW-VF */
#define NV_PAPU_GPT0CTL_GPT0ST_STOP                        0x00000000 /* RWI-V */
#define NV_PAPU_GPT0CTL_GPT0ST_RUN                         0x00000001 /* RW--V */
#define NV_PAPU_GPT1CTL                                    0x0003FED4 /* RW-4R */
#define NV_PAPU_GPT1CTL_GPT1ACT                            1:0 /* RW-VF */
#define NV_PAPU_GPT1CTL_GPT1ACT_NOP                        0x00000000 /* RWI-V */
#define NV_PAPU_GPT1CTL_GPT1ACT_STZERO                     0x00000001 /* RW--V */
#define NV_PAPU_GPT1CTL_GPT1ACT_STCUR                      0x00000002 /* RW--V */
#define NV_PAPU_GPT1CTL_GPT1ACT_STOP                       0x00000003 /* RW--V */
#define NV_PAPU_GPT1CTL_GPT1ST                             2:2 /* RW-VF */
#define NV_PAPU_GPT1CTL_GPT1ST_STOP                        0x00000000 /* RWI-V */
#define NV_PAPU_GPT1CTL_GPT1ST_RUN                         0x00000001 /* RW--V */
#define NV_PAPU_GPT0TCNT                                   0x0003FEC8 /* RW-4R */
#define NV_PAPU_GPT0TCNT_VALUE                             23:0 /* RWXUF */
#define NV_PAPU_GPT1TCNT                                   0x0003FED8 /* RW-4R */
#define NV_PAPU_GPT1TCNT_VALUE                             23:0 /* RWXUF */
#define NV_PAPU_GPT0CCNT                                   0x0003FECC /* RW-4R */
#define NV_PAPU_GPT0CCNT_VALUE                             23:0 /* RWXUF */
#define NV_PAPU_GPT1CCNT                                   0x0003FEDC /* RW-4R */
#define NV_PAPU_GPT1CCNT_VALUE                             23:0 /* RWXUF */
#define NV_PAPU_GPISTS                                     0x0003FF14 /* RW-4R */
#define NV_PAPU_GPISTS_GPSTRTSTS                           0:0 /* RW-VF */
#define NV_PAPU_GPISTS_GPSTRTSTS_NO_INTR                   0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPSTRTSTS_INTR                      0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPSTRTSTS_CLR                       0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPABRTSTS                           1:1 /* RW-VF */
#define NV_PAPU_GPISTS_GPABRTSTS_NO_INTR                   0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPABRTSTS_INTR                      0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPABRTSTS_CLR                       0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPPUTSTS                            2:2 /* RW-VF */
#define NV_PAPU_GPISTS_GPPUTSTS_NO_INTR                    0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPPUTSTS_INTR                       0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPPUTSTS_CLR                        0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPMBISTS                            3:3 /* RW-VF */
#define NV_PAPU_GPISTS_GPMBISTS_NO_INTR                    0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPMBISTS_INTR                       0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPMBISTS_CLR                        0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPD1STS                             4:4 /* R--VF */
#define NV_PAPU_GPISTS_GPD1STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPD1STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPD1STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPD2STS                             5:5 /* RW-VF */
#define NV_PAPU_GPISTS_GPD2STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPD2STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPD2STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPD3STS                             6:6 /* RW-VF */
#define NV_PAPU_GPISTS_GPD3STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPD3STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPD3STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPDEOLSTS                           7:7 /* RW-VF */
#define NV_PAPU_GPISTS_GPDEOLSTS_NO_INTR                   0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPDEOLSTS_INTR                      0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPDEOLSTS_CLR                       0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPT0STS                             8:8 /* RW-VF */
#define NV_PAPU_GPISTS_GPT0STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPT0STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPT0STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPT1STS                             9:9 /* RW-VF */
#define NV_PAPU_GPISTS_GPT1STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPT1STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPT1STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_GPISTS_GPDERRSTS                           10:10 /* RW-VF */
#define NV_PAPU_GPISTS_GPDERRSTS_NO_INTR                   0x00000000 /* R-I-V */
#define NV_PAPU_GPISTS_GPDERRSTS_INTR                      0x00000001 /* R---V */
#define NV_PAPU_GPISTS_GPDERRSTS_CLR                       0x00000001 /* -W--C */
#define NV_PAPU_GPHDRV(i)                                  (0x0003FE40+(i)*4) /* R--4A */
#define NV_PAPU_GPHDRV__SIZE_1                             32 /* */ 
#define NV_PAPU_GPHDRV_MHR                                 2:0 /* R--UF */
#define NV_PAPU_GPHDRV_VLD                                 3:3 /* R--UF */
#define NV_PAPU_GPHDRV_VLD_INVALID                         0x00000000 /* R-I-V */
#define NV_PAPU_GPHDRV_VLD_VALID                           0x00000001 /* R---V */
#define NV_PAPU_GPGSCNT                                    0x0003FF18 /* R--4R */
#define NV_PAPU_GPGSCNT_GSCNT                              23:0 /* R--UF */
#define NV_PAPU_GPDCFG                                     0x0003FF5C /* RW-4R */
#define NV_PAPU_GPDCFG_GPDASTRT                            0:0 /* RW-VF */
#define NV_PAPU_GPDCFG_GPDASTRT_DISABLED                   0x00000000 /* RWI-V */
#define NV_PAPU_GPDCFG_GPDASTRT_ENABLED                    0x00000001 /* RW--V */
#define NV_PAPU_GPDCFG_GPDARDY                             1:1 /* RW-VF */
#define NV_PAPU_GPDCFG_GPDARDY_DISABLED                    0x00000000 /* RWI-V */
#define NV_PAPU_GPDCFG_GPDARDY_ENABLED                     0x00000001 /* RW--V */
#define NV_PAPU_GPDCFG_GPDIOCR                             2:2 /* RW-VF */
#define NV_PAPU_GPDCFG_GPDIOCR_DISABLED                    0x00000000 /* RWI-V */
#define NV_PAPU_GPDCFG_GPDIOCR_ENABLED                     0x00000001 /* RW--V */
#define NV_PAPU_GPDCFG_GPDEOLR                             3:3 /* RW-VF */
#define NV_PAPU_GPDCFG_GPDEOLR_DISABLED                    0x00000000 /* RWI-V */
#define NV_PAPU_GPDCFG_GPDEOLR_ENABLED                     0x00000001 /* RW--V */
#define NV_PAPU_GPDCFG_GPDERRR                             4:4 /* RW-VF */
#define NV_PAPU_GPDCFG_GPDERRR_DISABLED                    0x00000000 /* RWI-V */
#define NV_PAPU_GPDCFG_GPDERRR_ENABLED                     0x00000001 /* RW--V */
#define NV_PAPU_GPDCTL                                     0x0003FF58 /* RW-4R */
#define NV_PAPU_GPDCTL_GPDACT                              2:0 /* RW-VF */
#define NV_PAPU_GPDCTL_GPDACT_NOP                          0x00000000 /* RWI-V */
#define NV_PAPU_GPDCTL_GPDACT_START                        0x00000001 /* -W--V */
#define NV_PAPU_GPDCTL_GPDACT_STOP                         0x00000002 /* -W--V */
#define NV_PAPU_GPDCTL_GPDACT_FREEZE                       0x00000003 /* -W--V */
#define NV_PAPU_GPDCTL_GPDACT_UNFREEZE                     0x00000004 /* -W--V */
#define NV_PAPU_GPDCTL_GPDACT_ABORT                        0x00000005 /* -W--V */
#define NV_PAPU_GPDCTL_GPDFRZ                              3:3 /* R--VF */
#define NV_PAPU_GPDCTL_GPDFRZ_NOT_FROZE                    0x00000000 /* R-I-V */
#define NV_PAPU_GPDCTL_GPDFRZ_FROZE                        0x00000001 /* R---V */
#define NV_PAPU_GPDCTL_GPDRUN                              4:4 /* R--VF */
#define NV_PAPU_GPDCTL_GPDRUN_NOT_RUN                      0x00000000 /* R-I-V */
#define NV_PAPU_GPDCTL_GPDRUN_RUNNING                      0x00000001 /* R---V */
#define NV_PAPU_GPDCTL_GPDSTP                              5:5 /* R--VF */
#define NV_PAPU_GPDCTL_GPDSTP_NOT_STOP                     0x00000000 /* R-I-V */
#define NV_PAPU_GPDCTL_GPDFRZ_STOPPED                      0x00000001 /* R---V */
#define NV_PAPU_GPDSPT                                     0x0003FF54 /* RW-4R */
#define NV_PAPU_GPDSPT_GPDSBPT                             13:0 /* RW-VF */
#define NV_PAPU_GPDSPT_GPDSBPT_INIT                        0x00000000 /* RWI-V */
#define NV_PAPU_GPDSPT_GPDEOL                              14:14 /* RW-VF */
#define NV_PAPU_GPDSPT_GPDEOL_NOT_EOL                      0x00000000 /* RWI-V */
#define NV_PAPU_GPDSPT_GPDEOL_EOL                          0x00000001 /* RW--V */
#define NV_PAPU_GPNSPT                                     0x0003FF50 /* RW-4R */
#define NV_PAPU_GPNSPT_GPNSBPT                             13:0 /* RW-VF */
#define NV_PAPU_GPNSPT_GPNSBPT_INIT                        0x00000000 /* RWI-V */
#define NV_PAPU_GPNSPT_GPNEOL                              14:14 /* RW-VF */
#define NV_PAPU_GPNSPT_GPNEOL_NOT_EOL                      0x00000000 /* RWI-V */
#define NV_PAPU_GPNSPT_GPNEOL_EOL                          0x00000001 /* RW--V */
#define NV_PAPU_GPDBASE(i)                                 (0x0003FF30+(i)*8) /* RW-4A */
#define NV_PAPU_GPDBASE__SIZE_1                            4 /* */ 
#define NV_PAPU_GPDBASE_BASE                               23:0 /* R--UF */
#define NV_PAPU_GPDSIZE(i)                                 (0x0003FF34+(i)*8) /* RW-4A */
#define NV_PAPU_GPDSIZE__SIZE_1                            4 /* */ 
#define NV_PAPU_GPDSIZE_SIZE                               23:0 /* R--UF */
#define NV_PAPU_GPDDEBUG                                   0x0003FF2C /* R--4R */
#define NV_PAPU_GPDDEBUG_PBADBLK                           13:0 /* R--VF */
#define NV_PAPU_GPDDEBUG_ILLSMBUFID                        14:14 /* R--VF */
#define NV_PAPU_GPDDEBUG_ILLSMBUFID_NOT_ILL                0x00000000 /* R---V */
#define NV_PAPU_GPDDEBUG_ILLSMBUFID_ILL                    0x00000001 /* R---V */
#define NV_PAPU_GPDDEBUG_ILLSMDATAFMT                      15:15 /* R--VF */
#define NV_PAPU_GPDDEBUG_ILLSMDATAFMT_NOT_ILL              0x00000000 /* R---V */
#define NV_PAPU_GPDDEBUG_ILLSMDATAFMT_ILL                  0x00000001 /* R---V */
#define NV_PAPU_GPDDEBUG_ILLCOUNT                          16:16 /* R--VF */
#define NV_PAPU_GPDDEBUG_ILLCOUNT_NOT_ILL                  0x00000000 /* R---V */
#define NV_PAPU_GPDDEBUG_ILLCOUNT_ILL                      0x00000001 /* R---V */
#define NV_PAPU_EPXMEM(i)                                  (0x50000+4*(i)) /* RW--M */
#define NV_PAPU_EPXMEM__SIZE_1                             0x0C00 /* */ 
#define NV_PAPU_EPYMEM(i)                                  (0x56000+4*(i)) /* RW--M */
#define NV_PAPU_EPYMEM__SIZE_1                             0x0100 /* */ 
#define NV_PAPU_EPPMEM(i)                                  (0x5A000+4*(i)) /* RW--M */
#define NV_PAPU_EPPMEM__SIZE_1                             0x1000 /* */ 
#define NV_PAPU_EPRST                                      0x0005FFFC /* RW-4R */
#define NV_PAPU_EPRST_EPRST                                0:0 /* RW-VF */
#define NV_PAPU_EPRST_EPRST_DISABLED                       0x00000001 /* RWI-V */
#define NV_PAPU_EPRST_EPRST_ENABLED                        0x00000000 /* RW--V */
#define NV_PAPU_EPRST_EPDSPRST                             1:1 /* RW-VF */
#define NV_PAPU_EPRST_EPDSPRST_DISABLED                    0x00000001 /* RWI-V */
#define NV_PAPU_EPRST_EPDSPRST_ENABLED                     0x00000000 /* RW--V */
#define NV_PAPU_EPRST_EPNMI                                2:2 /* RW-VF */
#define NV_PAPU_EPRST_EPNMI_DISABLED                       0x00000001 /* RWI-V */
#define NV_PAPU_EPRST_EPNMI_ENABLED                        0x00000000 /* RW--V */
#define NV_PAPU_EPRST_EPABORT                              3:3 /* RW-VF */
#define NV_PAPU_EPRST_EPABORT_DISABLED                     0x00000001 /* RWI-V */
#define NV_PAPU_EPRST_EPABORT_ENABLED                      0x00000000 /* RW--V */
#define NV_PAPU_EPCTLG                                     0x0005FF28 /* RW-4R */
#define NV_PAPU_EPCTLG_EPSTYP                              0:0 /* RW-VF */
#define NV_PAPU_EPCTLG_EPSTYP_NON_ISO                      0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLG_EPSTYP_ISO                          0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT                                   0x0005FF20 /* RW-4R */
#define NV_PAPU_EPCTLOUT_ED0FMT                            1:0 /* RW-VF */
#define NV_PAPU_EPCTLOUT_ED0FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_ED0FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED0FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED0FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_EPCTLOUT_EP0TYP                            2:2 /* RW-VF */
#define NV_PAPU_EPCTLOUT_EP0TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_EP0TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED0SIZ                            4:3 /* RW-VF */
#define NV_PAPU_EPCTLOUT_ED0SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_ED0SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED0SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED1FMT                            6:5 /* RW-VF */
#define NV_PAPU_EPCTLOUT_ED1FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_ED1FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED1FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED1FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_EPCTLOUT_EP1TYP                            7:7 /* RW-VF */
#define NV_PAPU_EPCTLOUT_EP1TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_EP1TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED1SIZ                            9:8 /* RW-VF */
#define NV_PAPU_EPCTLOUT_ED1SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_ED1SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED1SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED2FMT                            11:10 /* RW-VF */
#define NV_PAPU_EPCTLOUT_ED2FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_ED2FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED2FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED2FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_EPCTLOUT_EP2TYP                            12:12 /* RW-VF */
#define NV_PAPU_EPCTLOUT_EP2TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_EP2TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED2SIZ                            14:13 /* RW-VF */
#define NV_PAPU_EPCTLOUT_ED2SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_ED2SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED2SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED3FMT                            16:15 /* RW-VF */
#define NV_PAPU_EPCTLOUT_ED3FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_ED3FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED3FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED3FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_EPCTLOUT_EP3TYP                            17:17 /* RW-VF */
#define NV_PAPU_EPCTLOUT_EP3TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_EP3TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED3SIZ                            19:18 /* RW-VF */
#define NV_PAPU_EPCTLOUT_ED3SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLOUT_ED3SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_EPCTLOUT_ED3SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_EPCTLIN                                    0x0005FF24 /* RW-4R */
#define NV_PAPU_EPCTLIN_EDI0FMT                            1:0 /* RW-VF */
#define NV_PAPU_EPCTLIN_EDI0FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLIN_EDI0FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI0FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI0FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_EPCTLIN_EPI0TYP                            2:2 /* RW-VF */
#define NV_PAPU_EPCTLIN_EPI0TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLIN_EPI0TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI0SIZ                            4:3 /* RW-VF */
#define NV_PAPU_EPCTLIN_EDI0SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLIN_EDI0SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI0SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI1FMT                            6:5 /* RW-VF */
#define NV_PAPU_EPCTLIN_EDI1FMT_MONO                       0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLIN_EDI1FMT_STEREO                     0x00000001 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI1FMT_QUAD                       0x00000002 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI1FMT_HEX                        0x00000003 /* RW--V */
#define NV_PAPU_EPCTLIN_EPI1TYP                            7:7 /* RW-VF */
#define NV_PAPU_EPCTLIN_EPI1TYP_NON_ISO                    0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLIN_EPI1TYP_ISO                        0x00000001 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI1SIZ                            9:8 /* RW-VF */
#define NV_PAPU_EPCTLIN_EDI1SIZ_8                          0x00000000 /* RWI-V */
#define NV_PAPU_EPCTLIN_EDI1SIZ_16                         0x00000001 /* RW--V */
#define NV_PAPU_EPCTLIN_EDI1SIZ_32                         0x00000002 /* RW--V */
#define NV_PAPU_EPMBO                                      0x0005FF08 /* RW-4R */
#define NV_PAPU_EPMBO_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_EPMBI                                      0x0005FF0C /* RW-4R */
#define NV_PAPU_EPMBI_VALUE                                15:0 /* RWXUF */
#define NV_PAPU_EPGET                                      0x0005FF00 /* RW-4R */
#define NV_PAPU_EPGET_VALUE                                11:2 /* RWXUF */
#define NV_PAPU_EPPUT                                      0x0005FF04 /* RW-4R */
#define NV_PAPU_EPPUT_VALUE                                11:2 /* RWXUF */
#define NV_PAPU_EPIDRDY                                    0x0005FF10 /* RW-4R */
#define NV_PAPU_EPIDRDY_EPSETIDLE                          0:0 /* RW-VF */
#define NV_PAPU_EPIDRDY_EPSETIDLE_NOT_SET                  0x00000000 /* RWI-V */
#define NV_PAPU_EPIDRDY_EPSETIDLE_SET                      0x00000001 /* -W--V */
#define NV_PAPU_EPIDRDY_EPSTOPPED                          1:1 /* RW-VF */
#define NV_PAPU_EPIDRDY_EPSTOPPED_NOT_SET                  0x00000000 /* RWI-V */
#define NV_PAPU_EPIDRDY_EPSTOPPED_SET                      0x00000001 /* -W--V */
#define NV_PAPU_EPIDRDY_EPSTOP_ENABLE                      2:2 /* RW-VF */
#define NV_PAPU_EPIDRDY_EPSTOP_NOT_ENABLED                 0x00000000 /* RWI-V */
#define NV_PAPU_EPIDRDY_EPSTOP_ENABLED                     0x00000001 /* -W--V */
#define NV_PAPU_EPIDRDY_EPSETNINT                          3:3 /* RW-VF */
#define NV_PAPU_EPIDRDY_EPSETNINT_NOT_SET                  0x00000000 /* RWI-V */
#define NV_PAPU_EPIDRDY_EPSETNINT_SET                      0x00000001 /* RW--V */
#define NV_PAPU_EPT0CFG                                    0x0005FEC0 /* RW-4R */
#define NV_PAPU_EPT0CFG_EPT0RUN                            0:0 /* RW-VF */
#define NV_PAPU_EPT0CFG_EPT0RUN_IDLE                       0x00000000 /* RWI-V */
#define NV_PAPU_EPT0CFG_EPT0RUN_RUN                        0x00000001 /* RW--V */
#define NV_PAPU_EPT0CFG_EPT0DSTP                           1:1 /* RW-VF */
#define NV_PAPU_EPT0CFG_EPT0DSTP_RUN                       0x00000000 /* RWI-V */
#define NV_PAPU_EPT0CFG_EPT0DSTP_HOLD                      0x00000001 /* RW--V */
#define NV_PAPU_EPT1CFG                                    0x0005FED0 /* RW-4R */
#define NV_PAPU_EPT1CFG_EPT1RUN                            0:0 /* RW-VF */
#define NV_PAPU_EPT1CFG_EPT1RUN_IDLE                       0x00000000 /* RWI-V */
#define NV_PAPU_EPT1CFG_EPT1RUN_RUN                        0x00000001 /* RW--V */
#define NV_PAPU_EPT1CFG_EPT1DSTP                           1:1 /* RW-VF */
#define NV_PAPU_EPT1CFG_EPT1DSTP_RUN                       0x00000000 /* RWI-V */
#define NV_PAPU_EPT1CFG_EPT1DSTP_HOLD                      0x00000001 /* RW--V */
#define NV_PAPU_EPT0CTL                                    0x0005FEC4 /* RW-4R */
#define NV_PAPU_EPT0CTL_EPT0ACT                            1:0 /* RW-VF */
#define NV_PAPU_EPT0CTL_EPT0ACT_NOP                        0x00000000 /* RWI-V */
#define NV_PAPU_EPT0CTL_EPT0ACT_STZERO                     0x00000001 /* RW--V */
#define NV_PAPU_EPT0CTL_EPT0ACT_STCUR                      0x00000002 /* RW--V */
#define NV_PAPU_EPT0CTL_EPT0ACT_STOP                       0x00000003 /* RW--V */
#define NV_PAPU_EPT0CTL_EPT0ST                             2:2 /* RW-VF */
#define NV_PAPU_EPT0CTL_EPT0ST_STOP                        0x00000000 /* RWI-V */
#define NV_PAPU_EPT0CTL_EPT0ST_RUN                         0x00000001 /* RW--V */
#define NV_PAPU_EPT1CTL                                    0x0005FED4 /* RW-4R */
#define NV_PAPU_EPT1CTL_EPT1ACT                            1:0 /* RW-VF */
#define NV_PAPU_EPT1CTL_EPT1ACT_NOP                        0x00000000 /* RWI-V */
#define NV_PAPU_EPT1CTL_EPT1ACT_STZERO                     0x00000001 /* RW--V */
#define NV_PAPU_EPT1CTL_EPT1ACT_STCUR                      0x00000002 /* RW--V */
#define NV_PAPU_EPT1CTL_EPT1ACT_STOP                       0x00000003 /* RW--V */
#define NV_PAPU_EPT1CTL_EPT1ST                             2:2 /* RW-VF */
#define NV_PAPU_EPT1CTL_EPT1ST_STOP                        0x00000000 /* RWI-V */
#define NV_PAPU_EPT1CTL_EPT1ST_RUN                         0x00000001 /* RW--V */
#define NV_PAPU_EPT0TCNT                                   0x0005FEC8 /* RW-4R */
#define NV_PAPU_EPT0TCNT_VALUE                             23:0 /* RWXUF */
#define NV_PAPU_EPT1TCNT                                   0x0005FED8 /* RW-4R */
#define NV_PAPU_EPT1TCNT_VALUE                             23:0 /* RWXUF */
#define NV_PAPU_EPT0CCNT                                   0x0005FECC /* RW-4R */
#define NV_PAPU_EPT0CCNT_VALUE                             23:0 /* RWXUF */
#define NV_PAPU_EPT1CCNT                                   0x0005FEDC /* RW-4R */
#define NV_PAPU_EPT1CCNT_VALUE                             23:0 /* RWXUF */
#define NV_PAPU_EPISTS                                     0x0005FF14 /* RW-4R */
#define NV_PAPU_EPISTS_EPSTRTSTS                           0:0 /* RW-VF */
#define NV_PAPU_EPISTS_EPSTRTSTS_NO_INTR                   0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPSTRTSTS_INTR                      0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPSTRTSTS_CLR                       0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPABRTSTS                           1:1 /* RW-VF */
#define NV_PAPU_EPISTS_EPABRTSTS_NO_INTR                   0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPABRTSTS_INTR                      0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPABRTSTS_CLR                       0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPPUTSTS                            2:2 /* RW-VF */
#define NV_PAPU_EPISTS_EPPUTSTS_NO_INTR                    0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPPUTSTS_INTR                       0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPPUTSTS_CLR                        0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPMBISTS                            3:3 /* RW-VF */
#define NV_PAPU_EPISTS_EPMBISTS_NO_INTR                    0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPMBISTS_INTR                       0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPMBISTS_CLR                        0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPD1STS                             4:4 /* R--VF */
#define NV_PAPU_EPISTS_EPD1STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPD1STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPD1STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPD2STS                             5:5 /* RW-VF */
#define NV_PAPU_EPISTS_EPD2STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPD2STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPD2STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPD3STS                             6:6 /* RW-VF */
#define NV_PAPU_EPISTS_EPD3STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPD3STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPD3STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPDEOLSTS                           7:7 /* RW-VF */
#define NV_PAPU_EPISTS_EPDEOLSTS_NO_INTR                   0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPDEOLSTS_INTR                      0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPDEOLSTS_CLR                       0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPT0STS                             8:8 /* RW-VF */
#define NV_PAPU_EPISTS_EPT0STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPT0STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPT0STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPT1STS                             9:9 /* RW-VF */
#define NV_PAPU_EPISTS_EPT1STS_NO_INTR                     0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPT1STS_INTR                        0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPT1STS_CLR                         0x00000001 /* -W--C */
#define NV_PAPU_EPISTS_EPDERRSTS                           10:10 /* RW-VF */
#define NV_PAPU_EPISTS_EPDERRSTS_NO_INTR                   0x00000000 /* R-I-V */
#define NV_PAPU_EPISTS_EPDERRSTS_INTR                      0x00000001 /* R---V */
#define NV_PAPU_EPISTS_EPDERRSTS_CLR                       0x00000001 /* -W--C */
#define NV_PAPU_EPGSCNT                                    0x0005FF18 /* R--4R */
#define NV_PAPU_EPGSCNT_GSCNT                              23:0 /* R--UF */
#define NV_PAPU_EPDCFG                                     0x0005FF5C /* RW-4R */
#define NV_PAPU_EPDCFG_EPDASTRT                            0:0 /* RW-VF */
#define NV_PAPU_EPDCFG_EPDASTRT_DISABLED                   0x00000000 /* RWI-V */
#define NV_PAPU_EPDCFG_EPDASTRT_ENABLED                    0x00000001 /* RW--V */
#define NV_PAPU_EPDCFG_EPDARDY                             1:1 /* RW-VF */
#define NV_PAPU_EPDCFG_EPDARDY_DISABLED                    0x00000000 /* RWI-V */
#define NV_PAPU_EPDCFG_EPDARDY_ENABLED                     0x00000001 /* RW--V */
#define NV_PAPU_EPDCFG_EPDIOCR                             2:2 /* RW-VF */
#define NV_PAPU_EPDCFG_EPDIOCR_DISABLED                    0x00000000 /* RWI-V */
#define NV_PAPU_EPDCFG_EPDIOCR_ENABLED                     0x00000001 /* RW--V */
#define NV_PAPU_EPDCFG_EPDEOLR                             3:3 /* RW-VF */
#define NV_PAPU_EPDCFG_EPDEOLR_DISABLED                    0x00000000 /* RWI-V */
#define NV_PAPU_EPDCFG_EPDEOLR_ENABLED                     0x00000001 /* RW--V */
#define NV_PAPU_EPDCFG_EPDERRR                             4:4 /* RW-VF */
#define NV_PAPU_EPDCFG_EPDERRR_DISABLED                    0x00000000 /* RWI-V */
#define NV_PAPU_EPDCFG_EPDERRR_ENABLED                     0x00000001 /* RW--V */
#define NV_PAPU_EPDCTL                                     0x0005FF58 /* RW-4R */
#define NV_PAPU_EPDCTL_EPDACT                              2:0 /* RW-VF */
#define NV_PAPU_EPDCTL_EPDACT_NOP                          0x00000000 /* RWI-V */
#define NV_PAPU_EPDCFG_EPDACT_START                        0x00000001 /* -W--V */
#define NV_PAPU_EPDCFG_EPDACT_STOP                         0x00000002 /* -W--V */
#define NV_PAPU_EPDCFG_EPDACT_FREEZE                       0x00000003 /* -W--V */
#define NV_PAPU_EPDCFG_EPDACT_UNFREEZE                     0x00000004 /* -W--V */
#define NV_PAPU_EPDCFG_EPDACT_ABORT                        0x00000005 /* -W--V */
#define NV_PAPU_EPDCTL_EPDFRZ                              3:3 /* R--VF */
#define NV_PAPU_EPDCFG_EPDFRZ_NOT_FROZE                    0x00000000 /* R-I-V */
#define NV_PAPU_EPDCFG_EPDFRZ_FROZE                        0x00000001 /* R---V */
#define NV_PAPU_EPDCTL_EPDRUN                              4:4 /* R--VF */
#define NV_PAPU_EPDCFG_EPDRUN_NOT_RUN                      0x00000000 /* R-I-V */
#define NV_PAPU_EPDCFG_EPDRUN_RUNNING                      0x00000001 /* R---V */
#define NV_PAPU_EPDCTL_EPDSTP                              5:5 /* R--VF */
#define NV_PAPU_EPDCFG_EPDSTP_NOT_STOP                     0x00000000 /* R-I-V */
#define NV_PAPU_EPDCFG_EPDFRZ_STOPPED                      0x00000001 /* R---V */
#define NV_PAPU_EPDSPT                                     0x0005FF54 /* RW-4R */
#define NV_PAPU_EPDSPT_EPDSBPT                             13:0 /* RW-VF */
#define NV_PAPU_EPDSPT_EPDSBPT_INIT                        0x00000000 /* RWI-V */
#define NV_PAPU_EPDSPT_EPDEOL                              14:14 /* RW-VF */
#define NV_PAPU_EPDSPT_EPDEOL_NOT_EOL                      0x00000000 /* RWI-V */
#define NV_PAPU_EPDSPT_EPDEOL_EOL                          0x00000001 /* RW--V */
#define NV_PAPU_EPNSPT                                     0x0005FF50 /* RW-4R */
#define NV_PAPU_EPNSPT_EPNSBPT                             13:0 /* RW-VF */
#define NV_PAPU_EPNSPT_EPNSBPT_INIT                        0x00000000 /* RWI-V */
#define NV_PAPU_EPNSPT_EPNEOL                              14:14 /* RW-VF */
#define NV_PAPU_EPNSPT_EPNEOL_NOT_EOL                      0x00000000 /* RWI-V */
#define NV_PAPU_EPNSPT_EPNEOL_EOL                          0x00000001 /* RW--V */
#define NV_PAPU_EPDBASE(i)                                 (0x0005FF30+(i)*8) /* RW-4A */
#define NV_PAPU_EPDBASE__SIZE_1                            4 /* */ 
#define NV_PAPU_EPDBASE_BASE                               23:0 /* R--UF */
#define NV_PAPU_EPDSIZE(i)                                 (0x0005FF34+(i)*8) /* RW-4A */
#define NV_PAPU_EPDSIZE__SIZE_1                            4 /* */ 
#define NV_PAPU_EPDSIZE_SIZE                               23:0 /* R--UF */
#define NV_PAPU_EPDDEBUG                                   0x0005FF2C /* R--4R */
#define NV_PAPU_EPDDEBUG_PBADBLK                           13:0 /* R--VF */
#define NV_PAPU_EPDDEBUG_ILLSMBUFID                        14:14 /* R--VF */
#define NV_PAPU_EPDDEBUG_ILLSMBUFID_NOT_ILL                0x00000000 /* R---V */
#define NV_PAPU_EPDDEBUG_ILLSMBUFID_ILL                    0x00000001 /* R---V */
#define NV_PAPU_EPDDEBUG_ILLSMDATAFMT                      15:15 /* R--VF */
#define NV_PAPU_EPDDEBUG_ILLSMDATAFMT_NOT_ILL              0x00000000 /* R---V */
#define NV_PAPU_EPDDEBUG_ILLSMDATAFMT_ILL                  0x00000001 /* R---V */
#define NV_PAPU_EPDDEBUG_ILLCOUNT                          16:16 /* R--VF */
#define NV_PAPU_EPDDEBUG_ILLCOUNT_NOT_ILL                  0x00000000 /* R---V */
#define NV_PAPU_EPDDEBUG_ILLCOUNT_ILL                      0x00000001 /* R---V */

#endif /* __NV_PAPU_H__ */

